116 		mt76_rr(dev, MT_TX_AGG_CNT(0, i));  in mt7615_mac_reset_counters()
117 		mt76_rr(dev, MT_TX_AGG_CNT(1, i));  in mt7615_mac_reset_counters()
126 	mt76_rr(dev, MT_MIB_SDR9(0));  in mt7615_mac_reset_counters()
127 	mt76_rr(dev, MT_MIB_SDR9(1));  in mt7615_mac_reset_counters()
129 	mt76_rr(dev, MT_MIB_SDR36(0));  in mt7615_mac_reset_counters()
130 	mt76_rr(dev, MT_MIB_SDR36(1));  in mt7615_mac_reset_counters()
132 	mt76_rr(dev, MT_MIB_SDR37(0));  in mt7615_mac_reset_counters()
133 	mt76_rr(dev, MT_MIB_SDR37(1));  in mt7615_mac_reset_counters()
932 			msta->airtime_ac[i] = mt76_rr(dev, addr);  in mt7615_mac_sta_poll()
933 			msta->airtime_ac[i + 4] = mt76_rr(dev, addr + 4);  in mt7615_mac_sta_poll()
1092 	val = mt76_rr(dev, addr);  in mt7615_mac_get_sta_tid_sn()
1097 		val2 = mt76_rr(dev, addr);  in mt7615_mac_get_sta_tid_sn()
1126 	w27 = mt76_rr(dev, addr + 27 * 4);  in mt7615_mac_set_rates()
1130 	w5 = mt76_rr(dev, addr + 5 * 4);  in mt7615_mac_set_rates()
1168 	sta->rate_set_tsf = mt76_rr(dev, MT_LPON_UTTR0) & ~BIT(0);  in mt7615_mac_set_rates()
1231 	w0 = mt76_rr(dev, addr);  in mt7615_mac_wtbl_update_pk()
1232 	w1 = mt76_rr(dev, addr + 4);  in mt7615_mac_wtbl_update_pk()
1874 		val = mt76_rr(dev, MT7663_WF_PHY_R0_PHYCTRL_STS0(ext_phy));  in mt7615_mac_scs_check()
1876 		val = mt76_rr(dev, MT_WF_PHY_R0_PHYCTRL_STS0(ext_phy));  in mt7615_mac_scs_check()
1881 		val = mt76_rr(dev, MT7663_WF_PHY_R0_PHYCTRL_STS5(ext_phy));  in mt7615_mac_scs_check()
1883 		val = mt76_rr(dev, MT_WF_PHY_R0_PHYCTRL_STS5(ext_phy));  in mt7615_mac_scs_check()
1917 		val = mt76_rr(dev, reg);  in mt7615_phy_get_nf()
2018 		val = mt76_rr(dev, MT_MIB_MB_SDR1(ext_phy, i));  in mt7615_mac_update_mib_stats()
2023 		val = mt76_rr(dev, MT_MIB_MB_SDR0(ext_phy, i));  in mt7615_mac_update_mib_stats()
2028 		val = mt76_rr(dev, MT_TX_AGG_CNT(ext_phy, i));  in mt7615_mac_update_mib_stats()