Lines Matching full:true

148 	.shadow_ram_support = true,
152 .shadow_reg_enable = true,
153 .pcie_l1_allowed = true,
160 .shadow_ram_support = true,
164 .shadow_reg_enable = true,
165 .pcie_l1_allowed = true,
169 .stbc = true,
170 .ldpc = true,
188 .apmg_not_supported = true, \
189 .trans.mq_rx_supported = true, \
190 .vht_mu_mimo_supported = true, \
194 .trans.use_tfh = true, \
195 .trans.rf_id = true, \
196 .trans.gen2 = true, \
198 .dbgc_supported = true, \
265 .apmg_not_supported = true, \
266 .trans.mq_rx_supported = true, \
267 .vht_mu_mimo_supported = true, \
271 .trans.use_tfh = true, \
272 .trans.rf_id = true, \
273 .trans.gen2 = true, \
275 .dbgc_supported = true, \
317 .mq_rx_supported = true,
318 .use_tfh = true,
319 .rf_id = true,
320 .gen2 = true,
326 .mq_rx_supported = true,
327 .use_tfh = true,
328 .rf_id = true,
329 .gen2 = true,
332 .integrated = true,
338 .mq_rx_supported = true,
339 .use_tfh = true,
340 .rf_id = true,
341 .gen2 = true,
344 .integrated = true,
350 .mq_rx_supported = true,
351 .use_tfh = true,
352 .rf_id = true,
353 .gen2 = true,
356 .integrated = true,
358 .low_latency_xtal = true,
363 .mq_rx_supported = true,
364 .use_tfh = true,
365 .rf_id = true,
366 .gen2 = true,
373 .mq_rx_supported = true,
374 .use_tfh = true,
375 .rf_id = true,
376 .gen2 = true,
380 .integrated = true,
387 .mq_rx_supported = true,
388 .use_tfh = true,
389 .rf_id = true,
390 .gen2 = true,
394 .integrated = true,
395 .low_latency_xtal = true,
401 .mq_rx_supported = true,
402 .use_tfh = true,
403 .rf_id = true,
404 .gen2 = true,
408 .integrated = true,
409 .low_latency_xtal = true,
412 .imr_enabled = true,
470 .mq_rx_supported = true,
471 .use_tfh = true,
472 .rf_id = true,
473 .gen2 = true,
480 .mq_rx_supported = true,
481 .use_tfh = true,
482 .rf_id = true,
483 .gen2 = true,
484 .integrated = true,
491 .mq_rx_supported = true,
492 .use_tfh = true,
493 .rf_id = true,
494 .gen2 = true,
495 .integrated = true,
498 .low_latency_xtal = true,
543 .tx_with_siso_diversity = true,
581 .tx_with_siso_diversity = true,
619 .tx_with_siso_diversity = true,
748 .uhb_supported = true,
756 .uhb_supported = true,
760 .trans.low_latency_xtal = true,
766 .uhb_supported = true,
774 .uhb_supported = true,
782 .uhb_supported = true,
786 .trans.low_latency_xtal = true,
792 .uhb_supported = true,
800 .uhb_supported = true,
807 .uhb_supported = true,
814 .uhb_supported = true,
821 .uhb_supported = true,
828 .uhb_supported = true,
835 .uhb_supported = true,
842 .uhb_supported = true,
863 .uhb_supported = true,
870 .uhb_supported = true,
902 .uhb_supported = true,
909 .uhb_supported = true,
916 .uhb_supported = true,
923 .uhb_supported = true,
930 .uhb_supported = true,
937 .uhb_supported = true,
944 .uhb_supported = true,
951 .uhb_supported = true,
958 .uhb_supported = true,
965 .uhb_supported = true,
972 .uhb_supported = true,
979 .uhb_supported = true,
986 .uhb_supported = true,
993 .uhb_supported = true,
1000 .uhb_supported = true,