Lines Matching +full:0 +full:x300000
19 #define IWL_22000_NVM_VERSION 0x0a1d
22 #define IWL_22000_DCCM_OFFSET 0x800000 /* LMAC1 */
23 #define IWL_22000_DCCM_LEN 0x10000 /* LMAC1 */
24 #define IWL_22000_DCCM2_OFFSET 0x880000
25 #define IWL_22000_DCCM2_LEN 0x8000
26 #define IWL_22000_SMEM_OFFSET 0x400000
27 #define IWL_22000_SMEM_LEN 0xD0000
191 .mac_addr_from_csr = 0x380, \
199 .min_umac_error_event_table = 0x400000, \
200 .d3_debug_data_base_addr = 0x401000, \
217 .gp2_reg_addr = 0xa02c68, \
221 .mask = 0xffffffff, \
225 .mask = 0xffffffff, \
231 .trans.umac_prph_offset = 0x300000, \
235 .gp2_reg_addr = 0xd02c68, \
244 .mask = 0xffffffff, \
268 .mac_addr_from_csr = 0x30, \
276 .min_umac_error_event_table = 0x400000, \
277 .d3_debug_data_base_addr = 0x401000, \
289 .trans.umac_prph_offset = 0x300000, \
293 .gp2_reg_addr = 0xd02c68, \
302 .mask = 0xffffffff, \
369 .umac_prph_offset = 0x300000,
379 .umac_prph_offset = 0x300000,
393 .umac_prph_offset = 0x300000,
407 .umac_prph_offset = 0x300000,
485 .umac_prph_offset = 0x300000
496 .umac_prph_offset = 0x300000,