Lines Matching +full:0 +full:xfff00000
24 #define B43legacy_DMA32_TXCTL 0x00
25 #define B43legacy_DMA32_TXENABLE 0x00000001
26 #define B43legacy_DMA32_TXSUSPEND 0x00000002
27 #define B43legacy_DMA32_TXLOOPBACK 0x00000004
28 #define B43legacy_DMA32_TXFLUSH 0x00000010
29 #define B43legacy_DMA32_TXADDREXT_MASK 0x00030000
31 #define B43legacy_DMA32_TXRING 0x04
32 #define B43legacy_DMA32_TXINDEX 0x08
33 #define B43legacy_DMA32_TXSTATUS 0x0C
34 #define B43legacy_DMA32_TXDPTR 0x00000FFF
35 #define B43legacy_DMA32_TXSTATE 0x0000F000
36 #define B43legacy_DMA32_TXSTAT_DISABLED 0x00000000
37 #define B43legacy_DMA32_TXSTAT_ACTIVE 0x00001000
38 #define B43legacy_DMA32_TXSTAT_IDLEWAIT 0x00002000
39 #define B43legacy_DMA32_TXSTAT_STOPPED 0x00003000
40 #define B43legacy_DMA32_TXSTAT_SUSP 0x00004000
41 #define B43legacy_DMA32_TXERROR 0x000F0000
42 #define B43legacy_DMA32_TXERR_NOERR 0x00000000
43 #define B43legacy_DMA32_TXERR_PROT 0x00010000
44 #define B43legacy_DMA32_TXERR_UNDERRUN 0x00020000
45 #define B43legacy_DMA32_TXERR_BUFREAD 0x00030000
46 #define B43legacy_DMA32_TXERR_DESCREAD 0x00040000
47 #define B43legacy_DMA32_TXACTIVE 0xFFF00000
48 #define B43legacy_DMA32_RXCTL 0x10
49 #define B43legacy_DMA32_RXENABLE 0x00000001
50 #define B43legacy_DMA32_RXFROFF_MASK 0x000000FE
52 #define B43legacy_DMA32_RXDIRECTFIFO 0x00000100
53 #define B43legacy_DMA32_RXADDREXT_MASK 0x00030000
55 #define B43legacy_DMA32_RXRING 0x14
56 #define B43legacy_DMA32_RXINDEX 0x18
57 #define B43legacy_DMA32_RXSTATUS 0x1C
58 #define B43legacy_DMA32_RXDPTR 0x00000FFF
59 #define B43legacy_DMA32_RXSTATE 0x0000F000
60 #define B43legacy_DMA32_RXSTAT_DISABLED 0x00000000
61 #define B43legacy_DMA32_RXSTAT_ACTIVE 0x00001000
62 #define B43legacy_DMA32_RXSTAT_IDLEWAIT 0x00002000
63 #define B43legacy_DMA32_RXSTAT_STOPPED 0x00003000
64 #define B43legacy_DMA32_RXERROR 0x000F0000
65 #define B43legacy_DMA32_RXERR_NOERR 0x00000000
66 #define B43legacy_DMA32_RXERR_PROT 0x00010000
67 #define B43legacy_DMA32_RXERR_OVERFLOW 0x00020000
68 #define B43legacy_DMA32_RXERR_BUFWRITE 0x00030000
69 #define B43legacy_DMA32_RXERR_DESCREAD 0x00040000
70 #define B43legacy_DMA32_RXACTIVE 0xFFF00000
77 #define B43legacy_DMA32_DCTL_BYTECNT 0x00001FFF
78 #define B43legacy_DMA32_DCTL_ADDREXT_MASK 0x00030000
80 #define B43legacy_DMA32_DCTL_DTABLEEND 0x10000000
81 #define B43legacy_DMA32_DCTL_IRQ 0x20000000
82 #define B43legacy_DMA32_DCTL_FRAMEEND 0x40000000
83 #define B43legacy_DMA32_DCTL_FRAMESTART 0x80000000
89 #define B43legacy_DMA3_RX_FRAMEOFFSET 0
146 /* DMA controller index number (0-5). */
201 return 0; in b43legacy_dma_init()
211 return 0; in b43legacy_dma_tx()