Lines Matching +full:3 +full:- +full:31
1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2012-2016,2018-2019, The Linux Foundation. All rights reserved.
33 #define WIL_RX_EDMA_ERROR_REPLAY (3)
57 #define WIL_EDMA_DESC_TX_CFG_TSO_DESC_TYPE_POS 3
75 /* Enhanced Rx descriptor - MAC part
79 * [dword 3]
81 * bit 16..31 : Reserved
84 u32 d[3];
89 /* Enhanced Rx descriptor - DMA part
90 * [dword 0] - Reserved
92 * bit 0..31 : addr_low:32 The payload buffer address, bits 0-31
94 * bit 0..15 : addr_high_low:16 The payload buffer address, bits 32-47
95 * bit 16..31 : Reserved
96 * [dword 3]
97 * bit 0..15 : addr_high_high:16 The payload buffer address, bits 48-63
98 * bit 16..31 : length
113 /* Enhanced Tx descriptor - DMA part
117 * bit 0..31 : addr_low:32 The payload buffer address, bits 0-31
119 * bit 0..15 : addr_high_low:16 The payload buffer address, bits 32-47
123 * bit 31 : ip_version:1 1 - IPv4, 0 - IPv6
124 * [dword 3]
125 * bit 0..15 : addr_high_high:16 The payload buffer address, bits 48-63
126 * bit 16..31 : length
139 /* Enhanced Tx descriptor - MAC part
150 * bit 28..30 : reserved1:3
151 * bit 31 : sn_preserved:1
153 * bit 0.. 3 : pkt_mode:4
162 * bit 31 : max_retry_en:1
166 * bit 18..19 : l2_translation_type:2 00 - bypass, 01 - 802.3, 10 - 802.11
171 * bit 25..31 : reserved0:7
172 * [dword 3]
174 * bit 16..31 : descriptor_scratchpad:16 - mailbox between driver and ucode
177 u32 d[3];
191 * bit 0.. 7 : Number of Descriptor:8 - The number of descriptors that
196 * bit 16..23 : Status:8 - The TX status Code
197 * 0x0 - A successful transmission
198 * 0x1 - Retry expired
199 * 0x2 - Lifetime Expired
200 * 0x3 - Released
201 * 0x4-0xFF - Reserved
203 * bit 31 : Descriptor Ready bit:1 - It is initiated to
208 * bit 0..31 : timestamp:32 - Set when MPDU is transmitted.
210 * bit 0.. 4 : MCS:5 - The transmitted MCS value
212 * bit 6.. 7 : CB mode:2 - 0-DMG 1-EDMG 2-Wide
213 * bit 8..12 : QID:5 - The QID that was used for the transmission
214 * bit 13..15 : Reserved:3
215 * bit 16..20 : Num of MSDUs:5 - Number of MSDUs in the aggregation
217 * bit 23 : Retry:1 - An indication that the transmission was retried
218 * bit 24..31 : TX-Sector:8 - the antenna sector that was used for
220 * [dword 3]
221 * bit 0..11 : Sequence number:12 - The Sequence Number that was used
223 * bit 12..31 : Reserved:20
236 /* Enhanced Rx status message - compressed part
238 * bit 0.. 2 : L2 Rx Status:3 - The L2 packet reception Status
239 * 0-Success, 1-MIC Error, 2-Key Error, 3-Replay Error,
240 * 4-A-MSDU Error, 5-Reserved, 6-Reserved, 7-FCS Error
241 * bit 3.. 4 : L3 Rx Status:2 - Bit0 - L3I - L3 identified and checksum
242 * calculated, Bit1- L3Err - IPv4 Checksum Error
243 * bit 5.. 6 : L4 Rx Status:2 - Bit0 - L4I - L4 identified and checksum
244 * calculated, Bit1- L4Err - TCP/UDP Checksum Error
246 * bit 8..19 : Flow ID:12 - MSDU flow ID
247 * bit 20 : MID_V:1 - The MAC ID field is valid
248 * bit 21..22 : MID:2 - The MAC ID
249 * bit 23 : L3T:1 - IP types: 0-IPv6, 1-IPv4
250 * bit 24 : L4T:1 - Layer 4 Type: 0-UDP, 1-TCP
251 * bit 25 : BC:1 - The received MPDU is broadcast
252 * bit 26 : MC:1 - The received MPDU is multicast
253 * bit 27 : Raw:1 - The MPDU received with no translation
254 * bit 28 : Sec:1 - The FC control (b14) - Frame Protected
255 * bit 29 : Error:1 - An error is set when (L2 status != 0) ||
256 * (L3 status == 3) || (L4 status == 3)
257 * bit 30 : EOP:1 - End of MSDU signaling. It is set to mark the end
260 * bit 31 : Descriptor Ready bit:1 - It is initiated to
265 * bit 0.. 5 : MAC Len:6 - The number of bytes that are used for L2 header
266 * bit 6..11 : IPLEN:6 - The number of DW that are used for L3 header
267 * bit 12..15 : I4Len:4 - The number of DW that are used for L4 header
268 * bit 16..21 : MCS:6 - The received MCS field from the PLCP Header
269 * bit 22..23 : CB mode:2 - The CB Mode: 0-DMG, 1-EDMG, 2-Wide
270 * bit 24..27 : Data Offset:4 - The data offset, a code that describe the
272 * 0 - 0 Bytes, 3 - 2 Bytes
273 * bit 28 : A-MSDU Present:1 - The QoS (b7) A-MSDU present field
274 * bit 29 : A-MSDU Type:1 The QoS (b8) A-MSDU Type field
275 * bit 30 : A-MPDU:1 - Packet is part of aggregated MPDU
276 * bit 31 : Key ID:1 - The extracted Key ID from the encryption header
278 * bit 0..15 : Buffer ID:16 - The Buffer Identifier
279 * bit 16..31 : Length:16 - It indicates the valid bytes that are stored
283 * [dword 3]
284 * bit 0..31 : timestamp:32 - The MPDU Timestamp.
294 /* Enhanced Rx status message - extension part
296 * bit 0.. 4 : QID:5 - The Queue Identifier that the packet is received
298 * bit 5.. 7 : Reserved:3
299 * bit 8..11 : TID:4 - The QoS (b3-0) TID Field
300 * bit 12..15 Source index:4 - The Source index that was found
303 * bit 16..18 : Destination index:3 - The Destination index that
305 * bit 19..20 : DS Type:2 - The FC Control (b9-8) - From / To DS
306 * bit 21..22 : MIC ICR:2 - this signal tells the DMA to assert an
308 * bit 23 : ESOP:1 - The QoS (b4) ESOP field
310 * bit 25..31 : Reserved:7
312 * bit 0.. 1 : Frame Type:2 - The FC Control (b3-2) - MPDU Type
314 * bit 2.. 5 : Syb type:4 - The FC Control (b7-4) - Frame Subtype
315 * bit 6..11 : Ext sub type:6 - The FC Control (b11-8) - Frame Extended
317 * bit 12..13 : ACK Policy:2 - The QoS (b6-5) ACK Policy fields
318 * bit 14 : DECRYPT_BYP:1 - The MPDU is bypass by the decryption unit
320 * bit 24..31 : RSSI/SNR:8 - The RSSI / SNR measurement for the received
323 * bit 0..11 : SN:12 - The received Sequence number field
325 * bit 16..31 : PN bits [15:0]:16
326 * [dword 3]
327 * bit 0..31 : PN bits [47:16]:32
344 return (void *)skb->cb; in wil_skb_rxstatus()
349 return ((struct wil_rx_status_compressed *)msg)->length; in wil_rx_status_get_length()
354 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d1, in wil_rx_status_get_mcs()
360 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d1, in wil_rx_status_get_cb_mode()
366 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_flow_id()
372 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_mcast()
379 * src_id :3 - cid
380 * tid:3
409 /* TID is in bits 0..3 */ in wil_rx_status_get_tid()
415 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_eop()
422 (s->va + (s->elem_size * s->swhead)))->buff_id = 0; in wil_rx_status_reset_buff_id()
427 return ((struct wil_rx_status_compressed *)msg)->buff_id; in wil_rx_status_get_buff_id()
432 u8 val = WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d1, in wil_rx_status_get_data_offset()
437 case 3: return 2; in wil_rx_status_get_data_offset()
445 if (wil->use_compressed_rx_status) in wil_rx_status_get_frame_type()
448 return WIL_GET_BITS(((struct wil_rx_status_extended *)msg)->ext.d1, in wil_rx_status_get_frame_type()
454 if (wil->use_compressed_rx_status) in wil_rx_status_get_fc1()
457 return WIL_GET_BITS(((struct wil_rx_status_extended *)msg)->ext.d1, in wil_rx_status_get_fc1()
463 if (wil->use_compressed_rx_status) in wil_rx_status_get_seq()
466 return ((struct wil_rx_status_extended *)msg)->ext.seq_num; in wil_rx_status_get_seq()
477 if (!(((struct wil_rx_status_compressed *)msg)->d0 & in wil_rx_status_get_mid()
481 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_mid()
487 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_error()
493 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_l2_rx_status()
499 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_l3_rx_status()
500 3, 4); in wil_rx_status_get_l3_rx_status()
505 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_l4_rx_status()
517 * 3 0 Not a possible scenario.
518 * 3 1 Recalculate. It means that L3 protocol was found, and checksum
521 * 3 2 Both L3 and L4 checksum check failed.
539 /* If HW reports bad checksum, let IP stack re-check it in wil_rx_status_get_checksum()
541 * mis-calculates TCP checksum - if it should be 0x0, in wil_rx_status_get_checksum()
544 stats->rx_csum_err++; in wil_rx_status_get_checksum()
550 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d0, in wil_rx_status_get_security()
556 return WIL_GET_BITS(((struct wil_rx_status_compressed *)msg)->d1, in wil_rx_status_get_key_id()
557 31, 31); in wil_rx_status_get_key_id()
562 return WIL_GET_BITS(msg->d2, 0, 4); in wil_tx_status_get_mcs()
567 return (ring->swhead + 1) % ring->size; in wil_ring_next_head()
574 addr->addr_low = cpu_to_le32(lower_32_bits(pa)); in wil_desc_set_addr_edma()
575 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); in wil_desc_set_addr_edma()
582 return le32_to_cpu(dma->addr.addr_low) | in wil_tx_desc_get_addr_edma()
583 ((u64)le16_to_cpu(dma->addr.addr_high) << 32) | in wil_tx_desc_get_addr_edma()
584 ((u64)le16_to_cpu(dma->addr_high_high) << 48); in wil_tx_desc_get_addr_edma()
590 return le32_to_cpu(dma->addr.addr_low) | in wil_rx_desc_get_addr_edma()
591 ((u64)le16_to_cpu(dma->addr.addr_high) << 32) | in wil_rx_desc_get_addr_edma()
592 ((u64)le16_to_cpu(dma->addr_high_high) << 48); in wil_rx_desc_get_addr_edma()