Lines Matching +full:0 +full:x3f000000
30 AR_RTSCTSQual##_index : 0))
34 AR_2040_##_index : 0) \
36 AR_GI##_index : 0) \
38 AR_STBC##_index : 0))
71 #define ATH9K_TXERR_XRETRY 0x01
72 #define ATH9K_TXERR_FILT 0x02
73 #define ATH9K_TXERR_FIFO 0x04
74 #define ATH9K_TXERR_XTXOP 0x08
75 #define ATH9K_TXERR_TIMER_EXPIRED 0x10
76 #define ATH9K_TX_ACKED 0x20
77 #define ATH9K_TX_FLUSH 0x40
82 #define ATH9K_TX_BA 0x01
83 #define ATH9K_TX_PWRMGMT 0x02
84 #define ATH9K_TX_DESC_CFG_ERR 0x04
85 #define ATH9K_TX_DATA_UNDERRUN 0x08
86 #define ATH9K_TX_DELIM_UNDERRUN 0x10
87 #define ATH9K_TX_SW_FILTERED 0x80
90 #define MIN_TX_FIFO_THRESHOLD 0x1
176 #define ATH9K_RXERR_CRC 0x01
177 #define ATH9K_RXERR_PHY 0x02
178 #define ATH9K_RXERR_FIFO 0x04
179 #define ATH9K_RXERR_DECRYPT 0x08
180 #define ATH9K_RXERR_MIC 0x10
181 #define ATH9K_RXERR_KEYMISS 0x20
182 #define ATH9K_RXERR_CORRUPT_DESC 0x40
184 #define ATH9K_RX_MORE 0x01
185 #define ATH9K_RX_MORE_AGGR 0x02
186 #define ATH9K_RX_GI 0x04
187 #define ATH9K_RX_2040 0x08
188 #define ATH9K_RX_DELIM_CRC_PRE 0x10
189 #define ATH9K_RX_DELIM_CRC_POST 0x20
190 #define ATH9K_RX_DECRYPT_BUSY 0x40
196 ATH9K_PHYERR_UNDERRUN = 0, /* Transmit underrun */
243 #define ATH9K_TXDESC_NOACK 0x0002
244 #define ATH9K_TXDESC_RTSENA 0x0004
245 #define ATH9K_TXDESC_CTSENA 0x0008
259 #define ATH9K_TXDESC_INTREQ 0x0010
260 #define ATH9K_TXDESC_VEOL 0x0020
261 #define ATH9K_TXDESC_EXT_ONLY 0x0040
262 #define ATH9K_TXDESC_EXT_AND_CTL 0x0080
263 #define ATH9K_TXDESC_VMF 0x0100
264 #define ATH9K_TXDESC_FRAG_IS_ON 0x0200
265 #define ATH9K_TXDESC_LOWRXCHAIN 0x0400
266 #define ATH9K_TXDESC_LDPC 0x0800
267 #define ATH9K_TXDESC_CLRDMASK 0x1000
269 #define ATH9K_TXDESC_PAPRD 0x70000
272 #define ATH9K_RXDESC_INTREQ 0x0020
351 #define AR_FrameLen 0x00000fff
352 #define AR_VirtMoreFrag 0x00001000
353 #define AR_TxCtlRsvd00 0x0000e000
354 #define AR_XmitPower0 0x003f0000
356 #define AR_XmitPower1 0x3f000000
358 #define AR_XmitPower2 0x3f000000
360 #define AR_XmitPower3 0x3f000000
362 #define AR_RTSEnable 0x00400000
363 #define AR_VEOL 0x00800000
364 #define AR_ClrDestMask 0x01000000
365 #define AR_TxCtlRsvd01 0x1e000000
366 #define AR_TxIntrReq 0x20000000
367 #define AR_DestIdxValid 0x40000000
368 #define AR_CTSEnable 0x80000000
370 #define AR_TxMore 0x00001000
371 #define AR_DestIdx 0x000fe000
373 #define AR_FrameType 0x00f00000
375 #define AR_NoAck 0x01000000
376 #define AR_InsertTS 0x02000000
377 #define AR_CorruptFCS 0x04000000
378 #define AR_ExtOnly 0x08000000
379 #define AR_ExtAndCtl 0x10000000
380 #define AR_MoreAggr 0x20000000
381 #define AR_IsAggr 0x40000000
383 #define AR_BurstDur 0x00007fff
384 #define AR_BurstDur_S 0
385 #define AR_DurUpdateEna 0x00008000
386 #define AR_XmitDataTries0 0x000f0000
388 #define AR_XmitDataTries1 0x00f00000
390 #define AR_XmitDataTries2 0x0f000000
392 #define AR_XmitDataTries3 0xf0000000
395 #define AR_XmitRate0 0x000000ff
396 #define AR_XmitRate0_S 0
397 #define AR_XmitRate1 0x0000ff00
399 #define AR_XmitRate2 0x00ff0000
401 #define AR_XmitRate3 0xff000000
404 #define AR_PacketDur0 0x00007fff
405 #define AR_PacketDur0_S 0
406 #define AR_RTSCTSQual0 0x00008000
407 #define AR_PacketDur1 0x7fff0000
409 #define AR_RTSCTSQual1 0x80000000
411 #define AR_PacketDur2 0x00007fff
412 #define AR_PacketDur2_S 0
413 #define AR_RTSCTSQual2 0x00008000
414 #define AR_PacketDur3 0x7fff0000
416 #define AR_RTSCTSQual3 0x80000000
418 #define AR_AggrLen 0x0000ffff
419 #define AR_AggrLen_S 0
420 #define AR_TxCtlRsvd60 0x00030000
421 #define AR_PadDelim 0x03fc0000
423 #define AR_EncrType 0x0c000000
425 #define AR_TxCtlRsvd61 0xf0000000
426 #define AR_LDPC 0x80000000
428 #define AR_2040_0 0x00000001
429 #define AR_GI0 0x00000002
430 #define AR_ChainSel0 0x0000001c
432 #define AR_2040_1 0x00000020
433 #define AR_GI1 0x00000040
434 #define AR_ChainSel1 0x00000380
436 #define AR_2040_2 0x00000400
437 #define AR_GI2 0x00000800
438 #define AR_ChainSel2 0x00007000
440 #define AR_2040_3 0x00008000
441 #define AR_GI3 0x00010000
442 #define AR_ChainSel3 0x000e0000
444 #define AR_RTSCTSRate 0x0ff00000
446 #define AR_STBC0 0x10000000
447 #define AR_STBC1 0x20000000
448 #define AR_STBC2 0x40000000
449 #define AR_STBC3 0x80000000
451 #define AR_TxRSSIAnt00 0x000000ff
452 #define AR_TxRSSIAnt00_S 0
453 #define AR_TxRSSIAnt01 0x0000ff00
455 #define AR_TxRSSIAnt02 0x00ff0000
457 #define AR_TxStatusRsvd00 0x3f000000
458 #define AR_TxBaStatus 0x40000000
459 #define AR_TxStatusRsvd01 0x80000000
466 #define AR_FrmXmitOK 0x00000001
467 #define AR_ExcessiveRetries 0x00000002
468 #define AR_FIFOUnderrun 0x00000004
469 #define AR_Filtered 0x00000008
470 #define AR_RTSFailCnt 0x000000f0
472 #define AR_DataFailCnt 0x00000f00
474 #define AR_VirtRetryCnt 0x0000f000
476 #define AR_TxDelimUnderrun 0x00010000
477 #define AR_TxDataUnderrun 0x00020000
478 #define AR_DescCfgErr 0x00040000
479 #define AR_TxTimerExpired 0x00080000
480 #define AR_TxStatusRsvd10 0xfff00000
486 #define AR_TxRSSIAnt10 0x000000ff
487 #define AR_TxRSSIAnt10_S 0
488 #define AR_TxRSSIAnt11 0x0000ff00
490 #define AR_TxRSSIAnt12 0x00ff0000
492 #define AR_TxRSSICombined 0xff000000
495 #define AR_TxTid 0xf0000000
502 #define AR_TxDone 0x00000001
503 #define AR_SeqNum 0x00001ffe
505 #define AR_TxStatusRsvd80 0x0001e000
506 #define AR_TxOpExceeded 0x00020000
507 #define AR_TxStatusRsvd81 0x001c0000
508 #define AR_FinalTxIdx 0x00600000
510 #define AR_TxStatusRsvd82 0x01800000
511 #define AR_PowerMgmt 0x02000000
512 #define AR_TxStatusRsvd83 0xfc000000
514 #define AR_RxCTLRsvd00 0xffffffff
516 #define AR_RxCtlRsvd00 0x00001000
517 #define AR_RxIntrReq 0x00002000
518 #define AR_RxCtlRsvd01 0xffffc000
520 #define AR_RxRSSIAnt00 0x000000ff
521 #define AR_RxRSSIAnt00_S 0
522 #define AR_RxRSSIAnt01 0x0000ff00
524 #define AR_RxRSSIAnt02 0x00ff0000
526 #define AR_RxRate 0xff000000
528 #define AR_RxStatusRsvd00 0xff000000
530 #define AR_DataLen 0x00000fff
531 #define AR_RxMore 0x00001000
532 #define AR_NumDelim 0x003fc000
534 #define AR_RxStatusRsvd10 0xff800000
538 #define AR_GI 0x00000001
539 #define AR_2040 0x00000002
540 #define AR_Parallel40 0x00000004
542 #define AR_STBC 0x00000008 /* on ar9280 and later */
543 #define AR_RxStatusRsvd30 0x000000f0
544 #define AR_RxAntenna 0xffffff00
547 #define AR_RxRSSIAnt10 0x000000ff
548 #define AR_RxRSSIAnt10_S 0
549 #define AR_RxRSSIAnt11 0x0000ff00
551 #define AR_RxRSSIAnt12 0x00ff0000
553 #define AR_RxRSSICombined 0xff000000
560 #define AR_RxDone 0x00000001
561 #define AR_RxFrameOK 0x00000002
562 #define AR_CRCErr 0x00000004
563 #define AR_DecryptCRCErr 0x00000008
564 #define AR_PHYErr 0x00000010
565 #define AR_MichaelErr 0x00000020
566 #define AR_PreDelimCRCErr 0x00000040
567 #define AR_RxStatusRsvd70 0x00000080
568 #define AR_RxKeyIdxValid 0x00000100
569 #define AR_KeyIdx 0x0000fe00
571 #define AR_PHYErrCode 0x0000ff00
573 #define AR_RxMoreAggr 0x00010000
574 #define AR_RxAggr 0x00020000
575 #define AR_PostDelimCRCErr 0x00040000
576 #define AR_RxStatusRsvd71 0x3ff80000
577 #define AR_RxFirstAggr 0x20000000
578 #define AR_DecryptBusyErr 0x40000000
579 #define AR_KeyMiss 0x80000000
582 ATH9K_TX_QUEUE_INACTIVE = 0,
596 TXQ_FLAG_TXINT_ENABLE = 0x0001,
597 TXQ_FLAG_TXDESCINT_ENABLE = 0x0002,
598 TXQ_FLAG_TXEOLINT_ENABLE = 0x0004,
599 TXQ_FLAG_TXURNINT_ENABLE = 0x0008,
600 TXQ_FLAG_BACKOFF_DISABLE = 0x0010,
601 TXQ_FLAG_COMPRESSION_ENABLE = 0x0020,
602 TXQ_FLAG_RDYTIME_EXP_POLICY_ENABLE = 0x0040,
603 TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE = 0x0080,
607 #define ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS 0x00000001
612 ATH9K_PKT_TYPE_NORMAL = 0,
641 ATH9K_RX_FILTER_UCAST = 0x00000001,
642 ATH9K_RX_FILTER_MCAST = 0x00000002,
643 ATH9K_RX_FILTER_BCAST = 0x00000004,
644 ATH9K_RX_FILTER_CONTROL = 0x00000008,
645 ATH9K_RX_FILTER_BEACON = 0x00000010,
646 ATH9K_RX_FILTER_PROM = 0x00000020,
647 ATH9K_RX_FILTER_PROBEREQ = 0x00000080,
648 ATH9K_RX_FILTER_PHYERR = 0x00000100,
649 ATH9K_RX_FILTER_MYBEACON = 0x00000200,
650 ATH9K_RX_FILTER_COMP_BAR = 0x00000400,
651 ATH9K_RX_FILTER_COMP_BA = 0x00000800,
652 ATH9K_RX_FILTER_UNCOMP_BA_BAR = 0x00001000,
653 ATH9K_RX_FILTER_PSPOLL = 0x00004000,
654 ATH9K_RX_FILTER_PHYRADAR = 0x00002000,
655 ATH9K_RX_FILTER_MCAST_BCAST_ALL = 0x00008000,
656 ATH9K_RX_FILTER_CONTROL_WRAPPER = 0x00080000,
657 ATH9K_RX_FILTER_4ADDRESS = 0x00100000,
660 #define ATH9K_RATESERIES_RTS_CTS 0x0001
661 #define ATH9K_RATESERIES_2040 0x0002
662 #define ATH9K_RATESERIES_HALFGI 0x0004
663 #define ATH9K_RATESERIES_STBC 0x0008