Lines Matching +full:txpower +full:-
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
25 u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version); in ath9k_hw_ar9287_get_eeprom_ver()
33 u16 version = le16_to_cpu(ah->eeprom.map9287.baseEepHeader.version); in ath9k_hw_ar9287_get_eeprom_rev()
40 struct ar9287_eeprom *eep = &ah->eeprom.map9287; in __ath9k_hw_ar9287_fill_eeprom()
56 u16 *eep_data = (u16 *)&ah->eeprom.map9287; in __ath9k_hw_usb_ar9287_fill_eeprom()
72 if (common->bus_ops->ath_bus_type == ATH_USB) in ath9k_hw_ar9287_fill_eeprom()
82 PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0])); in ar9287_dump_modal_eeprom()
83 PR_EEP("Chain1 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[1])); in ar9287_dump_modal_eeprom()
84 PR_EEP("Ant. Common Control", le32_to_cpu(modal_hdr->antCtrlCommon)); in ar9287_dump_modal_eeprom()
85 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); in ar9287_dump_modal_eeprom()
86 PR_EEP("Chain1 Ant. Gain", modal_hdr->antennaGainCh[1]); in ar9287_dump_modal_eeprom()
87 PR_EEP("Switch Settle", modal_hdr->switchSettling); in ar9287_dump_modal_eeprom()
88 PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]); in ar9287_dump_modal_eeprom()
89 PR_EEP("Chain1 TxRxAtten", modal_hdr->txRxAttenCh[1]); in ar9287_dump_modal_eeprom()
90 PR_EEP("Chain0 RxTxMargin", modal_hdr->rxTxMarginCh[0]); in ar9287_dump_modal_eeprom()
91 PR_EEP("Chain1 RxTxMargin", modal_hdr->rxTxMarginCh[1]); in ar9287_dump_modal_eeprom()
92 PR_EEP("ADC Desired size", modal_hdr->adcDesiredSize); in ar9287_dump_modal_eeprom()
93 PR_EEP("txEndToXpaOff", modal_hdr->txEndToXpaOff); in ar9287_dump_modal_eeprom()
94 PR_EEP("txEndToRxOn", modal_hdr->txEndToRxOn); in ar9287_dump_modal_eeprom()
95 PR_EEP("txFrameToXpaOn", modal_hdr->txFrameToXpaOn); in ar9287_dump_modal_eeprom()
96 PR_EEP("CCA Threshold)", modal_hdr->thresh62); in ar9287_dump_modal_eeprom()
97 PR_EEP("Chain0 NF Threshold", modal_hdr->noiseFloorThreshCh[0]); in ar9287_dump_modal_eeprom()
98 PR_EEP("Chain1 NF Threshold", modal_hdr->noiseFloorThreshCh[1]); in ar9287_dump_modal_eeprom()
99 PR_EEP("xpdGain", modal_hdr->xpdGain); in ar9287_dump_modal_eeprom()
100 PR_EEP("External PD", modal_hdr->xpd); in ar9287_dump_modal_eeprom()
101 PR_EEP("Chain0 I Coefficient", modal_hdr->iqCalICh[0]); in ar9287_dump_modal_eeprom()
102 PR_EEP("Chain1 I Coefficient", modal_hdr->iqCalICh[1]); in ar9287_dump_modal_eeprom()
103 PR_EEP("Chain0 Q Coefficient", modal_hdr->iqCalQCh[0]); in ar9287_dump_modal_eeprom()
104 PR_EEP("Chain1 Q Coefficient", modal_hdr->iqCalQCh[1]); in ar9287_dump_modal_eeprom()
105 PR_EEP("pdGainOverlap", modal_hdr->pdGainOverlap); in ar9287_dump_modal_eeprom()
106 PR_EEP("xPA Bias Level", modal_hdr->xpaBiasLvl); in ar9287_dump_modal_eeprom()
107 PR_EEP("txFrameToDataStart", modal_hdr->txFrameToDataStart); in ar9287_dump_modal_eeprom()
108 PR_EEP("txFrameToPaOn", modal_hdr->txFrameToPaOn); in ar9287_dump_modal_eeprom()
109 PR_EEP("HT40 Power Inc.", modal_hdr->ht40PowerIncForPdadc); in ar9287_dump_modal_eeprom()
110 PR_EEP("Chain0 bswAtten", modal_hdr->bswAtten[0]); in ar9287_dump_modal_eeprom()
111 PR_EEP("Chain1 bswAtten", modal_hdr->bswAtten[1]); in ar9287_dump_modal_eeprom()
112 PR_EEP("Chain0 bswMargin", modal_hdr->bswMargin[0]); in ar9287_dump_modal_eeprom()
113 PR_EEP("Chain1 bswMargin", modal_hdr->bswMargin[1]); in ar9287_dump_modal_eeprom()
114 PR_EEP("HT40 Switch Settle", modal_hdr->swSettleHt40); in ar9287_dump_modal_eeprom()
115 PR_EEP("AR92x7 Version", modal_hdr->version); in ar9287_dump_modal_eeprom()
116 PR_EEP("DriverBias1", modal_hdr->db1); in ar9287_dump_modal_eeprom()
117 PR_EEP("DriverBias2", modal_hdr->db1); in ar9287_dump_modal_eeprom()
118 PR_EEP("CCK OutputBias", modal_hdr->ob_cck); in ar9287_dump_modal_eeprom()
119 PR_EEP("PSK OutputBias", modal_hdr->ob_psk); in ar9287_dump_modal_eeprom()
120 PR_EEP("QAM OutputBias", modal_hdr->ob_qam); in ar9287_dump_modal_eeprom()
121 PR_EEP("PAL_OFF OutputBias", modal_hdr->ob_pal_off); in ar9287_dump_modal_eeprom()
129 struct ar9287_eeprom *eep = &ah->eeprom.map9287; in ath9k_hw_ar9287_dump_eeprom()
130 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; in ath9k_hw_ar9287_dump_eeprom()
131 u32 binBuildNumber = le32_to_cpu(pBase->binBuildNumber); in ath9k_hw_ar9287_dump_eeprom()
134 len += scnprintf(buf + len, size - len, in ath9k_hw_ar9287_dump_eeprom()
137 &eep->modalHeader); in ath9k_hw_ar9287_dump_eeprom()
143 PR_EEP("Checksum", le16_to_cpu(pBase->checksum)); in ath9k_hw_ar9287_dump_eeprom()
144 PR_EEP("Length", le16_to_cpu(pBase->length)); in ath9k_hw_ar9287_dump_eeprom()
145 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); in ath9k_hw_ar9287_dump_eeprom()
146 PR_EEP("RegDomain2", le16_to_cpu(pBase->regDmn[1])); in ath9k_hw_ar9287_dump_eeprom()
147 PR_EEP("TX Mask", pBase->txMask); in ath9k_hw_ar9287_dump_eeprom()
148 PR_EEP("RX Mask", pBase->rxMask); in ath9k_hw_ar9287_dump_eeprom()
149 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11A)); in ath9k_hw_ar9287_dump_eeprom()
150 PR_EEP("Allow 2GHz", !!(pBase->opCapFlags & AR5416_OPFLAGS_11G)); in ath9k_hw_ar9287_dump_eeprom()
151 PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
153 PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
155 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
157 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags & in ath9k_hw_ar9287_dump_eeprom()
159 PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN)); in ath9k_hw_ar9287_dump_eeprom()
163 PR_EEP("Power Table Offset", pBase->pwrTableOffset); in ath9k_hw_ar9287_dump_eeprom()
164 PR_EEP("OpenLoop Power Ctrl", pBase->openLoopPwrCntl); in ath9k_hw_ar9287_dump_eeprom()
166 len += scnprintf(buf + len, size - len, "%20s : %pM\n", "MacAddress", in ath9k_hw_ar9287_dump_eeprom()
167 pBase->macAddr); in ath9k_hw_ar9287_dump_eeprom()
189 struct ar9287_eeprom *eep = &ah->eeprom.map9287; in ath9k_hw_ar9287_check_eeprom()
196 el = swab16((__force u16)eep->baseEepHeader.length); in ath9k_hw_ar9287_check_eeprom()
198 el = le16_to_cpu(eep->baseEepHeader.length); in ath9k_hw_ar9287_check_eeprom()
202 return -EINVAL; in ath9k_hw_ar9287_check_eeprom()
205 EEPROM_FIELD_SWAB16(eep->baseEepHeader.length); in ath9k_hw_ar9287_check_eeprom()
206 EEPROM_FIELD_SWAB16(eep->baseEepHeader.checksum); in ath9k_hw_ar9287_check_eeprom()
207 EEPROM_FIELD_SWAB16(eep->baseEepHeader.version); in ath9k_hw_ar9287_check_eeprom()
208 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]); in ath9k_hw_ar9287_check_eeprom()
209 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[1]); in ath9k_hw_ar9287_check_eeprom()
210 EEPROM_FIELD_SWAB16(eep->baseEepHeader.rfSilent); in ath9k_hw_ar9287_check_eeprom()
211 EEPROM_FIELD_SWAB16(eep->baseEepHeader.blueToothOptions); in ath9k_hw_ar9287_check_eeprom()
212 EEPROM_FIELD_SWAB16(eep->baseEepHeader.deviceCap); in ath9k_hw_ar9287_check_eeprom()
213 EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlCommon); in ath9k_hw_ar9287_check_eeprom()
216 EEPROM_FIELD_SWAB32(eep->modalHeader.antCtrlChain[i]); in ath9k_hw_ar9287_check_eeprom()
220 eep->modalHeader.spurChans[i].spurChan); in ath9k_hw_ar9287_check_eeprom()
225 return -EINVAL; in ath9k_hw_ar9287_check_eeprom()
235 struct ar9287_eeprom *eep = &ah->eeprom.map9287; in ath9k_hw_ar9287_get_eeprom()
236 struct modal_eep_ar9287_header *pModal = &eep->modalHeader; in ath9k_hw_ar9287_get_eeprom()
237 struct base_eep_ar9287_header *pBase = &eep->baseEepHeader; in ath9k_hw_ar9287_get_eeprom()
242 return pModal->noiseFloorThreshCh[0]; in ath9k_hw_ar9287_get_eeprom()
244 return get_unaligned_be16(pBase->macAddr); in ath9k_hw_ar9287_get_eeprom()
246 return get_unaligned_be16(pBase->macAddr + 2); in ath9k_hw_ar9287_get_eeprom()
248 return get_unaligned_be16(pBase->macAddr + 4); in ath9k_hw_ar9287_get_eeprom()
250 return le16_to_cpu(pBase->regDmn[0]); in ath9k_hw_ar9287_get_eeprom()
252 return le16_to_cpu(pBase->deviceCap); in ath9k_hw_ar9287_get_eeprom()
254 return pBase->opCapFlags; in ath9k_hw_ar9287_get_eeprom()
256 return le16_to_cpu(pBase->rfSilent); in ath9k_hw_ar9287_get_eeprom()
258 return pBase->txMask; in ath9k_hw_ar9287_get_eeprom()
260 return pBase->rxMask; in ath9k_hw_ar9287_get_eeprom()
262 return pBase->deviceType; in ath9k_hw_ar9287_get_eeprom()
264 return pBase->openLoopPwrCntl; in ath9k_hw_ar9287_get_eeprom()
267 return pBase->tempSensSlope; in ath9k_hw_ar9287_get_eeprom()
272 return pBase->tempSensSlopePalOn; in ath9k_hw_ar9287_get_eeprom()
276 return max_t(u8, pModal->antennaGainCh[0], in ath9k_hw_ar9287_get_eeprom()
277 pModal->antennaGainCh[1]); in ath9k_hw_ar9287_get_eeprom()
313 int32_t txPower, u16 chain) in ar9287_eeprom_olpc_set_pdadcs() argument
337 a = (txPower)&0xff; in ar9287_eeprom_olpc_set_pdadcs()
347 a = (txPower)&0xff; in ar9287_eeprom_olpc_set_pdadcs()
367 struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; in ath9k_hw_set_ar9287_power_cal_table()
369 xpdMask = pEepData->modalHeader.xpdGain; in ath9k_hw_set_ar9287_power_cal_table()
372 pdGainOverlap_t2 = pEepData->modalHeader.pdGainOverlap; in ath9k_hw_set_ar9287_power_cal_table()
378 pCalBChans = pEepData->calFreqPier2G; in ath9k_hw_set_ar9287_power_cal_table()
382 (struct cal_data_op_loop_ar9287 *)pEepData->calPierData2G[0]; in ath9k_hw_set_ar9287_power_cal_table()
383 ah->initPDADC = pRawDatasetOpenLoop->vpdPdg[0][0]; in ath9k_hw_set_ar9287_power_cal_table()
391 if ((xpdMask >> (AR5416_PD_GAINS_IN_MASK - i)) & 1) { in ath9k_hw_set_ar9287_power_cal_table()
395 (u16)(AR5416_PD_GAINS_IN_MASK-i); in ath9k_hw_set_ar9287_power_cal_table()
401 (numXpdGain - 1) & 0x3); in ath9k_hw_set_ar9287_power_cal_table()
412 if (pEepData->baseEepHeader.txMask & (1 << i)) { in ath9k_hw_set_ar9287_power_cal_table()
414 (struct cal_data_op_loop_ar9287 *)pEepData->calPierData2G[i]; in ath9k_hw_set_ar9287_power_cal_table()
417 int8_t txPower; in ath9k_hw_set_ar9287_power_cal_table() local
421 &txPower); in ath9k_hw_set_ar9287_power_cal_table()
422 ar9287_eeprom_olpc_set_pdadcs(ah, txPower, i); in ath9k_hw_set_ar9287_power_cal_table()
426 pEepData->calPierData2G[i]; in ath9k_hw_set_ar9287_power_cal_table()
461 pEepData->baseEepHeader.pwrTableOffset) { in ath9k_hw_set_ar9287_power_cal_table()
462 diff = (u16)(pEepData->baseEepHeader.pwrTableOffset - in ath9k_hw_set_ar9287_power_cal_table()
466 for (j = 0; j < ((u16)AR5416_NUM_PDADC_VALUES-diff); j++) in ath9k_hw_set_ar9287_power_cal_table()
469 for (j = (u16)(AR5416_NUM_PDADC_VALUES-diff); in ath9k_hw_set_ar9287_power_cal_table()
472 pdadcValues[AR5416_NUM_PDADC_VALUES-diff]; in ath9k_hw_set_ar9287_power_cal_table()
500 pEepData->ctlIndex[i]) in ath9k_hw_set_ar9287_power_per_rate_table()
504 ((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL)) in ath9k_hw_set_ar9287_power_per_rate_table()
526 struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; in ath9k_hw_set_ar9287_power_per_rate_table()
527 tx_chainmask = ah->txchainmask; in ath9k_hw_set_ar9287_power_per_rate_table()
539 ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40; in ath9k_hw_set_ar9287_power_per_rate_table()
544 pEepData->calTargetPowerCck, in ath9k_hw_set_ar9287_power_per_rate_table()
548 pEepData->calTargetPower2G, in ath9k_hw_set_ar9287_power_per_rate_table()
552 pEepData->calTargetPower2GHT20, in ath9k_hw_set_ar9287_power_per_rate_table()
560 pEepData->calTargetPower2GHT40, in ath9k_hw_set_ar9287_power_per_rate_table()
564 pEepData->calTargetPowerCck, in ath9k_hw_set_ar9287_power_per_rate_table()
568 pEepData->calTargetPower2G, in ath9k_hw_set_ar9287_power_per_rate_table()
587 for (i = 0; (i < AR9287_NUM_CTLS) && pEepData->ctlIndex[i]; i++) { in ath9k_hw_set_ar9287_power_per_rate_table()
595 rep = &(pEepData->ctlData[i]); in ath9k_hw_set_ar9287_power_per_rate_table()
597 rep->ctlEdges[ar5416_get_ntxchains(tx_chainmask) - 1]; in ath9k_hw_set_ar9287_power_per_rate_table()
712 struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; in ath9k_hw_ar9287_set_txpower()
713 struct modal_eep_ar9287_header *pModal = &pEepData->modalHeader; in ath9k_hw_ar9287_set_txpower()
721 ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc; in ath9k_hw_ar9287_set_txpower()
730 regulatory->max_power_level = 0; in ath9k_hw_ar9287_set_txpower()
735 if (ratesArray[i] > regulatory->max_power_level) in ath9k_hw_ar9287_set_txpower()
736 regulatory->max_power_level = ratesArray[i]; in ath9k_hw_ar9287_set_txpower()
745 ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; in ath9k_hw_ar9287_set_txpower()
834 if (ah->tpc_enabled) { in ath9k_hw_ar9287_set_txpower()
853 struct ar9287_eeprom *eep = &ah->eeprom.map9287; in ath9k_hw_ar9287_set_board_values()
854 struct modal_eep_ar9287_header *pModal = &eep->modalHeader; in ath9k_hw_ar9287_set_board_values()
859 pModal = &eep->modalHeader; in ath9k_hw_ar9287_set_board_values()
861 REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon)); in ath9k_hw_ar9287_set_board_values()
867 le32_to_cpu(pModal->antCtrlChain[i])); in ath9k_hw_ar9287_set_board_values()
873 SM(pModal->iqCalICh[i], in ath9k_hw_ar9287_set_board_values()
875 SM(pModal->iqCalQCh[i], in ath9k_hw_ar9287_set_board_values()
878 txRxAttenLocal = pModal->txRxAttenCh[i]; in ath9k_hw_ar9287_set_board_values()
882 pModal->bswMargin[i]); in ath9k_hw_ar9287_set_board_values()
885 pModal->bswAtten[i]); in ath9k_hw_ar9287_set_board_values()
891 pModal->rxTxMarginCh[i]); in ath9k_hw_ar9287_set_board_values()
897 AR_PHY_SETTLING_SWITCH, pModal->swSettleHt40); in ath9k_hw_ar9287_set_board_values()
900 AR_PHY_SETTLING_SWITCH, pModal->switchSettling); in ath9k_hw_ar9287_set_board_values()
903 AR_PHY_DESIRED_SZ_ADC, pModal->adcDesiredSize); in ath9k_hw_ar9287_set_board_values()
906 SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAA_OFF) in ath9k_hw_ar9287_set_board_values()
907 | SM(pModal->txEndToXpaOff, AR_PHY_RF_CTL4_TX_END_XPAB_OFF) in ath9k_hw_ar9287_set_board_values()
908 | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAA_ON) in ath9k_hw_ar9287_set_board_values()
909 | SM(pModal->txFrameToXpaOn, AR_PHY_RF_CTL4_FRAME_XPAB_ON)); in ath9k_hw_ar9287_set_board_values()
912 AR_PHY_TX_END_TO_A2_RX_ON, pModal->txEndToRxOn); in ath9k_hw_ar9287_set_board_values()
915 AR9280_PHY_CCA_THRESH62, pModal->thresh62); in ath9k_hw_ar9287_set_board_values()
917 AR_PHY_EXT_CCA0_THRESH62, pModal->thresh62); in ath9k_hw_ar9287_set_board_values()
926 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | in ath9k_hw_ar9287_set_board_values()
927 SM(pModal->db2, AR9287_AN_RF2G3_DB2) | in ath9k_hw_ar9287_set_board_values()
928 SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) | in ath9k_hw_ar9287_set_board_values()
929 SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) | in ath9k_hw_ar9287_set_board_values()
930 SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) | in ath9k_hw_ar9287_set_board_values()
931 SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF)); in ath9k_hw_ar9287_set_board_values()
942 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | in ath9k_hw_ar9287_set_board_values()
943 SM(pModal->db2, AR9287_AN_RF2G3_DB2) | in ath9k_hw_ar9287_set_board_values()
944 SM(pModal->ob_cck, AR9287_AN_RF2G3_OB_CCK) | in ath9k_hw_ar9287_set_board_values()
945 SM(pModal->ob_psk, AR9287_AN_RF2G3_OB_PSK) | in ath9k_hw_ar9287_set_board_values()
946 SM(pModal->ob_qam, AR9287_AN_RF2G3_OB_QAM) | in ath9k_hw_ar9287_set_board_values()
947 SM(pModal->ob_pal_off, AR9287_AN_RF2G3_OB_PAL_OFF)); in ath9k_hw_ar9287_set_board_values()
952 AR_PHY_TX_END_DATA_START, pModal->txFrameToDataStart); in ath9k_hw_ar9287_set_board_values()
954 AR_PHY_TX_END_PA_ON, pModal->txFrameToPaOn); in ath9k_hw_ar9287_set_board_values()
959 pModal->xpaBiasLvl); in ath9k_hw_ar9287_set_board_values()
965 __le16 spur_ch = ah->eeprom.map9287.modalHeader.spurChans[i].spurChan; in ath9k_hw_ar9287_get_spur_channel()
972 return ah->eeprom.map9287.baseEepHeader.eepMisc; in ath9k_hw_ar9287_get_eepmisc()