Lines Matching +full:0 +full:xb270
45 for (addr = 0; addr < SIZE_EEPROM_AR9287; addr++) { in __ath9k_hw_ar9287_fill_eeprom()
82 PR_EEP("Chain0 Ant. Control", le16_to_cpu(modal_hdr->antCtrlChain[0])); in ar9287_dump_modal_eeprom()
85 PR_EEP("Chain0 Ant. Gain", modal_hdr->antennaGainCh[0]); in ar9287_dump_modal_eeprom()
88 PR_EEP("Chain0 TxRxAtten", modal_hdr->txRxAttenCh[0]); in ar9287_dump_modal_eeprom()
90 PR_EEP("Chain0 RxTxMargin", modal_hdr->rxTxMarginCh[0]); in ar9287_dump_modal_eeprom()
97 PR_EEP("Chain0 NF Threshold", modal_hdr->noiseFloorThreshCh[0]); in ar9287_dump_modal_eeprom()
101 PR_EEP("Chain0 I Coefficient", modal_hdr->iqCalICh[0]); in ar9287_dump_modal_eeprom()
103 PR_EEP("Chain0 Q Coefficient", modal_hdr->iqCalQCh[0]); in ar9287_dump_modal_eeprom()
110 PR_EEP("Chain0 bswAtten", modal_hdr->bswAtten[0]); in ar9287_dump_modal_eeprom()
112 PR_EEP("Chain0 bswMargin", modal_hdr->bswMargin[0]); in ar9287_dump_modal_eeprom()
145 PR_EEP("RegDomain1", le16_to_cpu(pBase->regDmn[0])); in ath9k_hw_ar9287_dump_eeprom()
160 PR_EEP("Cal Bin Major Ver", (binBuildNumber >> 24) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
161 PR_EEP("Cal Bin Minor Ver", (binBuildNumber >> 16) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
162 PR_EEP("Cal Bin Build", (binBuildNumber >> 8) & 0xFF); in ath9k_hw_ar9287_dump_eeprom()
179 return 0; in ath9k_hw_ar9287_dump_eeprom()
208 EEPROM_FIELD_SWAB16(eep->baseEepHeader.regDmn[0]); in ath9k_hw_ar9287_check_eeprom()
215 for (i = 0; i < AR9287_MAX_CHAINS; i++) in ath9k_hw_ar9287_check_eeprom()
218 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) in ath9k_hw_ar9287_check_eeprom()
227 return 0; in ath9k_hw_ar9287_check_eeprom()
242 return pModal->noiseFloorThreshCh[0]; in ath9k_hw_ar9287_get_eeprom()
250 return le16_to_cpu(pBase->regDmn[0]); in ath9k_hw_ar9287_get_eeprom()
269 return 0; in ath9k_hw_ar9287_get_eeprom()
274 return 0; in ath9k_hw_ar9287_get_eeprom()
276 return max_t(u8, pModal->antennaGainCh[0], in ath9k_hw_ar9287_get_eeprom()
279 return 0; in ath9k_hw_ar9287_get_eeprom()
288 u16 idxL = 0, idxR = 0, numPiers; in ar9287_eeprom_get_tx_gain_index()
294 for (numPiers = 0; numPiers < availPiers; numPiers++) { in ar9287_eeprom_get_tx_gain_index()
304 *pPwr = (int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0]; in ar9287_eeprom_get_tx_gain_index()
306 *pPwr = ((int8_t) pRawDatasetOpLoop[idxL].pwrPdg[0][0] + in ar9287_eeprom_get_tx_gain_index()
307 (int8_t) pRawDatasetOpLoop[idxR].pwrPdg[0][0])/2; in ar9287_eeprom_get_tx_gain_index()
318 /* Enable OLPC for chain 0 */ in ar9287_eeprom_olpc_set_pdadcs()
320 tmpVal = REG_READ(ah, 0xa270); in ar9287_eeprom_olpc_set_pdadcs()
321 tmpVal = tmpVal & 0xFCFFFFFF; in ar9287_eeprom_olpc_set_pdadcs()
322 tmpVal = tmpVal | (0x3 << 24); in ar9287_eeprom_olpc_set_pdadcs()
323 REG_WRITE(ah, 0xa270, tmpVal); in ar9287_eeprom_olpc_set_pdadcs()
327 tmpVal = REG_READ(ah, 0xb270); in ar9287_eeprom_olpc_set_pdadcs()
328 tmpVal = tmpVal & 0xFCFFFFFF; in ar9287_eeprom_olpc_set_pdadcs()
329 tmpVal = tmpVal | (0x3 << 24); in ar9287_eeprom_olpc_set_pdadcs()
330 REG_WRITE(ah, 0xb270, tmpVal); in ar9287_eeprom_olpc_set_pdadcs()
332 /* Write the OLPC ref power for chain 0 */ in ar9287_eeprom_olpc_set_pdadcs()
334 if (chain == 0) { in ar9287_eeprom_olpc_set_pdadcs()
335 tmpVal = REG_READ(ah, 0xa398); in ar9287_eeprom_olpc_set_pdadcs()
336 tmpVal = tmpVal & 0xff00ffff; in ar9287_eeprom_olpc_set_pdadcs()
337 a = (txPower)&0xff; in ar9287_eeprom_olpc_set_pdadcs()
339 REG_WRITE(ah, 0xa398, tmpVal); in ar9287_eeprom_olpc_set_pdadcs()
345 tmpVal = REG_READ(ah, 0xb398); in ar9287_eeprom_olpc_set_pdadcs()
346 tmpVal = tmpVal & 0xff00ffff; in ar9287_eeprom_olpc_set_pdadcs()
347 a = (txPower)&0xff; in ar9287_eeprom_olpc_set_pdadcs()
349 REG_WRITE(ah, 0xb398, tmpVal); in ar9287_eeprom_olpc_set_pdadcs()
362 u16 numPiers = 0, i, j; in ath9k_hw_set_ar9287_power_cal_table()
364 u16 xpdGainValues[AR5416_NUM_PD_GAINS] = {0, 0, 0, 0}; in ath9k_hw_set_ar9287_power_cal_table()
366 int16_t diff = 0; in ath9k_hw_set_ar9287_power_cal_table()
382 (struct cal_data_op_loop_ar9287 *)pEepData->calPierData2G[0]; in ath9k_hw_set_ar9287_power_cal_table()
383 ah->initPDADC = pRawDatasetOpenLoop->vpdPdg[0][0]; in ath9k_hw_set_ar9287_power_cal_table()
387 numXpdGain = 0; in ath9k_hw_set_ar9287_power_cal_table()
401 (numXpdGain - 1) & 0x3); in ath9k_hw_set_ar9287_power_cal_table()
403 xpdGainValues[0]); in ath9k_hw_set_ar9287_power_cal_table()
409 for (i = 0; i < AR9287_MAX_CHAINS; i++) { in ath9k_hw_set_ar9287_power_cal_table()
410 regChainOffset = i * 0x1000; in ath9k_hw_set_ar9287_power_cal_table()
439 if (i == 0) { in ath9k_hw_set_ar9287_power_cal_table()
445 | SM(gainBoundaries[0], in ath9k_hw_set_ar9287_power_cal_table()
466 for (j = 0; j < ((u16)AR5416_NUM_PDADC_VALUES-diff); j++) in ath9k_hw_set_ar9287_power_cal_table()
479 for (j = 0; j < 32; j++) { in ath9k_hw_set_ar9287_power_cal_table()
509 struct cal_target_power_leg targetPowerOfdm = {0, {0, 0, 0, 0} }, in ath9k_hw_set_ar9287_power_per_rate_table()
510 targetPowerCck = {0, {0, 0, 0, 0} }; in ath9k_hw_set_ar9287_power_per_rate_table()
511 struct cal_target_power_leg targetPowerOfdmExt = {0, {0, 0, 0, 0} }, in ath9k_hw_set_ar9287_power_per_rate_table()
512 targetPowerCckExt = {0, {0, 0, 0, 0} }; in ath9k_hw_set_ar9287_power_per_rate_table()
514 targetPowerHt40 = {0, {0, 0, 0, 0} }; in ath9k_hw_set_ar9287_power_per_rate_table()
515 u16 scaledPower = 0, minCtlPower; in ath9k_hw_set_ar9287_power_per_rate_table()
520 u16 numCtlModes = 0; in ath9k_hw_set_ar9287_power_per_rate_table()
574 for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) { in ath9k_hw_set_ar9287_power_per_rate_table()
587 for (i = 0; (i < AR9287_NUM_CTLS) && pEepData->ctlIndex[i]; i++) { in ath9k_hw_set_ar9287_power_per_rate_table()
619 for (i = 0; i < ARRAY_SIZE(targetPowerCck.tPow2x); i++) { in ath9k_hw_set_ar9287_power_per_rate_table()
627 for (i = 0; i < ARRAY_SIZE(targetPowerOfdm.tPow2x); i++) { in ath9k_hw_set_ar9287_power_per_rate_table()
635 for (i = 0; i < ARRAY_SIZE(targetPowerHt20.tPow2x); i++) { in ath9k_hw_set_ar9287_power_per_rate_table()
642 targetPowerCckExt.tPow2x[0] = in ath9k_hw_set_ar9287_power_per_rate_table()
643 (u8)min((u16)targetPowerCckExt.tPow2x[0], in ath9k_hw_set_ar9287_power_per_rate_table()
648 targetPowerOfdmExt.tPow2x[0] = in ath9k_hw_set_ar9287_power_per_rate_table()
649 (u8)min((u16)targetPowerOfdmExt.tPow2x[0], in ath9k_hw_set_ar9287_power_per_rate_table()
654 for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) { in ath9k_hw_set_ar9287_power_per_rate_table()
671 ratesArray[rate24mb] = targetPowerOfdm.tPow2x[0]; in ath9k_hw_set_ar9287_power_per_rate_table()
676 ratesArray[rateXr] = targetPowerOfdm.tPow2x[0]; in ath9k_hw_set_ar9287_power_per_rate_table()
678 for (i = 0; i < ARRAY_SIZE(targetPowerHt20.tPow2x); i++) in ath9k_hw_set_ar9287_power_per_rate_table()
682 ratesArray[rate1l] = targetPowerCck.tPow2x[0]; in ath9k_hw_set_ar9287_power_per_rate_table()
691 for (i = 0; i < ARRAY_SIZE(targetPowerHt40.tPow2x); i++) in ath9k_hw_set_ar9287_power_per_rate_table()
694 ratesArray[rateDupOfdm] = targetPowerHt40.tPow2x[0]; in ath9k_hw_set_ar9287_power_per_rate_table()
695 ratesArray[rateDupCck] = targetPowerHt40.tPow2x[0]; in ath9k_hw_set_ar9287_power_per_rate_table()
696 ratesArray[rateExtOfdm] = targetPowerOfdmExt.tPow2x[0]; in ath9k_hw_set_ar9287_power_per_rate_table()
699 ratesArray[rateExtCck] = targetPowerCckExt.tPow2x[0]; in ath9k_hw_set_ar9287_power_per_rate_table()
718 memset(ratesArray, 0, sizeof(ratesArray)); in ath9k_hw_ar9287_set_txpower()
724 &ratesArray[0], cfgCtl, in ath9k_hw_ar9287_set_txpower()
730 regulatory->max_power_level = 0; in ath9k_hw_ar9287_set_txpower()
731 for (i = 0; i < ARRAY_SIZE(ratesArray); i++) { in ath9k_hw_ar9287_set_txpower()
744 for (i = 0; i < Ar5416RateSize; i++) in ath9k_hw_ar9287_set_txpower()
754 | ATH9K_POW_SM(ratesArray[rate6mb], 0)); in ath9k_hw_ar9287_set_txpower()
760 | ATH9K_POW_SM(ratesArray[rate24mb], 0)); in ath9k_hw_ar9287_set_txpower()
768 | ATH9K_POW_SM(ratesArray[rate1l], 0)); in ath9k_hw_ar9287_set_txpower()
773 | ATH9K_POW_SM(ratesArray[rate5_5l], 0)); in ath9k_hw_ar9287_set_txpower()
781 | ATH9K_POW_SM(ratesArray[rateHt20_0], 0)); in ath9k_hw_ar9287_set_txpower()
787 | ATH9K_POW_SM(ratesArray[rateHt20_4], 0)); in ath9k_hw_ar9287_set_txpower()
796 | ATH9K_POW_SM(ratesArray[rateHt40_0], 0)); in ath9k_hw_ar9287_set_txpower()
802 | ATH9K_POW_SM(ratesArray[rateHt40_4], 0)); in ath9k_hw_ar9287_set_txpower()
812 ht40PowerIncForPdadc, 0)); in ath9k_hw_ar9287_set_txpower()
822 ht40PowerIncForPdadc, 0)); in ath9k_hw_ar9287_set_txpower()
830 | ATH9K_POW_SM(ratesArray[rateDupCck], 0)); in ath9k_hw_ar9287_set_txpower()
837 ht40_delta = (IS_CHAN_HT40(chan)) ? ht40PowerIncForPdadc : 0; in ath9k_hw_ar9287_set_txpower()
863 for (i = 0; i < AR9287_MAX_CHAINS; i++) { in ath9k_hw_ar9287_set_board_values()
864 regChainOffset = i * 0x1000; in ath9k_hw_ar9287_set_board_values()
869 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, in ath9k_hw_ar9287_set_board_values()
870 (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) in ath9k_hw_ar9287_set_board_values()