Lines Matching +full:calibration +full:- +full:data
2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
41 * Here we handle the low-level functions related to baseband
47 * - Channel setting/switching
49 * - Automatic Gain Control (AGC) calibration
51 * - Noise Floor calibration
53 * - I/Q imbalance calibration (QAM correction)
55 * - Calibration due to thermal changes (gain_F)
57 * - Spur noise mitigation
59 * - RF/PHY initialization for the various operating modes and bwmodes
61 * - Antenna control
63 * - TX power control per channel/rate/packet type
76 * ath5k_hw_radio_revision() - Get the PHY Chip revision
112 if (ah->ah_version == AR5K_AR5210) { in ath5k_hw_radio_revision()
128 * ath5k_channel_ok() - Check if a channel is supported by the hw
138 u16 freq = channel->center_freq; in ath5k_channel_ok()
141 if (channel->band == NL80211_BAND_2GHZ) { in ath5k_channel_ok()
142 if ((freq >= ah->ah_capabilities.cap_range.range_2ghz_min) && in ath5k_channel_ok()
143 (freq <= ah->ah_capabilities.cap_range.range_2ghz_max)) in ath5k_channel_ok()
145 } else if (channel->band == NL80211_BAND_5GHZ) in ath5k_channel_ok()
146 if ((freq >= ah->ah_capabilities.cap_range.range_5ghz_min) && in ath5k_channel_ok()
147 (freq <= ah->ah_capabilities.cap_range.range_5ghz_max)) in ath5k_channel_ok()
154 * ath5k_hw_chan_has_spur_noise() - Check if channel is sensitive to spur noise
164 if ((ah->ah_radio == AR5K_RF5112) || in ath5k_hw_chan_has_spur_noise()
165 (ah->ah_radio == AR5K_RF5413) || in ath5k_hw_chan_has_spur_noise()
166 (ah->ah_radio == AR5K_RF2413) || in ath5k_hw_chan_has_spur_noise()
167 (ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4))) in ath5k_hw_chan_has_spur_noise()
172 if ((channel->center_freq % refclk_freq != 0) && in ath5k_hw_chan_has_spur_noise()
173 ((channel->center_freq % refclk_freq < 10) || in ath5k_hw_chan_has_spur_noise()
174 (channel->center_freq % refclk_freq > 22))) in ath5k_hw_chan_has_spur_noise()
181 * ath5k_hw_rfb_op() - Perform an operation on the given RF Buffer
186 * @set: Indicate we need to swap data
199 u32 mask, data, last_bit, bits_shifted, first_bit; in ath5k_hw_rfb_op() local
204 data = 0; in ath5k_hw_rfb_op()
205 rfb = ah->ah_rf_banks; in ath5k_hw_rfb_op()
207 for (i = 0; i < ah->ah_rf_regs_count; i++) { in ath5k_hw_rfb_op()
220 bank = rfreg->bank; in ath5k_hw_rfb_op()
221 num_bits = rfreg->field.len; in ath5k_hw_rfb_op()
222 first_bit = rfreg->field.pos; in ath5k_hw_rfb_op()
223 col = rfreg->field.col; in ath5k_hw_rfb_op()
229 offset = ah->ah_offset[bank]; in ath5k_hw_rfb_op()
237 entry = ((first_bit - 1) / 8) + offset; in ath5k_hw_rfb_op()
238 position = (first_bit - 1) % 8; in ath5k_hw_rfb_op()
241 data = ath5k_hw_bitswap(val, num_bits); in ath5k_hw_rfb_op()
249 mask = (((1 << last_bit) - 1) ^ ((1 << position) - 1)) << in ath5k_hw_rfb_op()
254 rfb[entry] |= ((data << position) << (col * 8)) & mask; in ath5k_hw_rfb_op()
255 data >>= (8 - position); in ath5k_hw_rfb_op()
257 data |= (((rfb[entry] & mask) >> (col * 8)) >> position) in ath5k_hw_rfb_op()
259 bits_shifted += last_bit - position; in ath5k_hw_rfb_op()
262 bits_left -= 8 - position; in ath5k_hw_rfb_op()
265 data = set ? 1 : ath5k_hw_bitswap(data, num_bits); in ath5k_hw_rfb_op()
267 return data; in ath5k_hw_rfb_op()
271 * ath5k_hw_write_ofdm_timings() - set OFDM timings on AR5212
292 BUG_ON(!(ah->ah_version == AR5K_AR5212) || in ath5k_hw_write_ofdm_timings()
293 (channel->hw_value == AR5K_MODE_11B)); in ath5k_hw_write_ofdm_timings()
299 switch (ah->ah_bwmode) { in ath5k_hw_write_ofdm_timings()
313 coef_scaled = ((5 * (clock << 24)) / 2) / channel->center_freq; in ath5k_hw_write_ofdm_timings()
316 * ALGO: coef_exp = 14 - highest set bit position */ in ath5k_hw_write_ofdm_timings()
321 return -EINVAL; in ath5k_hw_write_ofdm_timings()
324 coef_exp = 14 - (coef_exp - 24); in ath5k_hw_write_ofdm_timings()
330 (1 << (24 - coef_exp - 1)); in ath5k_hw_write_ofdm_timings()
334 ds_coef_man = coef_man >> (24 - coef_exp); in ath5k_hw_write_ofdm_timings()
335 ds_coef_exp = coef_exp - 16; in ath5k_hw_write_ofdm_timings()
346 * ath5k_hw_phy_disable() - Disable PHY
358 * ath5k_hw_wait_for_synth() - Wait for synth to settle
367 * On 5211+ read activation -> rx delay in ath5k_hw_wait_for_synth()
370 if (ah->ah_version != AR5K_AR5210) { in ath5k_hw_wait_for_synth()
374 delay = (channel->hw_value == AR5K_MODE_11B) ? in ath5k_hw_wait_for_synth()
376 if (ah->ah_bwmode == AR5K_BWMODE_10MHZ) in ath5k_hw_wait_for_synth()
378 if (ah->ah_bwmode == AR5K_BWMODE_5MHZ) in ath5k_hw_wait_for_synth()
400 * auto adjustment on hw -notice they have a much smaller BANK 7 and
401 * no gain optimization ladder-.
408 * "http://www.cnri.dit.ie/publications/ICT08%20-%20Practical%20Issues
412 * "http://madwifi-project.org/ticket/1659"
417 * ath5k_hw_rfgain_opt_init() - Initialize ah_gain during attach
423 switch (ah->ah_radio) { in ath5k_hw_rfgain_opt_init()
425 ah->ah_gain.g_step_idx = rfgain_opt_5111.go_default; in ath5k_hw_rfgain_opt_init()
426 ah->ah_gain.g_low = 20; in ath5k_hw_rfgain_opt_init()
427 ah->ah_gain.g_high = 35; in ath5k_hw_rfgain_opt_init()
428 ah->ah_gain.g_state = AR5K_RFGAIN_ACTIVE; in ath5k_hw_rfgain_opt_init()
431 ah->ah_gain.g_step_idx = rfgain_opt_5112.go_default; in ath5k_hw_rfgain_opt_init()
432 ah->ah_gain.g_low = 20; in ath5k_hw_rfgain_opt_init()
433 ah->ah_gain.g_high = 85; in ath5k_hw_rfgain_opt_init()
434 ah->ah_gain.g_state = AR5K_RFGAIN_ACTIVE; in ath5k_hw_rfgain_opt_init()
437 return -EINVAL; in ath5k_hw_rfgain_opt_init()
444 * ath5k_hw_request_rfgain_probe() - Request a PAPD probe packet
460 /* Skip if gain calibration is inactive or in ath5k_hw_request_rfgain_probe()
462 if (ah->ah_gain.g_state != AR5K_RFGAIN_ACTIVE) in ath5k_hw_request_rfgain_probe()
467 ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_ofdm - 4, in ath5k_hw_request_rfgain_probe()
471 ah->ah_gain.g_state = AR5K_RFGAIN_READ_REQUESTED; in ath5k_hw_request_rfgain_probe()
476 * ath5k_hw_rf_gainf_corr() - Calculate Gain_F measurement correction
491 if ((ah->ah_radio != AR5K_RF5112) || in ath5k_hw_rf_gainf_corr()
492 (ah->ah_radio_5ghz_revision <= AR5K_SREV_RAD_5112A)) in ath5k_hw_rf_gainf_corr()
497 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_5112a); in ath5k_hw_rf_gainf_corr()
499 g_step = &go->go_step[ah->ah_gain.g_step_idx]; in ath5k_hw_rf_gainf_corr()
501 if (ah->ah_rf_banks == NULL) in ath5k_hw_rf_gainf_corr()
504 ah->ah_gain.g_f_corr = 0; in ath5k_hw_rf_gainf_corr()
514 mix = g_step->gos_param[0]; in ath5k_hw_rf_gainf_corr()
518 ah->ah_gain.g_f_corr = step * 2; in ath5k_hw_rf_gainf_corr()
521 ah->ah_gain.g_f_corr = (step - 5) * 2; in ath5k_hw_rf_gainf_corr()
524 ah->ah_gain.g_f_corr = step; in ath5k_hw_rf_gainf_corr()
527 ah->ah_gain.g_f_corr = 0; in ath5k_hw_rf_gainf_corr()
531 return ah->ah_gain.g_f_corr; in ath5k_hw_rf_gainf_corr()
535 * ath5k_hw_rf_check_gainf_readback() - Validate Gain_F feedback from detector
551 if (ah->ah_rf_banks == NULL) in ath5k_hw_rf_check_gainf_readback()
554 if (ah->ah_radio == AR5K_RF5111) { in ath5k_hw_rf_check_gainf_readback()
557 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_5111); in ath5k_hw_rf_check_gainf_readback()
567 ah->ah_gain.g_high = level[3] - in ath5k_hw_rf_check_gainf_readback()
568 (step == 63 ? AR5K_GAIN_DYN_ADJUST_HI_MARGIN : -5); in ath5k_hw_rf_check_gainf_readback()
569 ah->ah_gain.g_low = level[0] + in ath5k_hw_rf_check_gainf_readback()
574 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_5112); in ath5k_hw_rf_check_gainf_readback()
585 ah->ah_gain.g_high = 55; in ath5k_hw_rf_check_gainf_readback()
589 return (ah->ah_gain.g_current >= level[0] && in ath5k_hw_rf_check_gainf_readback()
590 ah->ah_gain.g_current <= level[1]) || in ath5k_hw_rf_check_gainf_readback()
591 (ah->ah_gain.g_current >= level[2] && in ath5k_hw_rf_check_gainf_readback()
592 ah->ah_gain.g_current <= level[3]); in ath5k_hw_rf_check_gainf_readback()
596 * ath5k_hw_rf_gainf_adjust() - Perform Gain_F adjustment
609 switch (ah->ah_radio) { in ath5k_hw_rf_gainf_adjust()
620 g_step = &go->go_step[ah->ah_gain.g_step_idx]; in ath5k_hw_rf_gainf_adjust()
622 if (ah->ah_gain.g_current >= ah->ah_gain.g_high) { in ath5k_hw_rf_gainf_adjust()
625 if (ah->ah_gain.g_step_idx == 0) in ath5k_hw_rf_gainf_adjust()
626 return -1; in ath5k_hw_rf_gainf_adjust()
628 for (ah->ah_gain.g_target = ah->ah_gain.g_current; in ath5k_hw_rf_gainf_adjust()
629 ah->ah_gain.g_target >= ah->ah_gain.g_high && in ath5k_hw_rf_gainf_adjust()
630 ah->ah_gain.g_step_idx > 0; in ath5k_hw_rf_gainf_adjust()
631 g_step = &go->go_step[ah->ah_gain.g_step_idx]) in ath5k_hw_rf_gainf_adjust()
632 ah->ah_gain.g_target -= 2 * in ath5k_hw_rf_gainf_adjust()
633 (go->go_step[--(ah->ah_gain.g_step_idx)].gos_gain - in ath5k_hw_rf_gainf_adjust()
634 g_step->gos_gain); in ath5k_hw_rf_gainf_adjust()
640 if (ah->ah_gain.g_current <= ah->ah_gain.g_low) { in ath5k_hw_rf_gainf_adjust()
643 if (ah->ah_gain.g_step_idx == (go->go_steps_count - 1)) in ath5k_hw_rf_gainf_adjust()
644 return -2; in ath5k_hw_rf_gainf_adjust()
646 for (ah->ah_gain.g_target = ah->ah_gain.g_current; in ath5k_hw_rf_gainf_adjust()
647 ah->ah_gain.g_target <= ah->ah_gain.g_low && in ath5k_hw_rf_gainf_adjust()
648 ah->ah_gain.g_step_idx < go->go_steps_count - 1; in ath5k_hw_rf_gainf_adjust()
649 g_step = &go->go_step[ah->ah_gain.g_step_idx]) in ath5k_hw_rf_gainf_adjust()
650 ah->ah_gain.g_target -= 2 * in ath5k_hw_rf_gainf_adjust()
651 (go->go_step[++ah->ah_gain.g_step_idx].gos_gain - in ath5k_hw_rf_gainf_adjust()
652 g_step->gos_gain); in ath5k_hw_rf_gainf_adjust()
661 ret, ah->ah_gain.g_step_idx, ah->ah_gain.g_current, in ath5k_hw_rf_gainf_adjust()
662 ah->ah_gain.g_target); in ath5k_hw_rf_gainf_adjust()
668 * ath5k_hw_gainf_calibrate() - Do a gain_F calibration
671 * Main callback for thermal RF gain calibration engine
680 u32 data, type; in ath5k_hw_gainf_calibrate() local
681 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_gainf_calibrate()
683 if (ah->ah_rf_banks == NULL || in ath5k_hw_gainf_calibrate()
684 ah->ah_gain.g_state == AR5K_RFGAIN_INACTIVE) in ath5k_hw_gainf_calibrate()
689 if (ah->ah_gain.g_state != AR5K_RFGAIN_READ_REQUESTED) in ath5k_hw_gainf_calibrate()
694 data = ath5k_hw_reg_read(ah, AR5K_PHY_PAPD_PROBE); in ath5k_hw_gainf_calibrate()
697 if (!(data & AR5K_PHY_PAPD_PROBE_TX_NEXT)) { in ath5k_hw_gainf_calibrate()
698 ah->ah_gain.g_current = data >> AR5K_PHY_PAPD_PROBE_GAINF_S; in ath5k_hw_gainf_calibrate()
699 type = AR5K_REG_MS(data, AR5K_PHY_PAPD_PROBE_TYPE); in ath5k_hw_gainf_calibrate()
704 if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_5112A) in ath5k_hw_gainf_calibrate()
705 ah->ah_gain.g_current += in ath5k_hw_gainf_calibrate()
706 ee->ee_cck_ofdm_gain_delta; in ath5k_hw_gainf_calibrate()
708 ah->ah_gain.g_current += in ath5k_hw_gainf_calibrate()
714 if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_5112A) { in ath5k_hw_gainf_calibrate()
716 ah->ah_gain.g_current = in ath5k_hw_gainf_calibrate()
717 ah->ah_gain.g_current >= ah->ah_gain.g_f_corr ? in ath5k_hw_gainf_calibrate()
718 (ah->ah_gain.g_current - ah->ah_gain.g_f_corr) : in ath5k_hw_gainf_calibrate()
726 AR5K_GAIN_CHECK_ADJUST(&ah->ah_gain) && in ath5k_hw_gainf_calibrate()
728 ah->ah_gain.g_state = AR5K_RFGAIN_NEED_CHANGE; in ath5k_hw_gainf_calibrate()
730 ah->ah_gain.g_state = AR5K_RFGAIN_ACTIVE; in ath5k_hw_gainf_calibrate()
735 return ah->ah_gain.g_state; in ath5k_hw_gainf_calibrate()
739 * ath5k_hw_rfgain_init() - Write initial RF gain settings to hw
746 * with Gain_F calibration
754 switch (ah->ah_radio) { in ath5k_hw_rfgain_init()
781 return -EINVAL; in ath5k_hw_rfgain_init()
801 * ath5k_hw_rfregs_init() - Initialize RF register settings
818 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_rfregs_init()
821 int i, obdb = -1, bank = -1; in ath5k_hw_rfregs_init()
823 switch (ah->ah_radio) { in ath5k_hw_rfregs_init()
826 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_5111); in ath5k_hw_rfregs_init()
828 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_5111); in ath5k_hw_rfregs_init()
832 if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_5112A) { in ath5k_hw_rfregs_init()
834 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_5112a); in ath5k_hw_rfregs_init()
836 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_5112a); in ath5k_hw_rfregs_init()
839 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_5112); in ath5k_hw_rfregs_init()
841 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_5112); in ath5k_hw_rfregs_init()
847 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_2413); in ath5k_hw_rfregs_init()
849 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_2413); in ath5k_hw_rfregs_init()
853 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_2316); in ath5k_hw_rfregs_init()
855 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_2316); in ath5k_hw_rfregs_init()
859 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_5413); in ath5k_hw_rfregs_init()
861 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_5413); in ath5k_hw_rfregs_init()
865 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_2425); in ath5k_hw_rfregs_init()
867 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_2317); in ath5k_hw_rfregs_init()
871 ah->ah_rf_regs_count = ARRAY_SIZE(rf_regs_2425); in ath5k_hw_rfregs_init()
872 if (ah->ah_mac_srev < AR5K_SREV_AR2417) { in ath5k_hw_rfregs_init()
874 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_2425); in ath5k_hw_rfregs_init()
877 ah->ah_rf_banks_size = ARRAY_SIZE(rfb_2417); in ath5k_hw_rfregs_init()
881 return -EINVAL; in ath5k_hw_rfregs_init()
885 * ah->ah_rf_banks based on ah->ah_rf_banks_size in ath5k_hw_rfregs_init()
887 if (ah->ah_rf_banks == NULL) { in ath5k_hw_rfregs_init()
888 ah->ah_rf_banks = kmalloc_array(ah->ah_rf_banks_size, in ath5k_hw_rfregs_init()
891 if (ah->ah_rf_banks == NULL) { in ath5k_hw_rfregs_init()
893 return -ENOMEM; in ath5k_hw_rfregs_init()
898 rfb = ah->ah_rf_banks; in ath5k_hw_rfregs_init()
900 for (i = 0; i < ah->ah_rf_banks_size; i++) { in ath5k_hw_rfregs_init()
903 return -EINVAL; in ath5k_hw_rfregs_init()
909 ah->ah_offset[bank] = i; in ath5k_hw_rfregs_init()
916 if (channel->band == NL80211_BAND_2GHZ) { in ath5k_hw_rfregs_init()
918 if (channel->hw_value == AR5K_MODE_11B) in ath5k_hw_rfregs_init()
925 * in eeprom on ee->ee_ob[ee_mode][0] in ath5k_hw_rfregs_init()
929 * 802.11a on ee->ee_ob[ee_mode][1] */ in ath5k_hw_rfregs_init()
930 if ((ah->ah_radio == AR5K_RF5111) || in ath5k_hw_rfregs_init()
931 (ah->ah_radio == AR5K_RF5112)) in ath5k_hw_rfregs_init()
936 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
939 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
943 } else if ((channel->band == NL80211_BAND_5GHZ) || in ath5k_hw_rfregs_init()
944 (ah->ah_radio == AR5K_RF5111)) { in ath5k_hw_rfregs_init()
949 obdb = channel->center_freq >= 5725 ? 3 : in ath5k_hw_rfregs_init()
950 (channel->center_freq >= 5500 ? 2 : in ath5k_hw_rfregs_init()
951 (channel->center_freq >= 5260 ? 1 : in ath5k_hw_rfregs_init()
952 (channel->center_freq > 4000 ? 0 : -1))); in ath5k_hw_rfregs_init()
955 return -EINVAL; in ath5k_hw_rfregs_init()
957 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
960 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
964 g_step = &go->go_step[ah->ah_gain.g_step_idx]; in ath5k_hw_rfregs_init()
967 if ((ah->ah_bwmode == AR5K_BWMODE_40MHZ) && in ath5k_hw_rfregs_init()
968 (ah->ah_radio != AR5K_RF5413)) in ath5k_hw_rfregs_init()
971 /* Bank Modifications (chip-specific) */ in ath5k_hw_rfregs_init()
972 if (ah->ah_radio == AR5K_RF5111) { in ath5k_hw_rfregs_init()
975 if (channel->hw_value != AR5K_MODE_11B) { in ath5k_hw_rfregs_init()
979 g_step->gos_param[0]); in ath5k_hw_rfregs_init()
981 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[1], in ath5k_hw_rfregs_init()
984 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[2], in ath5k_hw_rfregs_init()
987 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[3], in ath5k_hw_rfregs_init()
992 ah->ah_gain.g_state = AR5K_RFGAIN_ACTIVE; in ath5k_hw_rfregs_init()
998 ath5k_hw_rfb_op(ah, rf_regs, !ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1001 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_x_gain[ee_mode], in ath5k_hw_rfregs_init()
1004 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1007 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1011 if (ah->ah_bwmode == AR5K_BWMODE_5MHZ || in ath5k_hw_rfregs_init()
1012 ah->ah_bwmode == AR5K_BWMODE_10MHZ) { in ath5k_hw_rfregs_init()
1018 wait_i = (ah->ah_bwmode == AR5K_BWMODE_5MHZ) ? in ath5k_hw_rfregs_init()
1029 if (ah->ah_radio == AR5K_RF5112) { in ath5k_hw_rfregs_init()
1032 if (channel->hw_value != AR5K_MODE_11B) { in ath5k_hw_rfregs_init()
1034 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[0], in ath5k_hw_rfregs_init()
1037 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[1], in ath5k_hw_rfregs_init()
1040 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[2], in ath5k_hw_rfregs_init()
1043 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[3], in ath5k_hw_rfregs_init()
1046 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[4], in ath5k_hw_rfregs_init()
1049 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[5], in ath5k_hw_rfregs_init()
1052 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[6], in ath5k_hw_rfregs_init()
1057 ah->ah_gain.g_state = AR5K_RFGAIN_ACTIVE; in ath5k_hw_rfregs_init()
1062 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1065 if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112A) { in ath5k_hw_rfregs_init()
1068 ee->ee_x_gain[ee_mode], in ath5k_hw_rfregs_init()
1072 u8 *pdg_curve_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_hw_rfregs_init()
1073 if (ee->ee_pd_gains[ee_mode] > 1) { in ath5k_hw_rfregs_init()
1090 if (ah->ah_radio == AR5K_RF5112 && in ath5k_hw_rfregs_init()
1091 (ah->ah_radio_5ghz_revision & AR5K_SREV_REV) > 0) { in ath5k_hw_rfregs_init()
1106 if (ah->ah_phy_revision >= AR5K_SREV_PHY_5212A) { in ath5k_hw_rfregs_init()
1124 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1128 if (ah->ah_bwmode == AR5K_BWMODE_5MHZ || in ath5k_hw_rfregs_init()
1129 ah->ah_bwmode == AR5K_BWMODE_10MHZ) { in ath5k_hw_rfregs_init()
1132 pd_delay = (ah->ah_bwmode == AR5K_BWMODE_5MHZ) ? in ath5k_hw_rfregs_init()
1143 if (ah->ah_radio == AR5K_RF5413 && in ath5k_hw_rfregs_init()
1144 channel->band == NL80211_BAND_2GHZ) { in ath5k_hw_rfregs_init()
1149 /* Set optimum value for early revisions (on pci-e chips) */ in ath5k_hw_rfregs_init()
1150 if (ah->ah_mac_srev >= AR5K_SREV_AR5424 && in ath5k_hw_rfregs_init()
1151 ah->ah_mac_srev < AR5K_SREV_AR5413) in ath5k_hw_rfregs_init()
1158 for (i = 0; i < ah->ah_rf_banks_size; i++) { in ath5k_hw_rfregs_init()
1172 * ath5k_hw_rf5110_chan2athchan() - Convert channel freq on RF5110
1185 channel->center_freq) - 24) / 2, 5) in ath5k_hw_rf5110_chan2athchan()
1191 * ath5k_hw_rf5110_channel() - Set channel frequency on RF5110
1199 u32 data; in ath5k_hw_rf5110_channel() local
1204 data = ath5k_hw_rf5110_chan2athchan(channel); in ath5k_hw_rf5110_channel()
1205 ath5k_hw_reg_write(ah, data, AR5K_RF_BUFFER); in ath5k_hw_rf5110_channel()
1213 * ath5k_hw_rf5111_chan2athchan() - Handle 2GHz channels on RF5111/2111
1218 * we need to add some offsets and extra flags to the data values we pass
1228 /* Cast this value to catch negative channel numbers (>= -19) */ in ath5k_hw_rf5111_chan2athchan()
1235 athchan->a2_athchan = 115 + channel; in ath5k_hw_rf5111_chan2athchan()
1236 athchan->a2_flags = 0x46; in ath5k_hw_rf5111_chan2athchan()
1238 athchan->a2_athchan = 124; in ath5k_hw_rf5111_chan2athchan()
1239 athchan->a2_flags = 0x44; in ath5k_hw_rf5111_chan2athchan()
1241 athchan->a2_athchan = ((channel - 14) * 4) + 132; in ath5k_hw_rf5111_chan2athchan()
1242 athchan->a2_flags = 0x46; in ath5k_hw_rf5111_chan2athchan()
1244 return -EINVAL; in ath5k_hw_rf5111_chan2athchan()
1250 * ath5k_hw_rf5111_channel() - Set channel frequency on RF5111/2111
1260 ieee80211_frequency_to_channel(channel->center_freq); in ath5k_hw_rf5111_channel()
1269 if (channel->band == NL80211_BAND_2GHZ) { in ath5k_hw_rf5111_channel()
1272 ieee80211_frequency_to_channel(channel->center_freq), in ath5k_hw_rf5111_channel()
1284 data1 = ((ath5k_hw_bitswap(ath5k_channel - 24, 8) & 0xff) << 2) | in ath5k_hw_rf5111_channel()
1288 data1 = ((ath5k_hw_bitswap((ath5k_channel - 24) / 2, 8) & 0xff) in ath5k_hw_rf5111_channel()
1301 * ath5k_hw_rf5112_channel() - Set channel frequency on 5112 and newer
1316 u32 data, data0, data1, data2; in ath5k_hw_rf5112_channel() local
1319 data = data0 = data1 = data2 = 0; in ath5k_hw_rf5112_channel()
1320 c = channel->center_freq; in ath5k_hw_rf5112_channel()
1329 * below/above (non-standard channels) */ in ath5k_hw_rf5112_channel()
1330 if (!((c - 2224) % 5)) { in ath5k_hw_rf5112_channel()
1331 /* Same as (c - 2224) / 5 */ in ath5k_hw_rf5112_channel()
1332 data0 = ((2 * (c - 704)) - 3040) / 10; in ath5k_hw_rf5112_channel()
1336 } else if (!((c - 2192) % 5)) { in ath5k_hw_rf5112_channel()
1337 /* Same as (c - 2192) / 5 */ in ath5k_hw_rf5112_channel()
1338 data0 = ((2 * (c - 672)) - 3040) / 10; in ath5k_hw_rf5112_channel()
1341 return -EINVAL; in ath5k_hw_rf5112_channel()
1355 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); in ath5k_hw_rf5112_channel()
1358 data0 = ath5k_hw_bitswap(((c - 4800) / 10 << 1), 8); in ath5k_hw_rf5112_channel()
1361 data0 = ath5k_hw_bitswap((c - 4800) / 5, 8); in ath5k_hw_rf5112_channel()
1364 return -EINVAL; in ath5k_hw_rf5112_channel()
1366 data0 = ath5k_hw_bitswap((10 * (c - 2 - 4800)) / 25 + 1, 8); in ath5k_hw_rf5112_channel()
1370 data = (data0 << 4) | (data1 << 1) | (data2 << 2) | 0x1001; in ath5k_hw_rf5112_channel()
1372 ath5k_hw_reg_write(ah, data & 0xff, AR5K_RF_BUFFER); in ath5k_hw_rf5112_channel()
1373 ath5k_hw_reg_write(ah, (data >> 8) & 0x7f, AR5K_RF_BUFFER_CONTROL_5); in ath5k_hw_rf5112_channel()
1379 * ath5k_hw_rf2425_channel() - Set channel frequency on RF2425
1390 u32 data, data0, data2; in ath5k_hw_rf2425_channel() local
1393 data = data0 = data2 = 0; in ath5k_hw_rf2425_channel()
1394 c = channel->center_freq; in ath5k_hw_rf2425_channel()
1397 data0 = ath5k_hw_bitswap((c - 2272), 8); in ath5k_hw_rf2425_channel()
1402 data0 = ath5k_hw_bitswap(((c - 4800) / 20 << 2), 8); in ath5k_hw_rf2425_channel()
1404 data0 = ath5k_hw_bitswap(((c - 4800) / 10 << 1), 8); in ath5k_hw_rf2425_channel()
1406 data0 = ath5k_hw_bitswap((c - 4800) / 5, 8); in ath5k_hw_rf2425_channel()
1408 return -EINVAL; in ath5k_hw_rf2425_channel()
1411 data0 = ath5k_hw_bitswap((10 * (c - 2 - 4800)) / 25 + 1, 8); in ath5k_hw_rf2425_channel()
1415 data = (data0 << 4) | data2 << 2 | 0x1001; in ath5k_hw_rf2425_channel()
1417 ath5k_hw_reg_write(ah, data & 0xff, AR5K_RF_BUFFER); in ath5k_hw_rf2425_channel()
1418 ath5k_hw_reg_write(ah, (data >> 8) & 0x7f, AR5K_RF_BUFFER_CONTROL_5); in ath5k_hw_rf2425_channel()
1424 * ath5k_hw_channel() - Set a channel on the radio chip
1444 channel->center_freq); in ath5k_hw_channel()
1445 return -EINVAL; in ath5k_hw_channel()
1451 switch (ah->ah_radio) { in ath5k_hw_channel()
1471 if (channel->center_freq == 2484) { in ath5k_hw_channel()
1479 ah->ah_current_channel = channel; in ath5k_hw_channel()
1486 PHY calibration
1490 * DOC: PHY Calibration routines
1492 * Noise floor calibration: When we tell the hardware to
1493 * perform a noise floor calibration by setting the
1495 * sample-and-hold the minimum noise level seen at the antennas.
1500 * This type of calibration doesn't interfere with traffic.
1502 * AGC calibration: When we tell the hardware to perform
1503 * an AGC (Automatic Gain Control) calibration by setting the
1505 * a calibration on the DC offsets of ADCs. During this period
1509 * I/Q calibration: When we tell the hardware to perform
1510 * an I/Q calibration, it tries to correct I/Q imbalance and
1511 * fix QAM constellation by sampling data from rxed frames.
1514 * For more infos on AGC and I/Q calibration check out patent doc
1519 * ath5k_hw_read_measured_noise_floor() - Read measured NF from hw
1532 * ath5k_hw_init_nfcal_hist() - Initialize NF calibration history buffer
1540 ah->ah_nfcal_hist.index = 0; in ath5k_hw_init_nfcal_hist()
1542 ah->ah_nfcal_hist.nfval[i] = AR5K_TUNE_CCA_MAX_GOOD_VALUE; in ath5k_hw_init_nfcal_hist()
1546 * ath5k_hw_update_nfcal_hist() - Update NF calibration history buffer
1552 struct ath5k_nfcal_hist *hist = &ah->ah_nfcal_hist; in ath5k_hw_update_nfcal_hist()
1553 hist->index = (hist->index + 1) & (ATH5K_NF_CAL_HIST_MAX - 1); in ath5k_hw_update_nfcal_hist()
1554 hist->nfval[hist->index] = noise_floor; in ath5k_hw_update_nfcal_hist()
1558 * ath5k_hw_get_median_noise_floor() - Get median NF from history buffer
1568 memcpy(sort, ah->ah_nfcal_hist.nfval, sizeof(sort)); in ath5k_hw_get_median_noise_floor()
1569 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX - 1; i++) { in ath5k_hw_get_median_noise_floor()
1570 for (j = 1; j < ATH5K_NF_CAL_HIST_MAX - i; j++) { in ath5k_hw_get_median_noise_floor()
1571 if (sort[j] > sort[j - 1]) { in ath5k_hw_get_median_noise_floor()
1573 sort[j] = sort[j - 1]; in ath5k_hw_get_median_noise_floor()
1574 sort[j - 1] = tmp; in ath5k_hw_get_median_noise_floor()
1582 return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2]; in ath5k_hw_get_median_noise_floor()
1586 * ath5k_hw_update_noise_floor() - Update NF on hardware
1589 * This is the main function we call to perform a NF calibration,
1596 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_update_noise_floor()
1601 /* keep last value if calibration hasn't completed */ in ath5k_hw_update_noise_floor()
1604 "NF did not complete in calibration window\n"); in ath5k_hw_update_noise_floor()
1609 ah->ah_cal_mask |= AR5K_CALIBRATION_NF; in ath5k_hw_update_noise_floor()
1611 ee_mode = ath5k_eeprom_mode_from_channel(ah, ah->ah_current_channel); in ath5k_hw_update_noise_floor()
1613 /* completed NF calibration, test threshold */ in ath5k_hw_update_noise_floor()
1615 threshold = ee->ee_noise_floor_thr[ee_mode]; in ath5k_hw_update_noise_floor()
1641 * Load a high max CCA Power value (-50 dBm in .5 dBm units) in ath5k_hw_update_noise_floor()
1644 * floor calibration. in ath5k_hw_update_noise_floor()
1646 val = (val & ~AR5K_PHY_NF_M) | ((-50 * 2) & AR5K_PHY_NF_M); in ath5k_hw_update_noise_floor()
1653 ah->ah_noise_floor = nf; in ath5k_hw_update_noise_floor()
1655 ah->ah_cal_mask &= ~AR5K_CALIBRATION_NF; in ath5k_hw_update_noise_floor()
1662 * ath5k_hw_rf5110_calibrate() - Perform a PHY calibration on RF5110
1666 * Do a complete PHY calibration (AGC + NF + I/Q) on RF5110
1675 if (!(ah->ah_cal_mask & AR5K_CALIBRATION_FULL)) in ath5k_hw_rf5110_calibrate()
1717 AR5K_REG_SM(-1, AR5K_PHY_SIG_FIRPWR), AR5K_PHY_SIG); in ath5k_hw_rf5110_calibrate()
1721 AR5K_REG_SM(-1, AR5K_PHY_AGCCOARSE_HI) | in ath5k_hw_rf5110_calibrate()
1722 AR5K_REG_SM(-127, AR5K_PHY_AGCCOARSE_LO), AR5K_PHY_AGCCOARSE); in ath5k_hw_rf5110_calibrate()
1739 * Enable calibration and wait until completion in ath5k_hw_rf5110_calibrate()
1752 ATH5K_ERR(ah, "calibration timeout (%uMHz)\n", in ath5k_hw_rf5110_calibrate()
1753 channel->center_freq); in ath5k_hw_rf5110_calibrate()
1758 * Re-enable RX/TX and beacons in ath5k_hw_rf5110_calibrate()
1768 * ath5k_hw_rf511x_iq_calibrate() - Perform I/Q calibration on RF5111 and newer
1778 /* Skip if I/Q calibration is not needed or if it's still running */ in ath5k_hw_rf511x_iq_calibrate()
1779 if (!ah->ah_iq_cal_needed) in ath5k_hw_rf511x_iq_calibrate()
1780 return -EINVAL; in ath5k_hw_rf511x_iq_calibrate()
1783 "I/Q calibration still running"); in ath5k_hw_rf511x_iq_calibrate()
1784 return -EBUSY; in ath5k_hw_rf511x_iq_calibrate()
1787 /* Calibration has finished, get the results and re-run */ in ath5k_hw_rf511x_iq_calibrate()
1803 if (ah->ah_version == AR5K_AR5211) in ath5k_hw_rf511x_iq_calibrate()
1808 /* In case i_coffd became zero, cancel calibration in ath5k_hw_rf511x_iq_calibrate()
1812 return -ECANCELED; in ath5k_hw_rf511x_iq_calibrate()
1816 i_coff = (-iq_corr) / i_coffd; in ath5k_hw_rf511x_iq_calibrate()
1817 i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */ in ath5k_hw_rf511x_iq_calibrate()
1819 if (ah->ah_version == AR5K_AR5211) in ath5k_hw_rf511x_iq_calibrate()
1820 q_coff = (i_pwr / q_coffd) - 64; in ath5k_hw_rf511x_iq_calibrate()
1822 q_coff = (i_pwr / q_coffd) - 128; in ath5k_hw_rf511x_iq_calibrate()
1823 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */ in ath5k_hw_rf511x_iq_calibrate()
1834 /* Re-enable calibration -if we don't we'll commit in ath5k_hw_rf511x_iq_calibrate()
1844 * ath5k_hw_phy_calibrate() - Perform a PHY calibration
1849 * a short or full PHY calibration based on RF chip
1858 if (ah->ah_radio == AR5K_RF5110) in ath5k_hw_phy_calibrate()
1865 channel->center_freq); in ath5k_hw_phy_calibrate()
1872 /* On full calibration request a PAPD probe for in ath5k_hw_phy_calibrate()
1873 * gainf calibration if needed */ in ath5k_hw_phy_calibrate()
1874 if ((ah->ah_cal_mask & AR5K_CALIBRATION_FULL) && in ath5k_hw_phy_calibrate()
1875 (ah->ah_radio == AR5K_RF5111 || in ath5k_hw_phy_calibrate()
1876 ah->ah_radio == AR5K_RF5112) && in ath5k_hw_phy_calibrate()
1877 channel->hw_value != AR5K_MODE_11B) in ath5k_hw_phy_calibrate()
1881 if (!(ah->ah_cal_mask & AR5K_CALIBRATION_NF)) in ath5k_hw_phy_calibrate()
1893 * ath5k_hw_set_spur_mitigation_filter() - Configure SPUR filter
1906 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_hw_set_spur_mitigation_filter()
1918 if (channel->band == NL80211_BAND_2GHZ) { in ath5k_hw_set_spur_mitigation_filter()
1919 chan_fbin = (channel->center_freq - 2300) * 10; in ath5k_hw_set_spur_mitigation_filter()
1922 chan_fbin = (channel->center_freq - 4900) * 10; in ath5k_hw_set_spur_mitigation_filter()
1931 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) in ath5k_hw_set_spur_mitigation_filter()
1935 spur_chan_fbin = ee->ee_spur_chans[i][freq_band]; in ath5k_hw_set_spur_mitigation_filter()
1944 if ((chan_fbin - spur_detection_window <= in ath5k_hw_set_spur_mitigation_filter()
1955 spur_offset = spur_chan_fbin - chan_fbin; in ath5k_hw_set_spur_mitigation_filter()
1958 * spur_freq_sigma_delta -> spur_offset / sample_freq << 21 in ath5k_hw_set_spur_mitigation_filter()
1959 * spur_delta_phase -> spur_offset / chip_freq << 11 in ath5k_hw_set_spur_mitigation_filter()
1962 switch (ah->ah_bwmode) { in ath5k_hw_set_spur_mitigation_filter()
1982 if (channel->band == NL80211_BAND_5GHZ) { in ath5k_hw_set_spur_mitigation_filter()
1990 /* sample_freq -> 40MHz chip_freq -> 44MHz in ath5k_hw_set_spur_mitigation_filter()
2028 (i == 0 || i == (num_symbol_offsets - 1)) in ath5k_hw_set_spur_mitigation_filter()
2035 pilot_mask[0] |= 1 << (curr_sym_off - 1); in ath5k_hw_set_spur_mitigation_filter()
2037 pilot_mask[1] |= 1 << (curr_sym_off - 33); in ath5k_hw_set_spur_mitigation_filter()
2040 if (curr_sym_off >= -1 && curr_sym_off <= 14) in ath5k_hw_set_spur_mitigation_filter()
2045 plt_mag_map << (curr_sym_off - 15) * 2; in ath5k_hw_set_spur_mitigation_filter()
2048 plt_mag_map << (curr_sym_off - 31) * 2; in ath5k_hw_set_spur_mitigation_filter()
2051 plt_mag_map << (curr_sym_off - 47) * 2; in ath5k_hw_set_spur_mitigation_filter()
2149 * omnidirectional or sectorial and antennas 3-14 sectorial (or directional).
2154 * (0 for automatic selection, 1 - 14 antenna number).
2160 * AR5K_STA_ID1_DEFAULT_ANTENNA -> When 0 is set as the TX antenna on TX
2164 * AR5K_STA_ID1_DESC_ANTENNA -> Update default antenna after each TX frame to
2167 * AR5K_STA_ID1_RTS_DEF_ANTENNA -> Use default antenna for RTS or else use the
2170 * AR5K_STA_ID1_SELFGEN_DEF_ANT -> Use default antenna for self generated frames
2175 * AR5K_ANTMODE_DEFAULT -> Hw handles antenna diversity etc automatically
2177 * AR5K_ANTMODE_FIXED_A -> Only antenna A (MAIN) is present
2179 * AR5K_ANTMODE_FIXED_B -> Only antenna B (AUX) is present
2181 * AR5K_ANTMODE_SINGLE_AP -> Sta locked on a single ap
2183 * AR5K_ANTMODE_SECTOR_AP -> AP with tx antenna set on tx desc
2185 * AR5K_ANTMODE_SECTOR_STA -> STA with tx antenna set on tx desc
2187 * AR5K_ANTMODE_DEBUG Debug mode -A -> Rx, B-> Tx-
2194 * ath5k_hw_set_def_antenna() - Set default rx antenna on AR5211/5212 and newer
2201 if (ah->ah_version != AR5K_AR5210) in ath5k_hw_set_def_antenna()
2206 * ath5k_hw_set_fast_div() - Enable/disable fast rx antenna diversity
2250 * ath5k_hw_set_antenna_switch() - Set up antenna switch table
2266 if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_A) in ath5k_hw_set_antenna_switch()
2268 else if (ah->ah_ant_mode == AR5K_ANTMODE_FIXED_B) in ath5k_hw_set_antenna_switch()
2278 (ah->ah_ant_ctl[ee_mode][AR5K_ANT_CTL] | in ath5k_hw_set_antenna_switch()
2282 ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant0], in ath5k_hw_set_antenna_switch()
2284 ath5k_hw_reg_write(ah, ah->ah_ant_ctl[ee_mode][ant1], in ath5k_hw_set_antenna_switch()
2289 * ath5k_hw_set_antenna_mode() - Set antenna operating mode
2296 struct ieee80211_channel *channel = ah->ah_current_channel; in ath5k_hw_set_antenna_mode()
2306 ah->ah_ant_mode = ant_mode; in ath5k_hw_set_antenna_mode()
2310 def_ant = ah->ah_def_ant; in ath5k_hw_set_antenna_mode()
2379 ah->ah_tx_ant = tx_ant; in ath5k_hw_set_antenna_mode()
2380 ah->ah_ant_mode = ant_mode; in ath5k_hw_set_antenna_mode()
2381 ah->ah_def_ant = def_ant; in ath5k_hw_set_antenna_mode()
2410 * ath5k_get_interpolated_value() - Get interpolated Y val between two points
2434 ratio = ((100 * y_right - 100 * y_left) / (x_right - x_left)); in ath5k_get_interpolated_value()
2437 result = y_left + (ratio * (target - x_left) / 100); in ath5k_get_interpolated_value()
2443 * ath5k_get_linear_pcdac_min() - Find vertical boundary (min pwr) for the
2472 pwr_i--; in ath5k_get_linear_pcdac_min()
2486 pwr_i--; in ath5k_get_linear_pcdac_min()
2500 * ath5k_create_power_curve() - Create a Power to PDADC or PCDAC curve
2545 for (i = 0; (i <= (u16) (pmax - pmin)) && in ath5k_create_power_curve()
2551 if ((pwr_i > pwr[idx[1]]) && (idx[1] < num_points - 1)) { in ath5k_create_power_curve()
2567 * ath5k_get_chan_pcal_surrounding_piers() - Get surrounding calibration piers
2574 * Get the surrounding per-channel power calibration piers
2585 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_chan_pcal_surrounding_piers()
2589 u32 target = channel->center_freq; in ath5k_get_chan_pcal_surrounding_piers()
2594 switch (channel->hw_value) { in ath5k_get_chan_pcal_surrounding_piers()
2596 pcinfo = ee->ee_pwr_cal_a; in ath5k_get_chan_pcal_surrounding_piers()
2600 pcinfo = ee->ee_pwr_cal_b; in ath5k_get_chan_pcal_surrounding_piers()
2605 pcinfo = ee->ee_pwr_cal_g; in ath5k_get_chan_pcal_surrounding_piers()
2609 max = ee->ee_n_piers[mode] - 1; in ath5k_get_chan_pcal_surrounding_piers()
2629 * calibration piers so that we can in ath5k_get_chan_pcal_surrounding_piers()
2633 /* Frequency matches one of our calibration in ath5k_get_chan_pcal_surrounding_piers()
2635 * that calibration pier */ in ath5k_get_chan_pcal_surrounding_piers()
2641 /* We found a calibration pier that's above in ath5k_get_chan_pcal_surrounding_piers()
2646 idx_l = idx_r - 1; in ath5k_get_chan_pcal_surrounding_piers()
2657 * ath5k_get_rate_pcal_data() - Get the interpolated per-rate power
2658 * calibration data
2663 * Get the surrounding per-rate power calibration data
2673 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_rate_pcal_data()
2677 u32 target = channel->center_freq; in ath5k_get_rate_pcal_data()
2682 switch (channel->hw_value) { in ath5k_get_rate_pcal_data()
2684 rpinfo = ee->ee_rate_tpwr_a; in ath5k_get_rate_pcal_data()
2688 rpinfo = ee->ee_rate_tpwr_b; in ath5k_get_rate_pcal_data()
2693 rpinfo = ee->ee_rate_tpwr_g; in ath5k_get_rate_pcal_data()
2697 max = ee->ee_rate_target_pwr_num[mode] - 1; in ath5k_get_rate_pcal_data()
2699 /* Get the surrounding calibration in ath5k_get_rate_pcal_data()
2700 * piers - same as above */ in ath5k_get_rate_pcal_data()
2720 idx_l = idx_r - 1; in ath5k_get_rate_pcal_data()
2727 rates->freq = target; in ath5k_get_rate_pcal_data()
2729 rates->target_power_6to24 = in ath5k_get_rate_pcal_data()
2735 rates->target_power_36 = in ath5k_get_rate_pcal_data()
2741 rates->target_power_48 = in ath5k_get_rate_pcal_data()
2747 rates->target_power_54 = in ath5k_get_rate_pcal_data()
2755 * ath5k_get_max_ctl_power() - Get max edge power for a given frequency
2760 * we have such data from EEPROM's Conformance Test
2768 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_get_max_ctl_power()
2769 struct ath5k_edge_power *rep = ee->ee_ctl_pwr; in ath5k_get_max_ctl_power()
2770 u8 *ctl_val = ee->ee_ctl; in ath5k_get_max_ctl_power()
2771 s16 max_chan_pwr = ah->ah_txpower.txp_max_pwr / 4; in ath5k_get_max_ctl_power()
2776 u32 target = channel->center_freq; in ath5k_get_max_ctl_power()
2778 ctl_mode = ath_regd_get_band_ctl(regulatory, channel->band); in ath5k_get_max_ctl_power()
2780 switch (channel->hw_value) { in ath5k_get_max_ctl_power()
2782 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) in ath5k_get_max_ctl_power()
2788 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) in ath5k_get_max_ctl_power()
2800 for (i = 0; i < ee->ee_ctls; i++) { in ath5k_get_max_ctl_power()
2830 ah->ah_txpower.txp_max_pwr = 4 * min(edge_pwr, max_chan_pwr); in ath5k_get_max_ctl_power()
2841 * For RF5111 we have an XPD -eXternal Power Detector- curve
2847 * For RF5112 we have 4 XPD -eXternal Power Detector- curves
2848 * for each calibrated channel on 0, -6, -12 and -18dBm but we only
2852 * on hw, we get 4 points for xpd 0 (lower gain -> max power)
2853 * and 3 points for xpd 3 (higher gain -> lower power) from eeprom (eeprom.c)
2857 * -if we don't have calibration data for this specific channel- from the
2858 * available surrounding channels we have calibration data for, after we do a
2867 * ath5k_fill_pwr_to_pcdac_table() - Fill Power to PCDAC table on RF5111
2873 * do is fill the values below and above calibration range since eeprom data
2880 u8 *pcdac_out = ah->ah_txpower.txp_pd_table; in ath5k_fill_pwr_to_pcdac_table()
2881 u8 *pcdac_tmp = ah->ah_txpower.tmpL[0]; in ath5k_fill_pwr_to_pcdac_table()
2890 pcdac_n = pcdac_tmp[table_max[0] - table_min[0]]; in ath5k_fill_pwr_to_pcdac_table()
2912 * ath5k_combine_linear_pcdac_curves() - Combine available PCDAC Curves
2930 u8 *pcdac_out = ah->ah_txpower.txp_pd_table; in ath5k_combine_linear_pcdac_curves()
2952 pcdac_low_pwr = ah->ah_txpower.tmpL[1]; in ath5k_combine_linear_pcdac_curves()
2953 pcdac_high_pwr = ah->ah_txpower.tmpL[0]; in ath5k_combine_linear_pcdac_curves()
2954 mid_pwr_idx = table_max[1] - table_min[1] - 1; in ath5k_combine_linear_pcdac_curves()
2955 max_pwr_idx = (table_max[0] - table_min[0]) / 2; in ath5k_combine_linear_pcdac_curves()
2960 if (table_max[0] - table_min[1] > 126) in ath5k_combine_linear_pcdac_curves()
2961 min_pwr_idx = table_max[0] - 126; in ath5k_combine_linear_pcdac_curves()
2971 pcdac_low_pwr = ah->ah_txpower.tmpL[1]; /* Zeroed */ in ath5k_combine_linear_pcdac_curves()
2972 pcdac_high_pwr = ah->ah_txpower.tmpL[0]; in ath5k_combine_linear_pcdac_curves()
2974 max_pwr_idx = (table_max[0] - table_min[0]) / 2; in ath5k_combine_linear_pcdac_curves()
2980 ah->ah_txpower.txp_min_idx = min_pwr_idx / 2; in ath5k_combine_linear_pcdac_curves()
2984 for (i = 63; i >= 0; i--) { in ath5k_combine_linear_pcdac_curves()
2989 (2 * pwr <= (table_max[1] - table_min[0]) || pwr == 0)) { in ath5k_combine_linear_pcdac_curves()
2996 * already switched to the lower power curve -or in ath5k_combine_linear_pcdac_curves()
3002 i--; in ath5k_combine_linear_pcdac_curves()
3010 * 126 -this can happen because we OR pcdac_out in ath5k_combine_linear_pcdac_curves()
3016 pwr--; in ath5k_combine_linear_pcdac_curves()
3021 * ath5k_write_pcdac_table() - Write the PCDAC values on hw
3027 u8 *pcdac_out = ah->ah_txpower.txp_pd_table; in ath5k_write_pcdac_table()
3065 * ath5k_combine_pwr_to_pdadc_curves() - Combine the various PDADC curves
3081 u8 *pdadc_out = ah->ah_txpower.txp_pd_table; in ath5k_combine_pwr_to_pdadc_curves()
3095 pdadc_tmp = ah->ah_txpower.tmpL[pdg]; in ath5k_combine_pwr_to_pdadc_curves()
3097 if (pdg == pdcurves - 1) in ath5k_combine_pwr_to_pdadc_curves()
3118 pdadc_0 = (gain_boundaries[pdg - 1] - pwr_min[pdg]) - in ath5k_combine_pwr_to_pdadc_curves()
3122 if ((pdadc_tmp[1] - pdadc_tmp[0]) > 1) in ath5k_combine_pwr_to_pdadc_curves()
3123 pwr_step = pdadc_tmp[1] - pdadc_tmp[0]; in ath5k_combine_pwr_to_pdadc_curves()
3136 pdadc_n = gain_boundaries[pdg] + pd_gain_overlap - pwr_min[pdg]; in ath5k_combine_pwr_to_pdadc_curves()
3138 table_size = pwr_max[pdg] - pwr_min[pdg]; in ath5k_combine_pwr_to_pdadc_curves()
3150 if ((pdadc_tmp[table_size - 1] - pdadc_tmp[table_size - 2]) > 1) in ath5k_combine_pwr_to_pdadc_curves()
3151 pwr_step = pdadc_tmp[table_size - 1] - in ath5k_combine_pwr_to_pdadc_curves()
3152 pdadc_tmp[table_size - 2]; in ath5k_combine_pwr_to_pdadc_curves()
3159 s16 tmp = pdadc_tmp[table_size - 1] + in ath5k_combine_pwr_to_pdadc_curves()
3160 (pdadc_0 - max_idx) * pwr_step; in ath5k_combine_pwr_to_pdadc_curves()
3167 gain_boundaries[pdg] = gain_boundaries[pdg - 1]; in ath5k_combine_pwr_to_pdadc_curves()
3172 pdadc_out[pdadc_i] = pdadc_out[pdadc_i - 1]; in ath5k_combine_pwr_to_pdadc_curves()
3191 ah->ah_txpower.txp_min_idx = pwr_min[0]; in ath5k_combine_pwr_to_pdadc_curves()
3196 * ath5k_write_pwr_to_pdadc_table() - Write the PDADC values on hw
3203 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_write_pwr_to_pdadc_table()
3204 u8 *pdadc_out = ah->ah_txpower.txp_pd_table; in ath5k_write_pwr_to_pdadc_table()
3205 u8 *pdg_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_write_pwr_to_pdadc_table()
3206 u8 pdcurves = ee->ee_pd_gains[ee_mode]; in ath5k_write_pwr_to_pdadc_table()
3257 * ath5k_setup_channel_powertable() - Set up power table for this channel
3265 * This table is used for tx power calibration on the baseband,
3277 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; in ath5k_setup_channel_powertable()
3278 u8 *pdg_curve_to_idx = ee->ee_pdc_to_idx[ee_mode]; in ath5k_setup_channel_powertable()
3283 u32 target = channel->center_freq; in ath5k_setup_channel_powertable()
3293 for (pdg = 0; pdg < ee->ee_pd_gains[ee_mode]; pdg++) { in ath5k_setup_channel_powertable()
3297 * to higher power. Use curve -> idx in ath5k_setup_channel_powertable()
3302 pdg_L = &pcinfo_L->pd_curves[idx]; in ath5k_setup_channel_powertable()
3303 pdg_R = &pcinfo_R->pd_curves[idx]; in ath5k_setup_channel_powertable()
3306 tmpL = ah->ah_txpower.tmpL[pdg]; in ath5k_setup_channel_powertable()
3307 tmpR = ah->ah_txpower.tmpR[pdg]; in ath5k_setup_channel_powertable()
3315 table_min[pdg] = min(pdg_L->pd_pwr[0], in ath5k_setup_channel_powertable()
3316 pdg_R->pd_pwr[0]) / 2; in ath5k_setup_channel_powertable()
3318 table_max[pdg] = max(pdg_L->pd_pwr[pdg_L->pd_points - 1], in ath5k_setup_channel_powertable()
3319 pdg_R->pd_pwr[pdg_R->pd_points - 1]) / 2; in ath5k_setup_channel_powertable()
3328 table_min[pdg] = min(pdg_L->pd_pwr[0], in ath5k_setup_channel_powertable()
3329 pdg_R->pd_pwr[0]); in ath5k_setup_channel_powertable()
3332 max(pdg_L->pd_pwr[pdg_L->pd_points - 1], in ath5k_setup_channel_powertable()
3333 pdg_R->pd_pwr[pdg_R->pd_points - 1]); in ath5k_setup_channel_powertable()
3340 if (!(ee->ee_pd_gains[ee_mode] > 1 && pdg == 0)) { in ath5k_setup_channel_powertable()
3343 ath5k_get_linear_pcdac_min(pdg_L->pd_step, in ath5k_setup_channel_powertable()
3344 pdg_R->pd_step, in ath5k_setup_channel_powertable()
3345 pdg_L->pd_pwr, in ath5k_setup_channel_powertable()
3346 pdg_R->pd_pwr); in ath5k_setup_channel_powertable()
3352 if (table_max[pdg] - table_min[pdg] > 126) in ath5k_setup_channel_powertable()
3353 table_min[pdg] = table_max[pdg] - 126; in ath5k_setup_channel_powertable()
3362 pdg_L->pd_pwr, in ath5k_setup_channel_powertable()
3363 pdg_L->pd_step, in ath5k_setup_channel_powertable()
3364 pdg_L->pd_points, tmpL, type); in ath5k_setup_channel_powertable()
3366 /* We are in a calibration in ath5k_setup_channel_powertable()
3374 pdg_R->pd_pwr, in ath5k_setup_channel_powertable()
3375 pdg_R->pd_step, in ath5k_setup_channel_powertable()
3376 pdg_R->pd_points, tmpR, type); in ath5k_setup_channel_powertable()
3379 return -EINVAL; in ath5k_setup_channel_powertable()
3385 * pd gain. Re-use tmpL for interpolation in ath5k_setup_channel_powertable()
3387 for (i = 0; (i < (u16) (table_max[pdg] - table_min[pdg])) && in ath5k_setup_channel_powertable()
3390 (s16) pcinfo_L->freq, in ath5k_setup_channel_powertable()
3391 (s16) pcinfo_R->freq, in ath5k_setup_channel_powertable()
3398 * channel on tmpL (x range is table_max - table_min in ath5k_setup_channel_powertable()
3408 ah->ah_txpower.txp_min_pwr = ath5k_get_interpolated_value(target, in ath5k_setup_channel_powertable()
3409 (s16) pcinfo_L->freq, in ath5k_setup_channel_powertable()
3410 (s16) pcinfo_R->freq, in ath5k_setup_channel_powertable()
3411 pcinfo_L->min_pwr, pcinfo_R->min_pwr); in ath5k_setup_channel_powertable()
3413 ah->ah_txpower.txp_max_pwr = ath5k_get_interpolated_value(target, in ath5k_setup_channel_powertable()
3414 (s16) pcinfo_L->freq, in ath5k_setup_channel_powertable()
3415 (s16) pcinfo_R->freq, in ath5k_setup_channel_powertable()
3416 pcinfo_L->max_pwr, pcinfo_R->max_pwr); in ath5k_setup_channel_powertable()
3425 ee->ee_pd_gains[ee_mode]); in ath5k_setup_channel_powertable()
3430 ah->ah_txpower.txp_offset = 64 - (table_max[0] / 2); in ath5k_setup_channel_powertable()
3438 ah->ah_txpower.txp_min_idx = 0; in ath5k_setup_channel_powertable()
3439 ah->ah_txpower.txp_offset = 0; in ath5k_setup_channel_powertable()
3445 ee->ee_pd_gains[ee_mode]); in ath5k_setup_channel_powertable()
3449 ah->ah_txpower.txp_offset = table_min[0]; in ath5k_setup_channel_powertable()
3452 return -EINVAL; in ath5k_setup_channel_powertable()
3455 ah->ah_txpower.txp_setup = true; in ath5k_setup_channel_powertable()
3461 * ath5k_write_channel_powertable() - Set power table for current channel on hw
3477 * DOC: Per-rate tx power setting
3491 * Rate power table contains indices to PCDAC/PDADC table (0.5dB steps -
3493 * rates[0] - rates[7] -> OFDM rates
3494 * rates[8] - rates[14] -> CCK rates
3495 * rates[15] -> XR rates (they all have the same power)
3499 * ath5k_setup_rate_powertable() - Set up rate power table for a given tx power
3517 max_pwr = min(max_pwr, (u16) ah->ah_txpower.txp_max_pwr) / 2; in ath5k_setup_rate_powertable()
3520 rates = ah->ah_txpower.txp_rates_power_table; in ath5k_setup_rate_powertable()
3524 rates[i] = min(max_pwr, rate_info->target_power_6to24); in ath5k_setup_rate_powertable()
3527 rates[5] = min(rates[0], rate_info->target_power_36); in ath5k_setup_rate_powertable()
3528 rates[6] = min(rates[0], rate_info->target_power_48); in ath5k_setup_rate_powertable()
3529 rates[7] = min(rates[0], rate_info->target_power_54); in ath5k_setup_rate_powertable()
3533 rates[8] = min(rates[0], rate_info->target_power_6to24); in ath5k_setup_rate_powertable()
3535 rates[9] = min(rates[0], rate_info->target_power_36); in ath5k_setup_rate_powertable()
3537 rates[10] = min(rates[0], rate_info->target_power_36); in ath5k_setup_rate_powertable()
3539 rates[11] = min(rates[0], rate_info->target_power_48); in ath5k_setup_rate_powertable()
3541 rates[12] = min(rates[0], rate_info->target_power_48); in ath5k_setup_rate_powertable()
3543 rates[13] = min(rates[0], rate_info->target_power_54); in ath5k_setup_rate_powertable()
3545 rates[14] = min(rates[0], rate_info->target_power_54); in ath5k_setup_rate_powertable()
3548 rates[15] = min(rates[0], rate_info->target_power_6to24); in ath5k_setup_rate_powertable()
3555 (ah->ah_phy_revision < AR5K_SREV_PHY_5212A)) in ath5k_setup_rate_powertable()
3557 rates[i] -= ah->ah_txpower.txp_cck_ofdm_gainf_delta; in ath5k_setup_rate_powertable()
3565 ah->ah_txpower.txp_min_pwr = 2 * rates[7]; in ath5k_setup_rate_powertable()
3566 ah->ah_txpower.txp_cur_pwr = 2 * rates[0]; in ath5k_setup_rate_powertable()
3569 * -that is the txpower for 54Mbit-, it's used for the PAPD in ath5k_setup_rate_powertable()
3571 ah->ah_txpower.txp_ofdm = rates[7]; in ath5k_setup_rate_powertable()
3577 rate_idx_scaled = rates[i] + ah->ah_txpower.txp_offset; in ath5k_setup_rate_powertable()
3589 * ath5k_hw_txpower() - Set transmission power limit for a given channel
3602 struct ieee80211_channel *curr_channel = ah->ah_current_channel; in ath5k_hw_txpower()
3609 return -EINVAL; in ath5k_hw_txpower()
3615 switch (ah->ah_radio) { in ath5k_hw_txpower()
3633 return -EINVAL; in ath5k_hw_txpower()
3640 if (!ah->ah_txpower.txp_setup || in ath5k_hw_txpower()
3641 (channel->hw_value != curr_channel->hw_value) || in ath5k_hw_txpower()
3642 (channel->center_freq != curr_channel->center_freq)) { in ath5k_hw_txpower()
3645 int requested_txpower = ah->ah_txpower.txp_requested; in ath5k_hw_txpower()
3647 memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower)); in ath5k_hw_txpower()
3650 ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER; in ath5k_hw_txpower()
3652 ah->ah_txpower.txp_requested = requested_txpower; in ath5k_hw_txpower()
3673 /* Get surrounding channels for per-rate power table in ath5k_hw_txpower()
3674 * calibration */ in ath5k_hw_txpower()
3698 if (ah->ah_txpower.txp_tpc) { in ath5k_hw_txpower()
3716 * ath5k_hw_set_txpower_limit() - Set txpower limit for the current channel
3729 return ath5k_hw_txpower(ah, ah->ah_current_channel, txpower); in ath5k_hw_set_txpower_limit()
3738 * ath5k_hw_phy_init() - Initialize PHY
3765 curr_channel = ah->ah_current_channel; in ath5k_hw_phy_init()
3766 if (fast && (channel->hw_value != curr_channel->hw_value)) in ath5k_hw_phy_init()
3767 return -EINVAL; in ath5k_hw_phy_init()
3771 * while PHY is running, enable calibration and skip the rest. in ath5k_hw_phy_init()
3783 return -EIO; in ath5k_hw_phy_init()
3800 ret = ath5k_hw_txpower(ah, channel, ah->ah_txpower.txp_requested ? in ath5k_hw_phy_init()
3801 ah->ah_txpower.txp_requested * 2 : in ath5k_hw_phy_init()
3807 if (ah->ah_version == AR5K_AR5212 && in ath5k_hw_phy_init()
3808 channel->hw_value != AR5K_MODE_11B) { in ath5k_hw_phy_init()
3817 if (ah->ah_mac_srev >= AR5K_SREV_AR5424) in ath5k_hw_phy_init()
3824 * fire up NF calibration. in ath5k_hw_phy_init()
3826 * Note: Only NF calibration due to in ath5k_hw_phy_init()
3827 * channel change, not AGC calibration in ath5k_hw_phy_init()
3838 * Start NF calibration in ath5k_hw_phy_init()
3852 if (ah->ah_version != AR5K_AR5210) { in ath5k_hw_phy_init()
3858 ret = ath5k_hw_rfgain_init(ah, channel->band); in ath5k_hw_phy_init()
3873 if (ah->ah_radio == AR5K_RF5111) { in ath5k_hw_phy_init()
3882 } else if (ah->ah_version == AR5K_AR5210) { in ath5k_hw_phy_init()
3917 * Start automatic gain control calibration in ath5k_hw_phy_init()
3919 * During AGC calibration RX path is re-routed to in ath5k_hw_phy_init()
3923 * used together with on-the fly I/Q calibration (the in ath5k_hw_phy_init()
3927 * While rx path is re-routed to the power detector we also in ath5k_hw_phy_init()
3928 * start a noise floor calibration to measure the in ath5k_hw_phy_init()
3932 * If we are in a noisy environment, AGC calibration may time in ath5k_hw_phy_init()
3933 * out and/or noise floor calibration might timeout. in ath5k_hw_phy_init()
3938 /* At the same time start I/Q calibration for QAM constellation in ath5k_hw_phy_init()
3939 * -no need for CCK- */ in ath5k_hw_phy_init()
3940 ah->ah_iq_cal_needed = false; in ath5k_hw_phy_init()
3942 ah->ah_iq_cal_needed = true; in ath5k_hw_phy_init()
3949 /* Wait for gain calibration to finish (we check for I/Q calibration in ath5k_hw_phy_init()
3953 ATH5K_ERR(ah, "gain calibration timeout (%uMHz)\n", in ath5k_hw_phy_init()
3954 channel->center_freq); in ath5k_hw_phy_init()
3958 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode); in ath5k_hw_phy_init()