Lines Matching +full:13 +full:- +full:bit
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
88 #define RX_ATTENTION_INFO1_FIRST_MPDU BIT(0)
89 #define RX_ATTENTION_INFO1_RSVD_1A BIT(1)
90 #define RX_ATTENTION_INFO1_MCAST_BCAST BIT(2)
91 #define RX_ATTENTION_INFO1_AST_IDX_NOT_FOUND BIT(3)
92 #define RX_ATTENTION_INFO1_AST_IDX_TIMEDOUT BIT(4)
93 #define RX_ATTENTION_INFO1_POWER_MGMT BIT(5)
94 #define RX_ATTENTION_INFO1_NON_QOS BIT(6)
95 #define RX_ATTENTION_INFO1_NULL_DATA BIT(7)
96 #define RX_ATTENTION_INFO1_MGMT_TYPE BIT(8)
97 #define RX_ATTENTION_INFO1_CTRL_TYPE BIT(9)
98 #define RX_ATTENTION_INFO1_MORE_DATA BIT(10)
99 #define RX_ATTENTION_INFO1_EOSP BIT(11)
100 #define RX_ATTENTION_INFO1_A_MSDU_ERROR BIT(12)
101 #define RX_ATTENTION_INFO1_FRAGMENT BIT(13)
102 #define RX_ATTENTION_INFO1_ORDER BIT(14)
103 #define RX_ATTENTION_INFO1_CCE_MATCH BIT(15)
104 #define RX_ATTENTION_INFO1_OVERFLOW_ERR BIT(16)
105 #define RX_ATTENTION_INFO1_MSDU_LEN_ERR BIT(17)
106 #define RX_ATTENTION_INFO1_TCP_UDP_CKSUM_FAIL BIT(18)
107 #define RX_ATTENTION_INFO1_IP_CKSUM_FAIL BIT(19)
108 #define RX_ATTENTION_INFO1_SA_IDX_INVALID BIT(20)
109 #define RX_ATTENTION_INFO1_DA_IDX_INVALID BIT(21)
110 #define RX_ATTENTION_INFO1_RSVD_1B BIT(22)
111 #define RX_ATTENTION_INFO1_RX_IN_TX_DECRYPT_BYP BIT(23)
112 #define RX_ATTENTION_INFO1_ENCRYPT_REQUIRED BIT(24)
113 #define RX_ATTENTION_INFO1_DIRECTED BIT(25)
114 #define RX_ATTENTION_INFO1_BUFFER_FRAGMENT BIT(26)
115 #define RX_ATTENTION_INFO1_MPDU_LEN_ERR BIT(27)
116 #define RX_ATTENTION_INFO1_TKIP_MIC_ERR BIT(28)
117 #define RX_ATTENTION_INFO1_DECRYPT_ERR BIT(29)
118 #define RX_ATTENTION_INFO1_UNDECRYPT_FRAME_ERR BIT(30)
119 #define RX_ATTENTION_INFO1_FCS_ERR BIT(31)
121 #define RX_ATTENTION_INFO2_FLOW_IDX_TIMEOUT BIT(0)
122 #define RX_ATTENTION_INFO2_FLOW_IDX_INVALID BIT(1)
123 #define RX_ATTENTION_INFO2_WIFI_PARSER_ERR BIT(2)
124 #define RX_ATTENTION_INFO2_AMSDU_PARSER_ERR BIT(3)
125 #define RX_ATTENTION_INFO2_SA_IDX_TIMEOUT BIT(4)
126 #define RX_ATTENTION_INFO2_DA_IDX_TIMEOUT BIT(5)
127 #define RX_ATTENTION_INFO2_MSDU_LIMIT_ERR BIT(6)
128 #define RX_ATTENTION_INFO2_DA_IS_VALID BIT(7)
129 #define RX_ATTENTION_INFO2_DA_IS_MCBC BIT(8)
130 #define RX_ATTENTION_INFO2_SA_IS_VALID BIT(9)
132 #define RX_ATTENTION_INFO2_RX_BITMAP_NOT_UPDED BIT(13)
133 #define RX_ATTENTION_INFO2_MSDU_DONE BIT(31)
160 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
161 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
162 * 0. The PPDU start status will only be valid when this bit
167 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
180 * Power management bit set in the 802.11 header. Only set
184 * Set if packet is not a non-QoS data frame. Only set when
200 * Set if more bit in frame control is set. Only set when
204 * Set if the EOSP (end of service period) bit in the QoS
208 * Set if number of MSDUs in A-MSDU is above a threshold or if the
214 * set when either the more_frag bit is set in the frame
219 * Set if the order bit in the frame control is set. Only set
268 * 'no_ack' bit is the address search entry cleared.
276 * Indicates that the MPDU was pre-maturely terminated
297 * A-MSDU could not be properly de-agregated.
335 * valid. This bit must be in the last octet of the
339 #define RX_MPDU_START_INFO0_NDP_FRAME BIT(9)
340 #define RX_MPDU_START_INFO0_PHY_ERR BIT(10)
341 #define RX_MPDU_START_INFO0_PHY_ERR_MPDU_HDR BIT(11)
342 #define RX_MPDU_START_INFO0_PROTO_VER_ERR BIT(12)
343 #define RX_MPDU_START_INFO0_AST_LOOKUP_VALID BIT(13)
345 #define RX_MPDU_START_INFO1_MPDU_FCTRL_VALID BIT(0)
346 #define RX_MPDU_START_INFO1_MPDU_DUR_VALID BIT(1)
347 #define RX_MPDU_START_INFO1_MAC_ADDR1_VALID BIT(2)
348 #define RX_MPDU_START_INFO1_MAC_ADDR2_VALID BIT(3)
349 #define RX_MPDU_START_INFO1_MAC_ADDR3_VALID BIT(4)
350 #define RX_MPDU_START_INFO1_MAC_ADDR4_VALID BIT(5)
351 #define RX_MPDU_START_INFO1_MPDU_SEQ_CTRL_VALID BIT(6)
352 #define RX_MPDU_START_INFO1_MPDU_QOS_CTRL_VALID BIT(7)
353 #define RX_MPDU_START_INFO1_MPDU_HT_CTRL_VALID BIT(8)
354 #define RX_MPDU_START_INFO1_ENCRYPT_INFO_VALID BIT(9)
355 #define RX_MPDU_START_INFO1_MPDU_FRAG_NUMBER GENMASK(13, 10)
356 #define RX_MPDU_START_INFO1_MORE_FRAG_FLAG BIT(14)
357 #define RX_MPDU_START_INFO1_FROM_DS BIT(16)
358 #define RX_MPDU_START_INFO1_TO_DS BIT(17)
359 #define RX_MPDU_START_INFO1_ENCRYPTED BIT(18)
360 #define RX_MPDU_START_INFO1_MPDU_RETRY BIT(19)
363 #define RX_MPDU_START_INFO2_EPD_EN BIT(0)
364 #define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD BIT(1)
367 #define RX_MPDU_START_INFO2_MESH_STA BIT(8)
368 #define RX_MPDU_START_INFO2_BSSID_HIT BIT(9)
369 #define RX_MPDU_START_INFO2_BSSID_NUM GENMASK(13, 10)
374 #define RX_MPDU_START_INFO3_FLOW_ID_TOEPLITZ BIT(7)
375 #define RX_MPDU_START_INFO3_PKT_SEL_FP_UCAST_DATA BIT(8)
376 #define RX_MPDU_START_INFO3_PKT_SEL_FP_MCAST_DATA BIT(9)
377 #define RX_MPDU_START_INFO3_PKT_SEL_FP_CTRL_BAR BIT(10)
379 #define RX_MPDU_START_INFO3_RXDMA0_DST_RING_SEL GENMASK(14, 13)
383 #define RX_MPDU_START_INFO4_PRE_DELIM_ERR_WARN BIT(24)
384 #define RX_MPDU_START_INFO4_FIRST_DELIM_ERR BIT(25)
387 #define RX_MPDU_START_INFO5_NEW_PEER_ENTRY BIT(8)
388 #define RX_MPDU_START_INFO5_DECRYPT_NEEDED BIT(9)
390 #define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING BIT(12)
391 #define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING BIT(13)
392 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C BIT(14)
393 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S BIT(15)
395 #define RX_MPDU_START_INFO5_AMPDU_FLAG BIT(28)
396 #define RX_MPDU_START_INFO5_BAR_FRAME BIT(29)
398 #define RX_MPDU_START_INFO6_MPDU_LEN GENMASK(13, 0)
399 #define RX_MPDU_START_INFO6_FIRST_MPDU BIT(14)
400 #define RX_MPDU_START_INFO6_MCAST_BCAST BIT(15)
401 #define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND BIT(16)
402 #define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT BIT(17)
403 #define RX_MPDU_START_INFO6_POWER_MGMT BIT(18)
404 #define RX_MPDU_START_INFO6_NON_QOS BIT(19)
405 #define RX_MPDU_START_INFO6_NULL_DATA BIT(20)
406 #define RX_MPDU_START_INFO6_MGMT_TYPE BIT(21)
407 #define RX_MPDU_START_INFO6_CTRL_TYPE BIT(22)
408 #define RX_MPDU_START_INFO6_MORE_DATA BIT(23)
409 #define RX_MPDU_START_INFO6_EOSP BIT(24)
410 #define RX_MPDU_START_INFO6_FRAGMENT BIT(25)
411 #define RX_MPDU_START_INFO6_ORDER BIT(26)
412 #define RX_MPDU_START_INFO6_UAPSD_TRIGGER BIT(27)
413 #define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED BIT(28)
414 #define RX_MPDU_START_INFO6_DIRECTED BIT(29)
416 #define RX_MPDU_START_RAW_MPDU BIT(0)
446 #define RX_MPDU_START_INFO7_FLOW_ID_TOEPLITZ BIT(7)
447 #define RX_MPDU_START_INFO7_PKT_SEL_FP_UCAST_DATA BIT(8)
448 #define RX_MPDU_START_INFO7_PKT_SEL_FP_MCAST_DATA BIT(9)
449 #define RX_MPDU_START_INFO7_PKT_SEL_FP_CTRL_BAR BIT(10)
451 #define RX_MPDU_START_INFO7_RXDMA0_DST_RING_SEL GENMASK(14, 13)
455 #define RX_MPDU_START_INFO8_PRE_DELIM_ERR_WARN BIT(24)
456 #define RX_MPDU_START_INFO8_FIRST_DELIM_ERR BIT(25)
458 #define RX_MPDU_START_INFO9_EPD_EN BIT(0)
459 #define RX_MPDU_START_INFO9_ALL_FRAME_ENCPD BIT(1)
463 #define RX_MPDU_START_INFO9_BSSID_HIT BIT(10)
469 #define RX_MPDU_START_INFO10_NDP_FRAME BIT(9)
470 #define RX_MPDU_START_INFO10_PHY_ERR BIT(10)
471 #define RX_MPDU_START_INFO10_PHY_ERR_MPDU_HDR BIT(11)
472 #define RX_MPDU_START_INFO10_PROTO_VER_ERR BIT(12)
473 #define RX_MPDU_START_INFO10_AST_LOOKUP_VALID BIT(13)
475 #define RX_MPDU_START_INFO11_MPDU_FCTRL_VALID BIT(0)
476 #define RX_MPDU_START_INFO11_MPDU_DUR_VALID BIT(1)
477 #define RX_MPDU_START_INFO11_MAC_ADDR1_VALID BIT(2)
478 #define RX_MPDU_START_INFO11_MAC_ADDR2_VALID BIT(3)
479 #define RX_MPDU_START_INFO11_MAC_ADDR3_VALID BIT(4)
480 #define RX_MPDU_START_INFO11_MAC_ADDR4_VALID BIT(5)
481 #define RX_MPDU_START_INFO11_MPDU_SEQ_CTRL_VALID BIT(6)
482 #define RX_MPDU_START_INFO11_MPDU_QOS_CTRL_VALID BIT(7)
483 #define RX_MPDU_START_INFO11_MPDU_HT_CTRL_VALID BIT(8)
484 #define RX_MPDU_START_INFO11_ENCRYPT_INFO_VALID BIT(9)
485 #define RX_MPDU_START_INFO11_MPDU_FRAG_NUMBER GENMASK(13, 10)
486 #define RX_MPDU_START_INFO11_MORE_FRAG_FLAG BIT(14)
487 #define RX_MPDU_START_INFO11_FROM_DS BIT(16)
488 #define RX_MPDU_START_INFO11_TO_DS BIT(17)
489 #define RX_MPDU_START_INFO11_ENCRYPTED BIT(18)
490 #define RX_MPDU_START_INFO11_MPDU_RETRY BIT(19)
494 #define RX_MPDU_START_INFO12_NEW_PEER_ENTRY BIT(8)
495 #define RX_MPDU_START_INFO12_DECRYPT_NEEDED BIT(9)
497 #define RX_MPDU_START_INFO12_VLAN_TAG_C_PADDING BIT(12)
498 #define RX_MPDU_START_INFO12_VLAN_TAG_S_PADDING BIT(13)
499 #define RX_MPDU_START_INFO12_STRIP_VLAN_TAG_C BIT(14)
500 #define RX_MPDU_START_INFO12_STRIP_VLAN_TAG_S BIT(15)
502 #define RX_MPDU_START_INFO12_AMPDU_FLAG BIT(28)
503 #define RX_MPDU_START_INFO12_BAR_FRAME BIT(29)
504 #define RX_MPDU_START_INFO12_RAW_MPDU BIT(30)
506 #define RX_MPDU_START_INFO13_MPDU_LEN GENMASK(13, 0)
507 #define RX_MPDU_START_INFO13_FIRST_MPDU BIT(14)
508 #define RX_MPDU_START_INFO13_MCAST_BCAST BIT(15)
509 #define RX_MPDU_START_INFO13_AST_IDX_NOT_FOUND BIT(16)
510 #define RX_MPDU_START_INFO13_AST_IDX_TIMEOUT BIT(17)
511 #define RX_MPDU_START_INFO13_POWER_MGMT BIT(18)
512 #define RX_MPDU_START_INFO13_NON_QOS BIT(19)
513 #define RX_MPDU_START_INFO13_NULL_DATA BIT(20)
514 #define RX_MPDU_START_INFO13_MGMT_TYPE BIT(21)
515 #define RX_MPDU_START_INFO13_CTRL_TYPE BIT(22)
516 #define RX_MPDU_START_INFO13_MORE_DATA BIT(23)
517 #define RX_MPDU_START_INFO13_EOSP BIT(24)
518 #define RX_MPDU_START_INFO13_FRAGMENT BIT(25)
519 #define RX_MPDU_START_INFO13_ORDER BIT(26)
520 #define RX_MPDU_START_INFO13_UAPSD_TRIGGER BIT(27)
521 #define RX_MPDU_START_INFO13_ENCRYPT_REQUIRED BIT(28)
522 #define RX_MPDU_START_INFO13_DIRECTED BIT(29)
523 #define RX_MPDU_START_INFO13_AMSDU_PRESENT BIT(30)
631 * Protected bit from the frame control.
634 * Retry bit from frame control. Only valid when first_msdu is set.
699 * When RXPCU sets bit 'ast_index_not_found or ast_index_timeout',
700 * RXPCU will also ensure that this bit is NOT set. CRYPTO for that
701 * reason only needs to evaluate this bit and non of the other ones
719 * received MPDU in the PPDU and this MPDU gets filtered-in,
728 * Received frame was part of an A-MPDU.
773 #define RX_MSDU_START_INFO1_MSDU_LENGTH GENMASK(13, 0)
774 #define RX_MSDU_START_INFO1_RSVD_1A BIT(14)
775 #define RX_MSDU_START_INFO1_IPSEC_ESP BIT(15)
777 #define RX_MSDU_START_INFO1_IPSEC_AH BIT(23)
782 #define RX_MSDU_START_INFO2_IPV4 BIT(10)
783 #define RX_MSDU_START_INFO2_IPV6 BIT(11)
784 #define RX_MSDU_START_INFO2_TCP BIT(12)
785 #define RX_MSDU_START_INFO2_UDP BIT(13)
786 #define RX_MSDU_START_INFO2_IP_FRAG BIT(14)
787 #define RX_MSDU_START_INFO2_TCP_ONLY_ACK BIT(15)
788 #define RX_MSDU_START_INFO2_DA_IS_BCAST_MCAST BIT(16)
790 #define RX_MSDU_START_INFO2_IP_FIXED_HDR_VALID BIT(19)
791 #define RX_MSDU_START_INFO2_IP_EXTN_HDR_VALID BIT(20)
792 #define RX_MSDU_START_INFO2_IP_TCP_UDP_HDR_VALID BIT(21)
793 #define RX_MSDU_START_INFO2_MESH_CTRL_PRESENT BIT(22)
794 #define RX_MSDU_START_INFO2_LDPC BIT(23)
800 #define RX_MSDU_START_INFO3_STBC BIT(12)
801 #define RX_MSDU_START_INFO3_SGI GENMASK(14, 13)
869 * Depending upon mode bit, this field either indicates the
879 * Depending upon mode bit, this field either indicates the
911 * Indicates that either the IP More frag bit is set or IP frag
912 * number is non-zero. If set indicates that this is a fragmented
916 * Set if only the TCP Ack bit is set in the TCP flags and if
924 * 0 - Toeplitz hash of 2-tuple (IP source address, IP
926 * 1 - Toeplitz hash of 4-tuple (IP source address,
929 * 2 - Toeplitz of flow_id
930 * 3 - Zero is used
933 * Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
942 * Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
951 * For IPv4, this is the 8 bit protocol field set). For IPv6 this
952 * is the 8 bit next_header field.
955 * Controlled by RxOLE register - If register bit set to 0,
956 * Toeplitz hash is computed over 2-tuple IPv4 or IPv6 src/dest
957 * addresses; otherwise, toeplitz hash is computed over 4-tuple
961 * Toeplitz hash of 5-tuple
963 * destination port, L4 protocol} in case of non-IPSec.
965 * In case of IPSec - Toeplitz hash of 4-tuple
1003 * Bitmap, with each bit indicating if the related spatial
1008 * 0 - spatial stream not used for this reception
1009 * 1 - spatial stream used for this reception
1024 #define RX_MSDU_END_INFO1_CCE_SUPER_RULE GENMASK(13, 8)
1025 #define RX_MSDU_END_INFO1_CCND_TRUNCATE BIT(14)
1026 #define RX_MSDU_END_INFO1_CCND_CCE_DIS BIT(15)
1029 #define RX_MSDU_END_INFO2_REPORTED_MPDU_LEN GENMASK(13, 0)
1030 #define RX_MSDU_END_INFO2_FIRST_MSDU BIT(14)
1031 #define RX_MSDU_END_INFO2_FIRST_MSDU_WCN6855 BIT(28)
1032 #define RX_MSDU_END_INFO2_LAST_MSDU BIT(15)
1033 #define RX_MSDU_END_INFO2_LAST_MSDU_WCN6855 BIT(29)
1034 #define RX_MSDU_END_INFO2_SA_IDX_TIMEOUT BIT(16)
1035 #define RX_MSDU_END_INFO2_DA_IDX_TIMEOUT BIT(17)
1036 #define RX_MSDU_END_INFO2_MSDU_LIMIT_ERR BIT(18)
1037 #define RX_MSDU_END_INFO2_FLOW_IDX_TIMEOUT BIT(19)
1038 #define RX_MSDU_END_INFO2_FLOW_IDX_INVALID BIT(20)
1039 #define RX_MSDU_END_INFO2_WIFI_PARSER_ERR BIT(21)
1040 #define RX_MSDU_END_INFO2_AMSDU_PARSET_ERR BIT(22)
1041 #define RX_MSDU_END_INFO2_SA_IS_VALID BIT(23)
1042 #define RX_MSDU_END_INFO2_DA_IS_VALID BIT(24)
1043 #define RX_MSDU_END_INFO2_DA_IS_MCBC BIT(25)
1047 #define RX_MSDU_END_INFO3_LRO_ELIGIBLE BIT(9)
1051 #define RX_MSDU_END_INFO4_DA_OFFSET_VALID BIT(12)
1052 #define RX_MSDU_END_INFO4_SA_OFFSET_VALID BIT(13)
1055 #define RX_MSDU_END_INFO5_MSDU_DROP BIT(0)
1107 #define RX_MSDU_END_MPDU_LENGTH_INFO GENMASK(13, 0)
1111 #define RX_MSDU_END_INFO2_DA_OFFSET_VALID BIT(12)
1112 #define RX_MSDU_END_INFO2_SA_OFFSET_VALID BIT(13)
1115 #define RX_MSDU_END_INFO4_SA_IDX_TIMEOUT BIT(0)
1116 #define RX_MSDU_END_INFO4_DA_IDX_TIMEOUT BIT(1)
1117 #define RX_MSDU_END_INFO4_MSDU_LIMIT_ERR BIT(2)
1118 #define RX_MSDU_END_INFO4_FLOW_IDX_TIMEOUT BIT(3)
1119 #define RX_MSDU_END_INFO4_FLOW_IDX_INVALID BIT(4)
1120 #define RX_MSDU_END_INFO4_WIFI_PARSER_ERR BIT(5)
1121 #define RX_MSDU_END_INFO4_AMSDU_PARSER_ERR BIT(6)
1122 #define RX_MSDU_END_INFO4_SA_IS_VALID BIT(7)
1123 #define RX_MSDU_END_INFO4_DA_IS_VALID BIT(8)
1124 #define RX_MSDU_END_INFO4_DA_IS_MCBC BIT(9)
1126 #define RX_MSDU_END_INFO4_FIRST_MSDU BIT(12)
1127 #define RX_MSDU_END_INFO4_LAST_MSDU BIT(13)
1130 #define RX_MSDU_END_INFO6_FLOW_AGGR_CONTN BIT(8)
1131 #define RX_MSDU_END_INFO6_FISA_TIMEOUT BIT(9)
1179 * The value of the computed TCP/UDP checksum. A mode bit
1201 * A-MPDU delimiter or the preamble length field for non-A-MPDU
1205 * Indicates the first MSDU of A-MSDU. If both first_msdu and
1206 * last_msdu are set in the MSDU then this is a non-aggregated MSDU
1207 * frame: normal MPDU. Interior MSDU in an A-MSDU shall have both
1211 * Indicates the last MSDU of the A-MSDU. MPDU end status is only
1235 * A-MSDU could not be properly de-agregated.
1252 * 32 bit CRC computed out of IP v6 extension headers.
1278 * of a dynamic A-MSDU when DA is compressed.
1282 * of a dynamic A-MSDU when SA is compressed.
1285 * The 16-bit type value indicating the type of L3 later
1328 #define RX_MPDU_END_INFO1_UNSUP_KTYPE_SHORT_FRAME BIT(11)
1329 #define RX_MPDU_END_INFO1_RX_IN_TX_DECRYPT_BYT BIT(12)
1330 #define RX_MPDU_END_INFO1_OVERFLOW_ERR BIT(13)
1331 #define RX_MPDU_END_INFO1_MPDU_LEN_ERR BIT(14)
1332 #define RX_MPDU_END_INFO1_TKIP_MIC_ERR BIT(15)
1333 #define RX_MPDU_END_INFO1_DECRYPT_ERR BIT(16)
1334 #define RX_MPDU_END_INFO1_UNENCRYPTED_FRAME_ERR BIT(17)
1335 #define RX_MPDU_END_INFO1_PN_FIELDS_VALID BIT(18)
1336 #define RX_MPDU_END_INFO1_FCS_ERR BIT(19)
1337 #define RX_MPDU_END_INFO1_MSDU_LEN_ERR BIT(20)
1341 #define RX_MPDU_END_INFO1_RX_BITMAP_NOT_UPD BIT(28)
1365 * This bit will be '1' when WEP or TKIP or WAPI key type is
1367 * packet without decryption to RxOLE after setting this bit.