277 	for (i = 0, msi_data_idx = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pcic_get_ce_msi_idx()
308 	for (i = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pcic_free_irq()
353 	for (i = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pcic_ce_irqs_disable()
365 	for (i = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pcic_sync_ce_irqs()
568 		if (ab->hw_params.ring_mask->tx[i] ||  in ath11k_pcic_ext_irq_config()
569 		    ab->hw_params.ring_mask->rx[i] ||  in ath11k_pcic_ext_irq_config()
570 		    ab->hw_params.ring_mask->rx_err[i] ||  in ath11k_pcic_ext_irq_config()
571 		    ab->hw_params.ring_mask->rx_wbm_rel[i] ||  in ath11k_pcic_ext_irq_config()
572 		    ab->hw_params.ring_mask->reo_status[i] ||  in ath11k_pcic_ext_irq_config()
573 		    ab->hw_params.ring_mask->rxdma2host[i] ||  in ath11k_pcic_ext_irq_config()
574 		    ab->hw_params.ring_mask->host2rxdma[i] ||  in ath11k_pcic_ext_irq_config()
575 		    ab->hw_params.ring_mask->rx_mon_status[i]) {  in ath11k_pcic_ext_irq_config()
630 	for (i = 0, msi_data_idx = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pcic_config_irq()
673 	for (i = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pcic_ce_irqs_enable()
685 	for (i = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pcic_kill_tasklets()
728 	for (i = 0; i < ab->hw_params.svc_to_ce_map_len; i++) {  in ath11k_pcic_map_service_to_pipe()
729 		entry = &ab->hw_params.svc_to_ce_map[i];  in ath11k_pcic_map_service_to_pipe()
785 	for (i = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pci_enable_ce_irqs_except_wake_irq()
800 	for (i = 0; i < ab->hw_params.ce_count; i++) {  in ath11k_pci_disable_ce_irqs_except_wake_irq()