73 	u32 phy_id;  in asix_get_phyid()  local
78 		phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);  in asix_get_phyid()
89 	phy_id = (phy_reg & 0xffff) << 16;  in asix_get_phyid()
91 	phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);  in asix_get_phyid()
95 	phy_id |= (phy_reg & 0xffff);  in asix_get_phyid()
97 	return phy_id;  in asix_get_phyid()
208 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits);  in asix_phy_reset()
215 		if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR)  in asix_phy_reset()
223 		   dev->mii.phy_id);  in asix_phy_reset()
266 	dev->mii.phy_id = asix_read_phy_addr(dev, true);  in ax88172_bind()
267 	if (dev->mii.phy_id < 0)  in ax88172_bind()
268 		return dev->mii.phy_id;  in ax88172_bind()
276 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,  in ax88172_bind()
419 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772_hw_reset()
509 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
525 		phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
527 		phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
529 		phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
538 			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
542 			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
546 			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
961 	reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);  in marvell_phy_init()
964 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,  in marvell_phy_init()
968 		reg = asix_mdio_read(dev->net, dev->mii.phy_id,  in marvell_phy_init()
974 		asix_mdio_write(dev->net, dev->mii.phy_id,  in marvell_phy_init()
977 		reg = asix_mdio_read(dev->net, dev->mii.phy_id,  in marvell_phy_init()
991 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);  in rtl8211cl_phy_init()
992 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);  in rtl8211cl_phy_init()
993 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,  in rtl8211cl_phy_init()
994 		asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);  in rtl8211cl_phy_init()
995 	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);  in rtl8211cl_phy_init()
998 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);  in rtl8211cl_phy_init()
999 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);  in rtl8211cl_phy_init()
1000 		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);  in rtl8211cl_phy_init()
1008 	u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);  in marvell_led_status()
1027 	asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);  in marvell_led_status()
1106 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,  in ax88178_reset()
1108 	asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,  in ax88178_reset()
1259 	dev->mii.phy_id = asix_read_phy_addr(dev, true);  in ax88178_bind()
1260 	if (dev->mii.phy_id < 0)  in ax88178_bind()
1261 		return dev->mii.phy_id;  in ax88178_bind()