2 /* Driver for the Texas Instruments DP83867 PHY
19 #include <dt-bindings/net/ti-dp83867.h>
471 	struct dp83867_private *dp83867 =  in dp83867_config_port_mirroring()  local
474 	if (dp83867->port_mirroring == DP83867_PORT_MIRROING_EN)  in dp83867_config_port_mirroring()
485 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_verify_rgmii_cfg()  local
509 	     dp83867->rx_id_delay == DP83867_RGMII_RX_CLK_DELAY_INV) {  in dp83867_verify_rgmii_cfg()
517 	     dp83867->tx_id_delay == DP83867_RGMII_TX_CLK_DELAY_INV) {  in dp83867_verify_rgmii_cfg()
528 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init_io_impedance()  local
544 			dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;  in dp83867_of_init_io_impedance()
546 			dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;  in dp83867_of_init_io_impedance()
548 			dp83867->io_impedance = -1; /* leave at default */  in dp83867_of_init_io_impedance()
566 	dp83867->io_impedance = val;  in dp83867_of_init_io_impedance()
573 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init()  local
583 				   &dp83867->clk_output_sel);  in dp83867_of_init()
586 		dp83867->set_clk_output = true;  in dp83867_of_init()
590 		if (dp83867->clk_output_sel > DP83867_CLK_O_SEL_REF_CLK &&  in dp83867_of_init()
591 		    dp83867->clk_output_sel != DP83867_CLK_O_SEL_OFF) {  in dp83867_of_init()
593 				   dp83867->clk_output_sel);  in dp83867_of_init()
602 	dp83867->rxctrl_strap_quirk = of_property_read_bool(of_node,  in dp83867_of_init()
603 							    "ti,dp83867-rxctrl-strap-quirk");  in dp83867_of_init()
605 	dp83867->sgmii_ref_clk_en = of_property_read_bool(of_node,  in dp83867_of_init()
608 	dp83867->rx_id_delay = DP83867_RGMII_RX_CLK_DELAY_INV;  in dp83867_of_init()
610 				   &dp83867->rx_id_delay);  in dp83867_of_init()
611 	if (!ret && dp83867->rx_id_delay > DP83867_RGMII_RX_CLK_DELAY_MAX) {  in dp83867_of_init()
614 			   dp83867->rx_id_delay);  in dp83867_of_init()
618 	dp83867->tx_id_delay = DP83867_RGMII_TX_CLK_DELAY_INV;  in dp83867_of_init()
620 				   &dp83867->tx_id_delay);  in dp83867_of_init()
621 	if (!ret && dp83867->tx_id_delay > DP83867_RGMII_TX_CLK_DELAY_MAX) {  in dp83867_of_init()
624 			   dp83867->tx_id_delay);  in dp83867_of_init()
629 		dp83867->port_mirroring = DP83867_PORT_MIRROING_EN;  in dp83867_of_init()
632 		dp83867->port_mirroring = DP83867_PORT_MIRROING_DIS;  in dp83867_of_init()
635 				   &dp83867->tx_fifo_depth);  in dp83867_of_init()
638 					   &dp83867->tx_fifo_depth);  in dp83867_of_init()
640 			dp83867->tx_fifo_depth =  in dp83867_of_init()
644 	if (dp83867->tx_fifo_depth > DP83867_PHYCR_FIFO_DEPTH_MAX) {  in dp83867_of_init()
646 			   dp83867->tx_fifo_depth);  in dp83867_of_init()
651 				   &dp83867->rx_fifo_depth);  in dp83867_of_init()
653 		dp83867->rx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;  in dp83867_of_init()
655 	if (dp83867->rx_fifo_depth > DP83867_PHYCR_FIFO_DEPTH_MAX) {  in dp83867_of_init()
657 			   dp83867->rx_fifo_depth);  in dp83867_of_init()
666 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init()  local
675 	dp83867->rx_id_delay = delay & DP83867_RGMII_RX_CLK_DELAY_MAX;  in dp83867_of_init()
676 	dp83867->tx_id_delay = (delay >> DP83867_RGMII_TX_CLK_DELAY_SHIFT) &  in dp83867_of_init()
683 	dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN / 2;  in dp83867_of_init()
689 	dp83867->tx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;  in dp83867_of_init()
690 	dp83867->rx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;  in dp83867_of_init()
698 	struct dp83867_private *dp83867;  in dp83867_probe()  local
700 	dp83867 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83867),  in dp83867_probe()
702 	if (!dp83867)  in dp83867_probe()
705 	phydev->priv = dp83867;  in dp83867_probe()
712 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_config_init()  local
727 	if (dp83867->rxctrl_strap_quirk)  in dp83867_config_init()
752 		val |= (dp83867->tx_fifo_depth <<  in dp83867_config_init()
757 			val |= (dp83867->rx_fifo_depth <<  in dp83867_config_init()
811 		if (dp83867->rx_id_delay != DP83867_RGMII_RX_CLK_DELAY_INV)  in dp83867_config_init()
812 			delay |= dp83867->rx_id_delay;  in dp83867_config_init()
813 		if (dp83867->tx_id_delay != DP83867_RGMII_TX_CLK_DELAY_INV)  in dp83867_config_init()
814 			delay |= dp83867->tx_id_delay <<  in dp83867_config_init()
822 	if (dp83867->io_impedance >= 0)  in dp83867_config_init()
825 			       dp83867->io_impedance);  in dp83867_config_init()
858 		if (dp83867->sgmii_ref_clk_en)  in dp83867_config_init()
868 		if (dp83867->rxctrl_strap_quirk)  in dp83867_config_init()
881 	if (dp83867->port_mirroring != DP83867_PORT_MIRROING_KEEP)  in dp83867_config_init()
885 	if (dp83867->set_clk_output) {  in dp83867_config_init()
888 		if (dp83867->clk_output_sel == DP83867_CLK_O_SEL_OFF) {  in dp83867_config_init()
892 			val = dp83867->clk_output_sel <<  in dp83867_config_init()
919 	/* There is a limitation in DP83867 PHY device where SGMII AN is  in dp83867_link_change_notify()
947 		.name		= "TI DP83867",
980 MODULE_DESCRIPTION("Texas Instruments DP83867 PHY driver");