123 static int dp83822_set_wol(struct phy_device *phydev,  in dp83822_set_wol()  argument
126 	struct net_device *ndev = phydev->attached_dev;  in dp83822_set_wol()
139 		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA1,  in dp83822_set_wol()
141 		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA2,  in dp83822_set_wol()
143 		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA3,  in dp83822_set_wol()
146 		value = phy_read_mmd(phydev, DP83822_DEVADDR,  in dp83822_set_wol()
154 			phy_write_mmd(phydev, DP83822_DEVADDR,  in dp83822_set_wol()
157 			phy_write_mmd(phydev, DP83822_DEVADDR,  in dp83822_set_wol()
160 			phy_write_mmd(phydev, DP83822_DEVADDR,  in dp83822_set_wol()
169 		phy_read(phydev, MII_DP83822_MISR2);  in dp83822_set_wol()
174 		return phy_write_mmd(phydev, DP83822_DEVADDR,  in dp83822_set_wol()
177 		return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,  in dp83822_set_wol()
182 static void dp83822_get_wol(struct phy_device *phydev,  in dp83822_get_wol()  argument
191 	value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);  in dp83822_get_wol()
197 		sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,  in dp83822_get_wol()
202 		sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,  in dp83822_get_wol()
207 		sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,  in dp83822_get_wol()
220 static int dp83822_config_intr(struct phy_device *phydev)  in dp83822_config_intr()  argument
222 	struct dp83822_private *dp83822 = phydev->priv;  in dp83822_config_intr()
227 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {  in dp83822_config_intr()
228 		misr_status = phy_read(phydev, MII_DP83822_MISR1);  in dp83822_config_intr()
242 		err = phy_write(phydev, MII_DP83822_MISR1, misr_status);  in dp83822_config_intr()
246 		misr_status = phy_read(phydev, MII_DP83822_MISR2);  in dp83822_config_intr()
260 		err = phy_write(phydev, MII_DP83822_MISR2, misr_status);  in dp83822_config_intr()
264 		physcr_status = phy_read(phydev, MII_DP83822_PHYSCR);  in dp83822_config_intr()
271 		err = phy_write(phydev, MII_DP83822_MISR1, 0);  in dp83822_config_intr()
275 		err = phy_write(phydev, MII_DP83822_MISR2, 0);  in dp83822_config_intr()
279 		physcr_status = phy_read(phydev, MII_DP83822_PHYSCR);  in dp83822_config_intr()
286 	return phy_write(phydev, MII_DP83822_PHYSCR, physcr_status);  in dp83822_config_intr()
289 static irqreturn_t dp83822_handle_interrupt(struct phy_device *phydev)  in dp83822_handle_interrupt()  argument
301 	irq_status = phy_read(phydev, MII_DP83822_MISR1);  in dp83822_handle_interrupt()
303 		phy_error(phydev);  in dp83822_handle_interrupt()
309 	irq_status = phy_read(phydev, MII_DP83822_MISR2);  in dp83822_handle_interrupt()
311 		phy_error(phydev);  in dp83822_handle_interrupt()
320 	phy_trigger_machine(phydev);  in dp83822_handle_interrupt()
325 static int dp8382x_disable_wol(struct phy_device *phydev)  in dp8382x_disable_wol()  argument
327 	return phy_clear_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,  in dp8382x_disable_wol()
332 static int dp83822_read_status(struct phy_device *phydev)  in dp83822_read_status()  argument
334 	struct dp83822_private *dp83822 = phydev->priv;  in dp83822_read_status()
335 	int status = phy_read(phydev, MII_DP83822_PHYSTS);  in dp83822_read_status()
341 			phydev->speed = SPEED_UNKNOWN;  in dp83822_read_status()
342 			phydev->duplex = DUPLEX_UNKNOWN;  in dp83822_read_status()
344 			ctrl2 = phy_read(phydev, MII_DP83822_CTRL_2);  in dp83822_read_status()
349 				ret = phy_write(phydev, MII_DP83822_CTRL_2,  in dp83822_read_status()
357 	ret = genphy_read_status(phydev);  in dp83822_read_status()
365 		phydev->duplex = DUPLEX_FULL;  in dp83822_read_status()
367 		phydev->duplex = DUPLEX_HALF;  in dp83822_read_status()
370 		phydev->speed = SPEED_10;  in dp83822_read_status()
372 		phydev->speed = SPEED_100;  in dp83822_read_status()
377 static int dp83822_config_init(struct phy_device *phydev)  in dp83822_config_init()  argument
379 	struct dp83822_private *dp83822 = phydev->priv;  in dp83822_config_init()
380 	struct device *dev = &phydev->mdio.dev;  in dp83822_config_init()
387 	if (phy_interface_is_rgmii(phydev)) {  in dp83822_config_init()
388 		rx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0,  in dp83822_config_init()
396 		tx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0,  in dp83822_config_init()
404 			err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,  in dp83822_config_init()
410 		phy_set_bits_mmd(phydev, DP83822_DEVADDR,  in dp83822_config_init()
413 		phy_clear_bits_mmd(phydev, DP83822_DEVADDR,  in dp83822_config_init()
418 		err = phy_modify(phydev, MII_DP83822_CTRL_2,  in dp83822_config_init()
424 		linkmode_and(phydev->advertising, phydev->advertising,  in dp83822_config_init()
425 			     phydev->supported);  in dp83822_config_init()
428 				 phydev->supported);  in dp83822_config_init()
430 				 phydev->advertising);  in dp83822_config_init()
432 				 phydev->supported);  in dp83822_config_init()
434 				 phydev->supported);  in dp83822_config_init()
436 				 phydev->advertising);  in dp83822_config_init()
438 				 phydev->advertising);  in dp83822_config_init()
441 		bmcr = phy_read(phydev, MII_BMCR);  in dp83822_config_init()
446 			err =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);  in dp83822_config_init()
450 		phydev->autoneg = AUTONEG_DISABLE;  in dp83822_config_init()
452 				   phydev->supported);  in dp83822_config_init()
454 				   phydev->advertising);  in dp83822_config_init()
457 		err = phy_modify_changed(phydev, MII_ADVERTISE,  in dp83822_config_init()
465 			err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,  in dp83822_config_init()
472 	return dp8382x_disable_wol(phydev);  in dp83822_config_init()
475 static int dp8382x_config_init(struct phy_device *phydev)  in dp8382x_config_init()  argument
477 	return dp8382x_disable_wol(phydev);  in dp8382x_config_init()
480 static int dp83822_phy_reset(struct phy_device *phydev)  in dp83822_phy_reset()  argument
484 	err = phy_write(phydev, MII_DP83822_RESET_CTRL, DP83822_SW_RESET);  in dp83822_phy_reset()
488 	return phydev->drv->config_init(phydev);  in dp83822_phy_reset()
492 static int dp83822_of_init(struct phy_device *phydev)  in dp83822_of_init()  argument
494 	struct dp83822_private *dp83822 = phydev->priv;  in dp83822_of_init()
495 	struct device *dev = &phydev->mdio.dev;  in dp83822_of_init()
511 static int dp83822_of_init(struct phy_device *phydev)  in dp83822_of_init()  argument
517 static int dp83822_read_straps(struct phy_device *phydev)  in dp83822_read_straps()  argument
519 	struct dp83822_private *dp83822 = phydev->priv;  in dp83822_read_straps()
523 	val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1);  in dp83822_read_straps()
542 static int dp83822_probe(struct phy_device *phydev)  in dp83822_probe()  argument
547 	dp83822 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83822),  in dp83822_probe()
552 	phydev->priv = dp83822;  in dp83822_probe()
554 	ret = dp83822_read_straps(phydev);  in dp83822_probe()
558 	dp83822_of_init(phydev);  in dp83822_probe()
561 		phydev->port = PORT_FIBRE;  in dp83822_probe()
566 static int dp83822_suspend(struct phy_device *phydev)  in dp83822_suspend()  argument
570 	value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);  in dp83822_suspend()
573 		genphy_suspend(phydev);  in dp83822_suspend()
578 static int dp83822_resume(struct phy_device *phydev)  in dp83822_resume()  argument
582 	genphy_resume(phydev);  in dp83822_resume()
584 	value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);  in dp83822_resume()
586 	phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, value |  in dp83822_resume()