20 #define BRCM_PHY_MODEL(phydev) \  argument
21 	((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
23 #define BRCM_PHY_REV(phydev) \  argument
24 	((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
35 static int bcm54xx_config_clock_delay(struct phy_device *phydev)  in bcm54xx_config_clock_delay()  argument
40 	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);  in bcm54xx_config_clock_delay()
42 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||  in bcm54xx_config_clock_delay()
43 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {  in bcm54xx_config_clock_delay()
47 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in bcm54xx_config_clock_delay()
48 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {  in bcm54xx_config_clock_delay()
52 	rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,  in bcm54xx_config_clock_delay()
58 	val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL);  in bcm54xx_config_clock_delay()
59 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII ||  in bcm54xx_config_clock_delay()
60 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {  in bcm54xx_config_clock_delay()
64 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in bcm54xx_config_clock_delay()
65 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {  in bcm54xx_config_clock_delay()
69 	rc = bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val);  in bcm54xx_config_clock_delay()
76 static int bcm54210e_config_init(struct phy_device *phydev)  in bcm54210e_config_init()  argument
80 	bcm54xx_config_clock_delay(phydev);  in bcm54210e_config_init()
82 	if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) {  in bcm54210e_config_init()
83 		val = phy_read(phydev, MII_CTRL1000);  in bcm54210e_config_init()
85 		phy_write(phydev, MII_CTRL1000, val);  in bcm54210e_config_init()
91 static int bcm54612e_config_init(struct phy_device *phydev)  in bcm54612e_config_init()  argument
95 	bcm54xx_config_clock_delay(phydev);  in bcm54612e_config_init()
98 	if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {  in bcm54612e_config_init()
101 		reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);  in bcm54612e_config_init()
102 		err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,  in bcm54612e_config_init()
112 static int bcm54616s_config_init(struct phy_device *phydev)  in bcm54616s_config_init()  argument
116 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&  in bcm54616s_config_init()
117 	    phydev->interface != PHY_INTERFACE_MODE_1000BASEX)  in bcm54616s_config_init()
122 	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);  in bcm54616s_config_init()
127 	rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,  in bcm54616s_config_init()
133 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);  in bcm54616s_config_init()
137 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);  in bcm54616s_config_init()
142 	rc = phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN);  in bcm54616s_config_init()
148 	val |= phydev->interface == PHY_INTERFACE_MODE_SGMII ?  in bcm54616s_config_init()
151 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);  in bcm54616s_config_init()
156 	rc = phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);  in bcm54616s_config_init()
162 	rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val);  in bcm54616s_config_init()
167 	return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);  in bcm54616s_config_init()
171 static int bcm50610_a0_workaround(struct phy_device *phydev)  in bcm50610_a0_workaround()  argument
175 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH0,  in bcm50610_a0_workaround()
181 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH3,  in bcm50610_a0_workaround()
186 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75,  in bcm50610_a0_workaround()
191 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP96,  in bcm50610_a0_workaround()
196 	err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP97,  in bcm50610_a0_workaround()
202 static int bcm54xx_phydsp_config(struct phy_device *phydev)  in bcm54xx_phydsp_config()  argument
207 	err = bcm54xx_auxctl_write(phydev,  in bcm54xx_phydsp_config()
214 	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||  in bcm54xx_phydsp_config()
215 	    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) {  in bcm54xx_phydsp_config()
217 		err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08,  in bcm54xx_phydsp_config()
222 		if (phydev->drv->phy_id == PHY_ID_BCM50610) {  in bcm54xx_phydsp_config()
223 			err = bcm50610_a0_workaround(phydev);  in bcm54xx_phydsp_config()
229 	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) {  in bcm54xx_phydsp_config()
232 		val = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP75);  in bcm54xx_phydsp_config()
237 		err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, val);  in bcm54xx_phydsp_config()
242 	err2 = bcm54xx_auxctl_write(phydev,  in bcm54xx_phydsp_config()
250 static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)  in bcm54xx_adjust_rxrefclk()  argument
257 	if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &&  in bcm54xx_adjust_rxrefclk()
258 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &&  in bcm54xx_adjust_rxrefclk()
259 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M &&  in bcm54xx_adjust_rxrefclk()
260 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54210E &&  in bcm54xx_adjust_rxrefclk()
261 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 &&  in bcm54xx_adjust_rxrefclk()
262 	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811)  in bcm54xx_adjust_rxrefclk()
265 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);  in bcm54xx_adjust_rxrefclk()
271 	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||  in bcm54xx_adjust_rxrefclk()
272 	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&  in bcm54xx_adjust_rxrefclk()
273 	    BRCM_PHY_REV(phydev) >= 0x3) {  in bcm54xx_adjust_rxrefclk()
280 		if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) {  in bcm54xx_adjust_rxrefclk()
281 			if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) {  in bcm54xx_adjust_rxrefclk()
289 	if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))  in bcm54xx_adjust_rxrefclk()
294 	if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) {  in bcm54xx_adjust_rxrefclk()
295 		if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E ||  in bcm54xx_adjust_rxrefclk()
296 		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 ||  in bcm54xx_adjust_rxrefclk()
297 		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811)  in bcm54xx_adjust_rxrefclk()
304 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);  in bcm54xx_adjust_rxrefclk()
306 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD);  in bcm54xx_adjust_rxrefclk()
312 	if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))  in bcm54xx_adjust_rxrefclk()
318 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val);  in bcm54xx_adjust_rxrefclk()
321 static void bcm54xx_ptp_stop(struct phy_device *phydev)  in bcm54xx_ptp_stop()  argument
323 	struct bcm54xx_phy_priv *priv = phydev->priv;  in bcm54xx_ptp_stop()
329 static void bcm54xx_ptp_config_init(struct phy_device *phydev)  in bcm54xx_ptp_config_init()  argument
331 	struct bcm54xx_phy_priv *priv = phydev->priv;  in bcm54xx_ptp_config_init()
334 		bcm_ptp_config_init(phydev);  in bcm54xx_ptp_config_init()
337 static int bcm54xx_config_init(struct phy_device *phydev)  in bcm54xx_config_init()  argument
341 	reg = phy_read(phydev, MII_BCM54XX_ECR);  in bcm54xx_config_init()
347 	err = phy_write(phydev, MII_BCM54XX_ECR, reg);  in bcm54xx_config_init()
355 	err = phy_write(phydev, MII_BCM54XX_IMR, reg);  in bcm54xx_config_init()
359 	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||  in bcm54xx_config_init()
360 	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&  in bcm54xx_config_init()
361 	    (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE))  in bcm54xx_config_init()
362 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_RGMII_MODE, 0);  in bcm54xx_config_init()
364 	bcm54xx_adjust_rxrefclk(phydev);  in bcm54xx_config_init()
366 	switch (BRCM_PHY_MODEL(phydev)) {  in bcm54xx_config_init()
369 		err = bcm54xx_config_clock_delay(phydev);  in bcm54xx_config_init()
372 		err = bcm54210e_config_init(phydev);  in bcm54xx_config_init()
375 		err = bcm54612e_config_init(phydev);  in bcm54xx_config_init()
378 		err = bcm54616s_config_init(phydev);  in bcm54xx_config_init()
382 		val = bcm_phy_read_exp(phydev,  in bcm54xx_config_init()
385 		err = bcm_phy_write_exp(phydev,  in bcm54xx_config_init()
393 	bcm54xx_phydsp_config(phydev);  in bcm54xx_config_init()
403 	if (!phy_on_sfp(phydev)) {  in bcm54xx_config_init()
406 		bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, val);  in bcm54xx_config_init()
411 		bcm_phy_write_exp(phydev, BCM_EXP_MULTICOLOR, val);  in bcm54xx_config_init()
414 	bcm54xx_ptp_config_init(phydev);  in bcm54xx_config_init()
419 static int bcm54xx_iddq_set(struct phy_device *phydev, bool enable)  in bcm54xx_iddq_set()  argument
423 	if (!(phydev->dev_flags & PHY_BRCM_IDDQ_SUSPEND))  in bcm54xx_iddq_set()
426 	ret = bcm_phy_read_exp(phydev, BCM54XX_TOP_MISC_IDDQ_CTRL);  in bcm54xx_iddq_set()
435 	ret = bcm_phy_write_exp(phydev, BCM54XX_TOP_MISC_IDDQ_CTRL, ret);  in bcm54xx_iddq_set()
440 static int bcm54xx_suspend(struct phy_device *phydev)  in bcm54xx_suspend()  argument
444 	bcm54xx_ptp_stop(phydev);  in bcm54xx_suspend()
450 	ret = phy_write(phydev, MII_BMCR, BMCR_PDOWN);  in bcm54xx_suspend()
454 	return bcm54xx_iddq_set(phydev, true);  in bcm54xx_suspend()
457 static int bcm54xx_resume(struct phy_device *phydev)  in bcm54xx_resume()  argument
461 	ret = bcm54xx_iddq_set(phydev, false);  in bcm54xx_resume()
468 	ret = genphy_resume(phydev);  in bcm54xx_resume()
480 	if (phydev->dev_flags & PHY_BRCM_IDDQ_SUSPEND) {  in bcm54xx_resume()
481 		ret = genphy_soft_reset(phydev);  in bcm54xx_resume()
486 	return bcm54xx_config_init(phydev);  in bcm54xx_resume()
489 static int bcm54811_config_init(struct phy_device *phydev)  in bcm54811_config_init()  argument
494 	reg = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL);  in bcm54811_config_init()
496 	err = bcm_phy_write_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL,  in bcm54811_config_init()
501 	err = bcm54xx_config_init(phydev);  in bcm54811_config_init()
504 	if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {  in bcm54811_config_init()
505 		reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);  in bcm54811_config_init()
506 		err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,  in bcm54811_config_init()
515 static int bcm5481_config_aneg(struct phy_device *phydev)  in bcm5481_config_aneg()  argument
517 	struct device_node *np = phydev->mdio.dev.of_node;  in bcm5481_config_aneg()
521 	ret = genphy_config_aneg(phydev);  in bcm5481_config_aneg()
524 	bcm54xx_config_clock_delay(phydev);  in bcm5481_config_aneg()
528 		ret = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_SEL_ER + 0x9,  in bcm5481_config_aneg()
541 static int bcm54616s_probe(struct phy_device *phydev)  in bcm54616s_probe()  argument
546 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);  in bcm54616s_probe()
550 	phydev->priv = priv;  in bcm54616s_probe()
552 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);  in bcm54616s_probe()
563 		val = bcm_phy_read_shadow(phydev, BCM54616S_SHD_100FX_CTRL);  in bcm54616s_probe()
575 		phydev->port = PORT_FIBRE;  in bcm54616s_probe()
581 static int bcm54616s_config_aneg(struct phy_device *phydev)  in bcm54616s_config_aneg()  argument
583 	struct bcm54616s_phy_priv *priv = phydev->priv;  in bcm54616s_config_aneg()
588 		ret = genphy_c37_config_aneg(phydev);  in bcm54616s_config_aneg()
590 		ret = genphy_config_aneg(phydev);  in bcm54616s_config_aneg()
593 	bcm54xx_config_clock_delay(phydev);  in bcm54616s_config_aneg()
598 static int bcm54616s_read_status(struct phy_device *phydev)  in bcm54616s_read_status()  argument
600 	struct bcm54616s_phy_priv *priv = phydev->priv;  in bcm54616s_read_status()
604 		err = genphy_c37_read_status(phydev);  in bcm54616s_read_status()
606 		err = genphy_read_status(phydev);  in bcm54616s_read_status()
611 static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set)  in brcm_phy_setbits()  argument
615 	val = phy_read(phydev, reg);  in brcm_phy_setbits()
619 	return phy_write(phydev, reg, val | set);  in brcm_phy_setbits()
622 static int brcm_fet_config_init(struct phy_device *phydev)  in brcm_fet_config_init()  argument
627 	err = phy_write(phydev, MII_BMCR, BMCR_RESET);  in brcm_fet_config_init()
647 	err = phy_read(phydev, MII_BMCR);  in brcm_fet_config_init()
651 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_config_init()
662 	err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);  in brcm_fet_config_init()
667 	brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST);  in brcm_fet_config_init()
673 	err = phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);  in brcm_fet_config_init()
678 	reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4);  in brcm_fet_config_init()
687 	err = phy_write(phydev, MII_BRCM_FET_SHDW_AUXMODE4, reg);  in brcm_fet_config_init()
692 	err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_MISCCTRL,  in brcm_fet_config_init()
697 	if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) {  in brcm_fet_config_init()
699 		err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2,  in brcm_fet_config_init()
705 	err2 = phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);  in brcm_fet_config_init()
712 static int brcm_fet_ack_interrupt(struct phy_device *phydev)  in brcm_fet_ack_interrupt()  argument
717 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_ack_interrupt()
724 static int brcm_fet_config_intr(struct phy_device *phydev)  in brcm_fet_config_intr()  argument
728 	reg = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_config_intr()
732 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {  in brcm_fet_config_intr()
733 		err = brcm_fet_ack_interrupt(phydev);  in brcm_fet_config_intr()
738 		err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);  in brcm_fet_config_intr()
741 		err = phy_write(phydev, MII_BRCM_FET_INTREG, reg);  in brcm_fet_config_intr()
745 		err = brcm_fet_ack_interrupt(phydev);  in brcm_fet_config_intr()
751 static irqreturn_t brcm_fet_handle_interrupt(struct phy_device *phydev)  in brcm_fet_handle_interrupt()  argument
755 	irq_status = phy_read(phydev, MII_BRCM_FET_INTREG);  in brcm_fet_handle_interrupt()
757 		phy_error(phydev);  in brcm_fet_handle_interrupt()
764 	phy_trigger_machine(phydev);  in brcm_fet_handle_interrupt()
769 static int brcm_fet_suspend(struct phy_device *phydev)  in brcm_fet_suspend()  argument
776 	err = phy_write(phydev, MII_BMCR, BMCR_PDOWN);  in brcm_fet_suspend()
781 	brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST);  in brcm_fet_suspend()
787 	err = phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg);  in brcm_fet_suspend()
792 	err = phy_modify(phydev, MII_BRCM_FET_SHDW_AUXMODE4,  in brcm_fet_suspend()
797 	err2 = phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest);  in brcm_fet_suspend()
804 static int bcm54xx_phy_probe(struct phy_device *phydev)  in bcm54xx_phy_probe()  argument
808 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);  in bcm54xx_phy_probe()
812 	phydev->priv = priv;  in bcm54xx_phy_probe()
814 	priv->stats = devm_kcalloc(&phydev->mdio.dev,  in bcm54xx_phy_probe()
815 				   bcm_phy_get_sset_count(phydev), sizeof(u64),  in bcm54xx_phy_probe()
820 	priv->ptp = bcm_ptp_probe(phydev);  in bcm54xx_phy_probe()
827 static void bcm54xx_get_stats(struct phy_device *phydev,  in bcm54xx_get_stats()  argument
830 	struct bcm54xx_phy_priv *priv = phydev->priv;  in bcm54xx_get_stats()
832 	bcm_phy_get_stats(phydev, priv->stats, stats, data);  in bcm54xx_get_stats()
835 static void bcm54xx_link_change_notify(struct phy_device *phydev)  in bcm54xx_link_change_notify()  argument
841 	if (phydev->state != PHY_RUNNING)  in bcm54xx_link_change_notify()
847 	if (!(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))  in bcm54xx_link_change_notify()
850 	ret = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP08);  in bcm54xx_link_change_notify()
858 	if (phydev->speed == SPEED_10)  in bcm54xx_link_change_notify()
862 	bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08, ret);  in bcm54xx_link_change_notify()