Lines Matching +full:no +full:- +full:tick +full:- +full:in +full:- +full:suspend

1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2014-2017 Broadcom
11 #include "bcm-phy-lib.h"
59 /* AFE_RXCONFIG_2, set rCal offset for HT=0 code and LT=-2 code */ in bcm7xxx_28nm_d0_afe_config_init()
74 /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal in bcm7xxx_28nm_d0_afe_config_init()
82 /* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */ in bcm7xxx_28nm_d0_afe_config_init()
102 /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal in bcm7xxx_28nm_e0_plus_afe_config_init()
110 /* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */ in bcm7xxx_28nm_e0_plus_afe_config_init()
146 u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags); in bcm7xxx_28nm_config_init()
147 u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags); in bcm7xxx_28nm_config_init()
152 * standard location in MII_PHYS_ID[23] in bcm7xxx_28nm_config_init()
155 rev = phydev->phy_id & ~phydev->drv->phy_id_mask; in bcm7xxx_28nm_config_init()
158 phydev_name(phydev), phydev->drv->name, rev, patch); in bcm7xxx_28nm_config_init()
211 /* Re-apply workarounds coming out suspend/resume */ in bcm7xxx_28nm_resume()
216 /* 28nm Gigabit PHYs come out of reset without any half-duplex in bcm7xxx_28nm_resume()
219 * gracefully handles auto-negotiated and forced modes. in bcm7xxx_28nm_resume()
248 mutex_lock(&dev->mdio.bus->mdio_lock); in phy_set_clr_bits()
250 mutex_unlock(&dev->mdio.bus->mdio_lock); in phy_set_clr_bits()
265 /* Set current trim values INT_trim = -1, Ext_trim =0 */ in bcm7xxx_28nm_ephy_01_afe_config_init()
300 /* The 28nm EPHY does not support Clause 45 (MMD) used by bcm-phy-lib */
311 /* Enable auto-power down */ in bcm7xxx_28nm_ephy_apd_enable()
391 u8 rev = phydev->phy_id & ~phydev->drv->phy_id_mask; in bcm7xxx_28nm_ephy_config_init()
395 phydev_name(phydev), phydev->drv->name, rev); in bcm7xxx_28nm_ephy_config_init()
404 /* Apply AFE software work-around if necessary */ in bcm7xxx_28nm_ephy_config_init()
471 /* AFE_CAL_CONFIG_0, no reset and analog powerup */ in bcm7xxx_16nm_ephy_afe_config()
493 /* Correct RCAL code + 1 is -1% rprogr, LP: +16 */ in bcm7xxx_16nm_ephy_afe_config()
495 /* Correct RCAL code + 1 is -15 rprogr, 11: +10 */ in bcm7xxx_16nm_ephy_afe_config()
518 /* Non-overlap fix */ in bcm7xxx_16nm_ephy_afe_config()
594 /* Re-apply workarounds coming out suspend/resume */ in bcm7xxx_16nm_ephy_resume()
637 return -EOPNOTSUPP; in bcm7xxx_28nm_ephy_read_mmd()
667 return -EOPNOTSUPP; in bcm7xxx_28nm_ephy_write_mmd()
680 /* Write the desired value in the shadow register */ in bcm7xxx_28nm_ephy_write_mmd()
693 /* Re-apply workarounds coming out suspend/resume */ in bcm7xxx_28nm_ephy_resume()
732 /* Workaround for putting the PHY in IDDQ mode, required
766 switch (tuna->id) { in bcm7xxx_28nm_get_tunable()
770 return -EOPNOTSUPP; in bcm7xxx_28nm_get_tunable()
781 switch (tuna->id) { in bcm7xxx_28nm_set_tunable()
786 return -EOPNOTSUPP; in bcm7xxx_28nm_set_tunable()
793 * from successfully linking up, trigger auto-negotiation restart in bcm7xxx_28nm_set_tunable()
806 struct bcm7xxx_phy_priv *priv = phydev->priv; in bcm7xxx_28nm_get_phy_stats()
808 bcm_phy_get_stats(phydev, priv->stats, stats, data); in bcm7xxx_28nm_get_phy_stats()
816 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); in bcm7xxx_28nm_probe()
818 return -ENOMEM; in bcm7xxx_28nm_probe()
820 phydev->priv = priv; in bcm7xxx_28nm_probe()
822 priv->stats = devm_kcalloc(&phydev->mdio.dev, in bcm7xxx_28nm_probe()
825 if (!priv->stats) in bcm7xxx_28nm_probe()
826 return -ENOMEM; in bcm7xxx_28nm_probe()
828 priv->clk = devm_clk_get_optional(&phydev->mdio.dev, NULL); in bcm7xxx_28nm_probe()
829 if (IS_ERR(priv->clk)) in bcm7xxx_28nm_probe()
830 return PTR_ERR(priv->clk); in bcm7xxx_28nm_probe()
832 ret = clk_prepare_enable(priv->clk); in bcm7xxx_28nm_probe()
849 struct bcm7xxx_phy_priv *priv = phydev->priv; in bcm7xxx_28nm_remove()
851 clk_disable_unprepare(priv->clk); in bcm7xxx_28nm_remove()
899 .suspend = bcm7xxx_suspend, \