Lines Matching +full:13 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define DW_VENDOR BIT(15)
16 #define DW_USXGMII_RST BIT(10)
17 #define DW_USXGMII_EN BIT(9)
22 #define DW_USXGMII_FULL BIT(8)
23 #define DW_USXGMII_SS_MASK (BIT(13) | BIT(6) | BIT(5))
24 #define DW_USXGMII_10000 (BIT(13) | BIT(6))
25 #define DW_USXGMII_5000 (BIT(13) | BIT(5))
26 #define DW_USXGMII_2500 (BIT(5))
27 #define DW_USXGMII_1000 (BIT(6))
28 #define DW_USXGMII_100 (BIT(13))
41 #define DW_C73_PAUSE BIT(10)
42 #define DW_C73_ASYM_PAUSE BIT(11)
45 #define DW_C73_1000KX BIT(5)
46 #define DW_C73_10000KX4 BIT(6)
47 #define DW_C73_10000KR BIT(7)
49 #define DW_C73_2500KX BIT(0)
50 #define DW_C73_5000KR BIT(1)
59 #define DW_VR_MII_DIG_CTRL1_2G5_EN BIT(2)
66 #define DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW BIT(9)
69 #define DW_VR_MII_DIG_CTRL2_TX_POL_INV BIT(4)
70 #define DW_VR_MII_DIG_CTRL2_RX_POL_INV BIT(0)
74 #define DW_VR_MII_TX_CONFIG_MASK BIT(3)
83 #define DW_VR_MII_AN_STS_C37_ANSGM_FD BIT(1)
89 #define DW_VR_MII_C37_ANSGM_SP_LNKSTS BIT(4)
92 #define AN_CL37_EN BIT(12) /* Enable Clause 37 auto-nego */
93 #define SGMII_SPEED_SS13 BIT(13) /* SGMII speed along with SS6 */
94 #define SGMII_SPEED_SS6 BIT(6) /* SGMII speed along with SS13 */
97 #define DW_VR_MII_EEE_LTX_EN BIT(0) /* LPI Tx Enable */
98 #define DW_VR_MII_EEE_LRX_EN BIT(1) /* LPI Rx Enable */
99 #define DW_VR_MII_EEE_TX_QUIET_EN BIT(2) /* Tx Quiet Enable */
100 #define DW_VR_MII_EEE_RX_QUIET_EN BIT(3) /* Rx Quiet Enable */
101 #define DW_VR_MII_EEE_TX_EN_CTRL BIT(4) /* Tx Control Enable */
102 #define DW_VR_MII_EEE_RX_EN_CTRL BIT(7) /* Rx Control Enable */
108 #define DW_VR_MII_EEE_TRN_LPI BIT(0) /* Transparent Mode Enable */