137 	int (*pma_config)(struct dw_xpcs *xpcs);
162 int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface)  in xpcs_get_an_mode()  argument
166 	compat = xpcs_find_compat(xpcs->id, interface);  in xpcs_get_an_mode()
189 int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg)  in xpcs_read()  argument
191 	struct mii_bus *bus = xpcs->mdiodev->bus;  in xpcs_read()
192 	int addr = xpcs->mdiodev->addr;  in xpcs_read()
197 int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val)  in xpcs_write()  argument
199 	struct mii_bus *bus = xpcs->mdiodev->bus;  in xpcs_write()
200 	int addr = xpcs->mdiodev->addr;  in xpcs_write()
205 static int xpcs_modify_changed(struct dw_xpcs *xpcs, int dev, u32 reg,  in xpcs_modify_changed()  argument
210 	return mdiodev_modify_changed(xpcs->mdiodev, reg_addr, mask, set);  in xpcs_modify_changed()
213 static int xpcs_read_vendor(struct dw_xpcs *xpcs, int dev, u32 reg)  in xpcs_read_vendor()  argument
215 	return xpcs_read(xpcs, dev, DW_VENDOR | reg);  in xpcs_read_vendor()
218 static int xpcs_write_vendor(struct dw_xpcs *xpcs, int dev, int reg,  in xpcs_write_vendor()  argument
221 	return xpcs_write(xpcs, dev, DW_VENDOR | reg, val);  in xpcs_write_vendor()
224 static int xpcs_read_vpcs(struct dw_xpcs *xpcs, int reg)  in xpcs_read_vpcs()  argument
226 	return xpcs_read_vendor(xpcs, MDIO_MMD_PCS, reg);  in xpcs_read_vpcs()
229 static int xpcs_write_vpcs(struct dw_xpcs *xpcs, int reg, u16 val)  in xpcs_write_vpcs()  argument
231 	return xpcs_write_vendor(xpcs, MDIO_MMD_PCS, reg, val);  in xpcs_write_vpcs()
234 static int xpcs_poll_reset(struct dw_xpcs *xpcs, int dev)  in xpcs_poll_reset()  argument
242 		ret = xpcs_read(xpcs, dev, MDIO_CTRL1);  in xpcs_poll_reset()
250 static int xpcs_soft_reset(struct dw_xpcs *xpcs,  in xpcs_soft_reset()  argument
268 	ret = xpcs_write(xpcs, dev, MDIO_CTRL1, MDIO_CTRL1_RESET);  in xpcs_soft_reset()
272 	return xpcs_poll_reset(xpcs, dev);  in xpcs_soft_reset()
281 static int xpcs_read_fault_c73(struct dw_xpcs *xpcs,  in xpcs_read_fault_c73()  argument
286 	ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT1);  in xpcs_read_fault_c73()
291 		xpcs_warn(xpcs, state, "Link fault condition detected!\n");  in xpcs_read_fault_c73()
295 	ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2);  in xpcs_read_fault_c73()
300 		xpcs_warn(xpcs, state, "Receiver fault detected!\n");  in xpcs_read_fault_c73()
302 		xpcs_warn(xpcs, state, "Transmitter fault detected!\n");  in xpcs_read_fault_c73()
304 	ret = xpcs_read_vendor(xpcs, MDIO_MMD_PCS, DW_VR_XS_PCS_DIG_STS);  in xpcs_read_fault_c73()
309 		xpcs_warn(xpcs, state, "FIFO fault condition detected!\n");  in xpcs_read_fault_c73()
313 	ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1);  in xpcs_read_fault_c73()
318 		xpcs_warn(xpcs, state, "Link is not locked!\n");  in xpcs_read_fault_c73()
320 	ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT2);  in xpcs_read_fault_c73()
325 		xpcs_warn(xpcs, state, "Link has errors!\n");  in xpcs_read_fault_c73()
332 static int xpcs_read_link_c73(struct dw_xpcs *xpcs, bool an)  in xpcs_read_link_c73()  argument
337 	ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT1);  in xpcs_read_link_c73()
345 		ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_STAT1);  in xpcs_read_link_c73()
372 static void xpcs_config_usxgmii(struct dw_xpcs *xpcs, int speed)  in xpcs_config_usxgmii()  argument
400 	ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1);  in xpcs_config_usxgmii()
404 	ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_EN);  in xpcs_config_usxgmii()
408 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1);  in xpcs_config_usxgmii()
415 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret);  in xpcs_config_usxgmii()
419 	ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1);  in xpcs_config_usxgmii()
423 	ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_RST);  in xpcs_config_usxgmii()
433 static int _xpcs_config_aneg_c73(struct dw_xpcs *xpcs,  in _xpcs_config_aneg_c73()  argument
451 	ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV3, adv);  in _xpcs_config_aneg_c73()
464 	ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV2, adv);  in _xpcs_config_aneg_c73()
475 	return xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV1, adv);  in _xpcs_config_aneg_c73()
478 static int xpcs_config_aneg_c73(struct dw_xpcs *xpcs,  in xpcs_config_aneg_c73()  argument
483 	ret = _xpcs_config_aneg_c73(xpcs, compat);  in xpcs_config_aneg_c73()
487 	ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_CTRL1);  in xpcs_config_aneg_c73()
493 	return xpcs_write(xpcs, MDIO_MMD_AN, MDIO_CTRL1, ret);  in xpcs_config_aneg_c73()
496 static int xpcs_aneg_done_c73(struct dw_xpcs *xpcs,  in xpcs_aneg_done_c73()  argument
502 	ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_STAT1);  in xpcs_aneg_done_c73()
507 		ret = xpcs_read(xpcs, MDIO_MMD_AN, DW_SR_AN_LP_ABL1);  in xpcs_aneg_done_c73()
513 			xpcs_config_aneg_c73(xpcs, compat);  in xpcs_aneg_done_c73()
523 static int xpcs_read_lpa_c73(struct dw_xpcs *xpcs,  in xpcs_read_lpa_c73()  argument
528 	ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_STAT1);  in xpcs_read_lpa_c73()
540 	ret = xpcs_read(xpcs, MDIO_MMD_AN, DW_SR_AN_LP_ABL3);  in xpcs_read_lpa_c73()
547 	ret = xpcs_read(xpcs, MDIO_MMD_AN, DW_SR_AN_LP_ABL2);  in xpcs_read_lpa_c73()
558 	ret = xpcs_read(xpcs, MDIO_MMD_AN, DW_SR_AN_LP_ABL1);  in xpcs_read_lpa_c73()
572 static void xpcs_resolve_lpa_c73(struct dw_xpcs *xpcs,  in xpcs_resolve_lpa_c73()  argument
582 static int xpcs_get_max_xlgmii_speed(struct dw_xpcs *xpcs,  in xpcs_get_max_xlgmii_speed()  argument
636 static void xpcs_resolve_pma(struct dw_xpcs *xpcs,  in xpcs_resolve_pma()  argument
647 		state->speed = xpcs_get_max_xlgmii_speed(xpcs, state);  in xpcs_resolve_pma()
660 	struct dw_xpcs *xpcs;  in xpcs_validate()  local
663 	xpcs = phylink_pcs_to_xpcs(pcs);  in xpcs_validate()
664 	compat = xpcs_find_compat(xpcs->id, state->interface);  in xpcs_validate()
679 void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces)  in xpcs_get_interfaces()  argument
684 		const struct xpcs_compat *compat = &xpcs->id->compat[i];  in xpcs_get_interfaces()
693 int xpcs_config_eee(struct dw_xpcs *xpcs, int mult_fact_100ns, int enable)  in xpcs_config_eee()  argument
697 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0);  in xpcs_config_eee()
714 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, ret);  in xpcs_config_eee()
718 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1);  in xpcs_config_eee()
727 	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1, ret);  in xpcs_config_eee()
731 static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)  in xpcs_config_aneg_c37_sgmii()  argument
751 	mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);  in xpcs_config_aneg_c37_sgmii()
756 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_sgmii()
762 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL);  in xpcs_config_aneg_c37_sgmii()
773 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, ret);  in xpcs_config_aneg_c37_sgmii()
777 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1);  in xpcs_config_aneg_c37_sgmii()
786 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);  in xpcs_config_aneg_c37_sgmii()
791 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_sgmii()
797 static int xpcs_config_aneg_c37_1000basex(struct dw_xpcs *xpcs, unsigned int mode,  in xpcs_config_aneg_c37_1000basex()  argument
809 	mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);  in xpcs_config_aneg_c37_1000basex()
814 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_1000basex()
820 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL);  in xpcs_config_aneg_c37_1000basex()
825 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, ret);  in xpcs_config_aneg_c37_1000basex()
835 		ret = xpcs_modify_changed(xpcs, MDIO_MMD_VEND2,  in xpcs_config_aneg_c37_1000basex()
844 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0);  in xpcs_config_aneg_c37_1000basex()
850 		ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,  in xpcs_config_aneg_c37_1000basex()
859 static int xpcs_config_2500basex(struct dw_xpcs *xpcs)  in xpcs_config_2500basex()  argument
863 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1);  in xpcs_config_2500basex()
868 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);  in xpcs_config_2500basex()
872 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);  in xpcs_config_2500basex()
878 	return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL, ret);  in xpcs_config_2500basex()
881 int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,  in xpcs_do_config()  argument
887 	compat = xpcs_find_compat(xpcs->id, interface);  in xpcs_do_config()
894 			ret = xpcs_config_aneg_c73(xpcs, compat);  in xpcs_do_config()
900 		ret = xpcs_config_aneg_c37_sgmii(xpcs, mode);  in xpcs_do_config()
905 		ret = xpcs_config_aneg_c37_1000basex(xpcs, mode,  in xpcs_do_config()
911 		ret = xpcs_config_2500basex(xpcs);  in xpcs_do_config()
920 		ret = compat->pma_config(xpcs);  in xpcs_do_config()
934 	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);  in xpcs_config()  local
936 	return xpcs_do_config(xpcs, interface, mode, advertising);  in xpcs_config()
939 static int xpcs_get_state_c73(struct dw_xpcs *xpcs,  in xpcs_get_state_c73()  argument
946 	state->link = xpcs_read_link_c73(xpcs, state->an_enabled) > 0 ? 1 : 0;  in xpcs_get_state_c73()
949 	ret = xpcs_read_fault_c73(xpcs, state);  in xpcs_get_state_c73()
951 		ret = xpcs_soft_reset(xpcs, compat);  in xpcs_get_state_c73()
957 		return xpcs_do_config(xpcs, state->interface, MLO_AN_INBAND, NULL);  in xpcs_get_state_c73()
960 	if (state->an_enabled && xpcs_aneg_done_c73(xpcs, state, compat)) {  in xpcs_get_state_c73()
962 		xpcs_read_lpa_c73(xpcs, state);  in xpcs_get_state_c73()
963 		xpcs_resolve_lpa_c73(xpcs, state);  in xpcs_get_state_c73()
967 		xpcs_resolve_pma(xpcs, state);  in xpcs_get_state_c73()
973 static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs,  in xpcs_get_state_c37_sgmii()  argument
987 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS);  in xpcs_get_state_c37_sgmii()
1014 static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs,  in xpcs_get_state_c37_1000basex()  argument
1023 		lpa = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_LPA);  in xpcs_get_state_c37_1000basex()
1027 		bmsr = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMSR);  in xpcs_get_state_c37_1000basex()
1040 	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);  in xpcs_get_state()  local
1044 	compat = xpcs_find_compat(xpcs->id, state->interface);  in xpcs_get_state()
1050 		ret = xpcs_get_state_c73(xpcs, state, compat);  in xpcs_get_state()
1058 		ret = xpcs_get_state_c37_sgmii(xpcs, state);  in xpcs_get_state()
1065 		ret = xpcs_get_state_c37_1000basex(xpcs, state);  in xpcs_get_state()
1076 static void xpcs_link_up_sgmii(struct dw_xpcs *xpcs, unsigned int mode,  in xpcs_link_up_sgmii()  argument
1085 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, val);  in xpcs_link_up_sgmii()
1090 static void xpcs_link_up_1000basex(struct dw_xpcs *xpcs, unsigned int mode,  in xpcs_link_up_1000basex()  argument
1114 	ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, val);  in xpcs_link_up_1000basex()
1122 	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);  in xpcs_link_up()  local
1125 		return xpcs_config_usxgmii(xpcs, speed);  in xpcs_link_up()
1127 		return xpcs_link_up_sgmii(xpcs, mode, speed, duplex);  in xpcs_link_up()
1129 		return xpcs_link_up_1000basex(xpcs, mode, speed, duplex);  in xpcs_link_up()
1135 	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);  in xpcs_an_restart()  local
1138 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1);  in xpcs_an_restart()
1141 		xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret);  in xpcs_an_restart()
1145 static u32 xpcs_get_id(struct dw_xpcs *xpcs)  in xpcs_get_id()  argument
1151 	ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID1);  in xpcs_get_id()
1157 	ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID2);  in xpcs_get_id()
1168 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID1);  in xpcs_get_id()
1174 	ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID2);  in xpcs_get_id()
1278 	struct dw_xpcs *xpcs;  in xpcs_create()  local
1282 	xpcs = kzalloc(sizeof(*xpcs), GFP_KERNEL);  in xpcs_create()
1283 	if (!xpcs)  in xpcs_create()
1286 	xpcs->mdiodev = mdiodev;  in xpcs_create()
1288 	xpcs_id = xpcs_get_id(xpcs);  in xpcs_create()
1297 		xpcs->id = entry;  in xpcs_create()
1305 		xpcs->pcs.ops = &xpcs_phylink_ops;  in xpcs_create()
1306 		xpcs->pcs.poll = true;  in xpcs_create()
1308 		ret = xpcs_soft_reset(xpcs, compat);  in xpcs_create()
1312 		return xpcs;  in xpcs_create()
1318 	kfree(xpcs);  in xpcs_create()
1324 void xpcs_destroy(struct dw_xpcs *xpcs)  in xpcs_destroy()  argument
1326 	kfree(xpcs);  in xpcs_destroy()