1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
12 #include <linux/mdio-mux.h>
52 #define MESON_G12A_MDIO_INTERNAL_ID 1
76 	val = readl(pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_recalc_rate()
86 	u32 val = readl(pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_enable()
90 	writel(val, pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_enable()
94 	writel(val, pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_enable()
101 	return readl_poll_timeout(pll->base + ETH_PLL_CTL0, val,  in g12a_ephy_pll_enable()
110 	val = readl(pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_disable()
113 	writel(val, pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_disable()
121 	val = readl(pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_is_enabled()
123 	return (val & PLL_CTL0_LOCK_DIG) ? 1 : 0;  in g12a_ephy_pll_is_enabled()
131 	writel(0x29c0040a, pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_init()
132 	writel(0x927e0000, pll->base + ETH_PLL_CTL1);  in g12a_ephy_pll_init()
133 	writel(0xac5f49e5, pll->base + ETH_PLL_CTL2);  in g12a_ephy_pll_init()
134 	writel(0x00000000, pll->base + ETH_PLL_CTL3);  in g12a_ephy_pll_init()
135 	writel(0x00000000, pll->base + ETH_PLL_CTL4);  in g12a_ephy_pll_init()
136 	writel(0x20200000, pll->base + ETH_PLL_CTL5);  in g12a_ephy_pll_init()
137 	writel(0x0000c002, pll->base + ETH_PLL_CTL6);  in g12a_ephy_pll_init()
138 	writel(0x00000023, pll->base + ETH_PLL_CTL7);  in g12a_ephy_pll_init()
156 	if (!priv->pll_is_enabled) {  in g12a_enable_internal_mdio()
157 		ret = clk_prepare_enable(priv->pll);  in g12a_enable_internal_mdio()
162 	priv->pll_is_enabled = true;  in g12a_enable_internal_mdio()
165 	writel(EPHY_G12A_ID, priv->regs + ETH_PHY_CNTL0);  in g12a_enable_internal_mdio()
172 	       priv->regs + ETH_PHY_CNTL1);  in g12a_enable_internal_mdio()
176 	       priv->regs + ETH_PHY_CNTL2);  in g12a_enable_internal_mdio()
183 	/* Reset the mdio bus mux */  in g12a_enable_external_mdio()
184 	writel_relaxed(0x0, priv->regs + ETH_PHY_CNTL2);  in g12a_enable_external_mdio()
187 	if (priv->pll_is_enabled) {  in g12a_enable_external_mdio()
188 		clk_disable_unprepare(priv->pll);  in g12a_enable_external_mdio()
189 		priv->pll_is_enabled = false;  in g12a_enable_external_mdio()
209 		return -EINVAL;  in g12a_mdio_switch_fn()
214 	{ .compatible = "amlogic,g12a-mdio-mux", },
225 	struct clk_mux *mux;  in g12a_ephy_glue_clk_register()  local
230 	/* get the mux parents */  in g12a_ephy_glue_clk_register()
243 	/* create the input mux */  in g12a_ephy_glue_clk_register()
244 	mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);  in g12a_ephy_glue_clk_register()
245 	if (!mux)  in g12a_ephy_glue_clk_register()
246 		return -ENOMEM;  in g12a_ephy_glue_clk_register()
248 	name = kasprintf(GFP_KERNEL, "%s#mux", dev_name(dev));  in g12a_ephy_glue_clk_register()
250 		return -ENOMEM;  in g12a_ephy_glue_clk_register()
258 	mux->reg = priv->regs + ETH_PLL_CTL0;  in g12a_ephy_glue_clk_register()
259 	mux->shift = __ffs(PLL_CTL0_SEL);  in g12a_ephy_glue_clk_register()
260 	mux->mask = PLL_CTL0_SEL >> mux->shift;  in g12a_ephy_glue_clk_register()
261 	mux->hw.init = &init;  in g12a_ephy_glue_clk_register()
263 	clk = devm_clk_register(dev, &mux->hw);  in g12a_ephy_glue_clk_register()
266 		dev_err(dev, "failed to register input mux\n");  in g12a_ephy_glue_clk_register()
273 		return -ENOMEM;  in g12a_ephy_glue_clk_register()
277 		return -ENOMEM;  in g12a_ephy_glue_clk_register()
284 	init.num_parents = 1;  in g12a_ephy_glue_clk_register()
286 	pll->base = priv->regs;  in g12a_ephy_glue_clk_register()
287 	pll->hw.init = &init;  in g12a_ephy_glue_clk_register()
289 	clk = devm_clk_register(dev, &pll->hw);  in g12a_ephy_glue_clk_register()
292 		dev_err(dev, "failed to register input mux\n");  in g12a_ephy_glue_clk_register()
296 	priv->pll = clk;  in g12a_ephy_glue_clk_register()
303 	struct device *dev = &pdev->dev;  in g12a_mdio_mux_probe()
309 		return -ENOMEM;  in g12a_mdio_mux_probe()
313 	priv->regs = devm_platform_ioremap_resource(pdev, 0);  in g12a_mdio_mux_probe()
314 	if (IS_ERR(priv->regs))  in g12a_mdio_mux_probe()
315 		return PTR_ERR(priv->regs);  in g12a_mdio_mux_probe()
317 	priv->pclk = devm_clk_get(dev, "pclk");  in g12a_mdio_mux_probe()
318 	if (IS_ERR(priv->pclk))  in g12a_mdio_mux_probe()
319 		return dev_err_probe(dev, PTR_ERR(priv->pclk),  in g12a_mdio_mux_probe()
323 	ret = clk_prepare_enable(priv->pclk);  in g12a_mdio_mux_probe()
334 	ret = mdio_mux_init(dev, dev->of_node, g12a_mdio_switch_fn,  in g12a_mdio_mux_probe()
335 			    &priv->mux_handle, dev, NULL);  in g12a_mdio_mux_probe()
337 		dev_err_probe(dev, ret, "mdio multiplexer init failed\n");  in g12a_mdio_mux_probe()
344 	clk_disable_unprepare(priv->pclk);  in g12a_mdio_mux_probe()
352 	mdio_mux_uninit(priv->mux_handle);  in g12a_mdio_mux_remove()
354 	if (priv->pll_is_enabled)  in g12a_mdio_mux_remove()
355 		clk_disable_unprepare(priv->pll);  in g12a_mdio_mux_remove()
357 	clk_disable_unprepare(priv->pclk);  in g12a_mdio_mux_remove()
366 		.name	= "g12a-mdio_mux",
372 MODULE_DESCRIPTION("Amlogic G12a MDIO multiplexer driver");