Lines Matching +full:13 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
11 [COMP_CFG_ENABLE] = BIT(0),
12 [GSI_SNOC_BYPASS_DIS] = BIT(1),
13 [GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
14 [GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
15 [IPA_DCMP_FAST_CLK_EN] = BIT(4),
16 /* Bits 5-31 reserved */
22 [CLKON_RX] = BIT(0),
23 [CLKON_PROC] = BIT(1),
24 [TX_WRAPPER] = BIT(2),
25 [CLKON_MISC] = BIT(3),
26 [RAM_ARB] = BIT(4),
27 [FTCH_HPS] = BIT(5),
28 [FTCH_DPS] = BIT(6),
29 [CLKON_HPS] = BIT(7),
30 [CLKON_DPS] = BIT(8),
31 [RX_HPS_CMDQS] = BIT(9),
32 [HPS_DPS_CMDQS] = BIT(10),
33 [DPS_TX_CMDQS] = BIT(11),
34 [RSRC_MNGR] = BIT(12),
35 [CTX_HANDLER] = BIT(13),
36 [ACK_MNGR] = BIT(14),
37 [D_DCPH] = BIT(15),
38 [H_DCPH] = BIT(16),
39 /* Bit 17 reserved */
40 [NTF_TX_CMDQS] = BIT(18),
41 [CLKON_TX_0] = BIT(19),
42 [CLKON_TX_1] = BIT(20),
43 [CLKON_FNR] = BIT(21),
44 /* Bits 22-31 reserved */
50 [ROUTE_DIS] = BIT(0),
52 [ROUTE_DEF_HDR_TABLE] = BIT(6),
55 /* Bits 22-23 reserved */
56 [ROUTE_DEF_RETAIN_HDR] = BIT(24),
57 /* Bits 25-31 reserved */
72 /* Bits 8-31 reserved */
85 [IPV6_ROUTER_HASH] = BIT(0),
86 /* Bits 1-3 reserved */
87 [IPV6_FILTER_HASH] = BIT(4),
88 /* Bits 5-7 reserved */
89 [IPV4_ROUTER_HASH] = BIT(8),
90 /* Bits 9-11 reserved */
91 [IPV4_FILTER_HASH] = BIT(12),
92 /* Bits 13-31 reserved */
98 [IPV6_ROUTER_HASH] = BIT(0),
99 /* Bits 1-3 reserved */
100 [IPV6_FILTER_HASH] = BIT(4),
101 /* Bits 5-7 reserved */
102 [IPV4_ROUTER_HASH] = BIT(8),
103 /* Bits 9-11 reserved */
104 [IPV4_FILTER_HASH] = BIT(12),
105 /* Bits 13-31 reserved */
110 /* Valid bits defined by ipa->available */
117 /* Bits 17-31 reserved */
123 /* Valid bits defined by ipa->available */
127 /* Bits 0-3 reserved */
129 /* Bits 5-31 reserved */
135 [TX0_PREFETCH_DISABLE] = BIT(0),
136 [TX1_PREFETCH_DISABLE] = BIT(1),
138 /* Bits 5-31 reserved */
145 /* Bits 4-7 reserved */
147 /* Bits 13-15 reserved */
149 /* Bits 21-23 reserved */
151 /* Bits 28-31 reserved */
158 [CONST_NON_IDLE_ENABLE] = BIT(16),
159 /* Bits 17-31 reserved */
166 /* Bits 6-7 reserved */
167 [X_MAX_LIM] = GENMASK(13, 8),
168 /* Bits 14-15 reserved */
170 /* Bits 22-23 reserved */
172 /* Bits 30-31 reserved */
180 /* Bits 6-7 reserved */
181 [X_MAX_LIM] = GENMASK(13, 8),
182 /* Bits 14-15 reserved */
184 /* Bits 22-23 reserved */
186 /* Bits 30-31 reserved */
194 /* Bits 6-7 reserved */
195 [X_MAX_LIM] = GENMASK(13, 8),
196 /* Bits 14-15 reserved */
198 /* Bits 22-23 reserved */
200 /* Bits 30-31 reserved */
208 /* Bits 6-7 reserved */
209 [X_MAX_LIM] = GENMASK(13, 8),
210 /* Bits 14-15 reserved */
212 /* Bits 22-23 reserved */
214 /* Bits 30-31 reserved */
221 [ENDP_SUSPEND] = BIT(0),
222 [ENDP_DELAY] = BIT(1),
223 /* Bits 2-31 reserved */
229 [FRAG_OFFLOAD_EN] = BIT(0),
232 /* Bit 7 reserved */
233 [CS_GEN_QMB_MASTER_SEL] = BIT(8),
234 /* Bits 9-31 reserved */
241 /* Bits 2-31 reserved */
248 [HDR_OFST_METADATA_VALID] = BIT(6),
250 [HDR_ADDITIONAL_CONST_LEN] = GENMASK(18, 13),
251 [HDR_OFST_PKT_SIZE_VALID] = BIT(19),
253 [HDR_A5_MUX] = BIT(26),
254 [HDR_LEN_INC_DEAGG_HDR] = BIT(27),
255 [HDR_METADATA_REG_VALID] = BIT(28),
256 /* Bits 29-31 reserved */
262 [HDR_ENDIANNESS] = BIT(0),
263 [HDR_TOTAL_LEN_OR_PAD_VALID] = BIT(1),
264 [HDR_TOTAL_LEN_OR_PAD] = BIT(2),
265 [HDR_PAYLOAD_LEN_INC_PADDING] = BIT(3),
267 [HDR_PAD_TO_ALIGNMENT] = GENMASK(13, 10),
268 /* Bits 14-31 reserved */
278 /* Bit 3 reserved */
280 /* Bits 9-11 reserved */
282 [PIPE_REPLICATION_EN] = BIT(28),
283 [PAD_EN] = BIT(29),
284 [HDR_FTCH_DISABLE] = BIT(30),
285 /* Bit 31 reserved */
296 [SW_EOF_ACTIVE] = BIT(21),
297 [FORCE_CLOSE] = BIT(22),
298 /* Bit 23 reserved */
299 [HARD_BYTE_LIMIT_EN] = BIT(24),
300 /* Bits 25-31 reserved */
306 [HOL_BLOCK_EN] = BIT(0),
307 /* Bits 1-31 reserved */
323 [SYSPIPE_ERR_DETECTION] = BIT(6),
324 [PACKET_OFFSET_VALID] = BIT(7),
325 [PACKET_OFFSET_LOCATION] = GENMASK(13, 8),
326 [IGNORE_MIN_PKT_ERR] = BIT(14),
327 /* Bit 15 reserved */
335 /* Bits 2-31 reserved */
344 /* Bits 16-31 reserved */
350 [STATUS_EN] = BIT(0),
352 /* Bits 6-7 reserved */
353 [STATUS_LOCATION] = BIT(8),
354 /* Bits 9-31 reserved */
360 [FILTER_HASH_MSK_SRC_ID] = BIT(0),
361 [FILTER_HASH_MSK_SRC_IP] = BIT(1),
362 [FILTER_HASH_MSK_DST_IP] = BIT(2),
363 [FILTER_HASH_MSK_SRC_PORT] = BIT(3),
364 [FILTER_HASH_MSK_DST_PORT] = BIT(4),
365 [FILTER_HASH_MSK_PROTOCOL] = BIT(5),
366 [FILTER_HASH_MSK_METADATA] = BIT(6),
368 /* Bits 7-15 reserved */
369 [ROUTER_HASH_MSK_SRC_ID] = BIT(16),
370 [ROUTER_HASH_MSK_SRC_IP] = BIT(17),
371 [ROUTER_HASH_MSK_DST_IP] = BIT(18),
372 [ROUTER_HASH_MSK_SRC_PORT] = BIT(19),
373 [ROUTER_HASH_MSK_DST_PORT] = BIT(20),
374 [ROUTER_HASH_MSK_PROTOCOL] = BIT(21),
375 [ROUTER_HASH_MSK_METADATA] = BIT(22),
377 /* Bits 23-31 reserved */
393 [UC_INTR] = BIT(0),
394 /* Bits 1-31 reserved */
399 /* Valid bits defined by ipa->available */
402 /* Valid bits defined by ipa->available */
405 /* Valid bits defined by ipa->available */