Lines Matching +full:7 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
11 [COMP_CFG_ENABLE] = BIT(0),
12 [GSI_SNOC_BYPASS_DIS] = BIT(1),
13 [GEN_QMB_0_SNOC_BYPASS_DIS] = BIT(2),
14 [GEN_QMB_1_SNOC_BYPASS_DIS] = BIT(3),
15 [IPA_DCMP_FAST_CLK_EN] = BIT(4),
16 /* Bits 5-31 reserved */
22 [CLKON_RX] = BIT(0),
23 [CLKON_PROC] = BIT(1),
24 [TX_WRAPPER] = BIT(2),
25 [CLKON_MISC] = BIT(3),
26 [RAM_ARB] = BIT(4),
27 [FTCH_HPS] = BIT(5),
28 [FTCH_DPS] = BIT(6),
29 [CLKON_HPS] = BIT(7),
30 [CLKON_DPS] = BIT(8),
31 [RX_HPS_CMDQS] = BIT(9),
32 [HPS_DPS_CMDQS] = BIT(10),
33 [DPS_TX_CMDQS] = BIT(11),
34 [RSRC_MNGR] = BIT(12),
35 [CTX_HANDLER] = BIT(13),
36 [ACK_MNGR] = BIT(14),
37 [D_DCPH] = BIT(15),
38 [H_DCPH] = BIT(16),
39 /* Bits 17-31 reserved */
45 [ROUTE_DIS] = BIT(0),
47 [ROUTE_DEF_HDR_TABLE] = BIT(6),
48 [ROUTE_DEF_HDR_OFST] = GENMASK(16, 7),
50 /* Bits 22-23 reserved */
51 [ROUTE_DEF_RETAIN_HDR] = BIT(24),
52 /* Bits 25-31 reserved */
66 [GEN_QMB_1_MAX_WRITES] = GENMASK(7, 4),
67 /* Bits 8-31 reserved */
74 [GEN_QMB_1_MAX_READS] = GENMASK(7, 4),
80 [IPV6_ROUTER_HASH] = BIT(0),
81 /* Bits 1-3 reserved */
82 [IPV6_FILTER_HASH] = BIT(4),
83 /* Bits 5-7 reserved */
84 [IPV4_ROUTER_HASH] = BIT(8),
85 /* Bits 9-11 reserved */
86 [IPV4_FILTER_HASH] = BIT(12),
87 /* Bits 13-31 reserved */
93 [IPV6_ROUTER_HASH] = BIT(0),
94 /* Bits 1-3 reserved */
95 [IPV6_FILTER_HASH] = BIT(4),
96 /* Bits 5-7 reserved */
97 [IPV4_ROUTER_HASH] = BIT(8),
98 /* Bits 9-11 reserved */
99 [IPV4_FILTER_HASH] = BIT(12),
100 /* Bits 13-31 reserved */
105 /* Valid bits defined by ipa->available */
112 /* Bits 17-31 reserved */
118 /* Valid bits defined by ipa->available */
124 /* Bits 5-31 reserved */
130 [X_MIN_LIM] = GENMASK(7, 0),
140 [X_MIN_LIM] = GENMASK(7, 0),
150 [X_MIN_LIM] = GENMASK(7, 0),
160 [X_MIN_LIM] = GENMASK(7, 0),
170 [X_MIN_LIM] = GENMASK(7, 0),
180 [X_MIN_LIM] = GENMASK(7, 0),
190 [X_MIN_LIM] = GENMASK(7, 0),
200 [X_MIN_LIM] = GENMASK(7, 0),
210 [ENDP_SUSPEND] = BIT(0),
211 [ENDP_DELAY] = BIT(1),
212 /* Bits 2-31 reserved */
218 [FRAG_OFFLOAD_EN] = BIT(0),
221 /* Bit 7 reserved */
222 [CS_GEN_QMB_MASTER_SEL] = BIT(8),
223 /* Bits 9-31 reserved */
230 /* Bits 2-31 reserved */
237 [HDR_OFST_METADATA_VALID] = BIT(6),
238 [HDR_OFST_METADATA] = GENMASK(12, 7),
240 [HDR_OFST_PKT_SIZE_VALID] = BIT(19),
242 [HDR_A5_MUX] = BIT(26),
243 [HDR_LEN_INC_DEAGG_HDR] = BIT(27),
244 [HDR_METADATA_REG_VALID] = BIT(28),
245 /* Bits 29-31 reserved */
251 [HDR_ENDIANNESS] = BIT(0),
252 [HDR_TOTAL_LEN_OR_PAD_VALID] = BIT(1),
253 [HDR_TOTAL_LEN_OR_PAD] = BIT(2),
254 [HDR_PAYLOAD_LEN_INC_PADDING] = BIT(3),
257 /* Bits 14-31 reserved */
267 /* Bit 3 reserved */
269 /* Bits 9-11 reserved */
271 [PIPE_REPLICATION_EN] = BIT(28),
272 [PAD_EN] = BIT(29),
273 [HDR_FTCH_DISABLE] = BIT(30),
274 /* Bit 31 reserved */
285 [SW_EOF_ACTIVE] = BIT(21),
286 [FORCE_CLOSE] = BIT(22),
287 /* Bit 23 reserved */
288 [HARD_BYTE_LIMIT_EN] = BIT(24),
289 /* Bits 25-31 reserved */
295 [HOL_BLOCK_EN] = BIT(0),
296 /* Bits 1-31 reserved */
312 [SYSPIPE_ERR_DETECTION] = BIT(6),
313 [PACKET_OFFSET_VALID] = BIT(7),
315 [IGNORE_MIN_PKT_ERR] = BIT(14),
316 /* Bit 15 reserved */
324 /* Bits 3-31 reserved */
331 [SEQ_TYPE] = GENMASK(7, 0),
333 /* Bits 16-31 reserved */
339 [STATUS_EN] = BIT(0),
341 /* Bits 6-7 reserved */
342 [STATUS_LOCATION] = BIT(8),
343 /* Bits 9-31 reserved */
349 [FILTER_HASH_MSK_SRC_ID] = BIT(0),
350 [FILTER_HASH_MSK_SRC_IP] = BIT(1),
351 [FILTER_HASH_MSK_DST_IP] = BIT(2),
352 [FILTER_HASH_MSK_SRC_PORT] = BIT(3),
353 [FILTER_HASH_MSK_DST_PORT] = BIT(4),
354 [FILTER_HASH_MSK_PROTOCOL] = BIT(5),
355 [FILTER_HASH_MSK_METADATA] = BIT(6),
357 /* Bits 7-15 reserved */
358 [ROUTER_HASH_MSK_SRC_ID] = BIT(16),
359 [ROUTER_HASH_MSK_SRC_IP] = BIT(17),
360 [ROUTER_HASH_MSK_DST_IP] = BIT(18),
361 [ROUTER_HASH_MSK_SRC_PORT] = BIT(19),
362 [ROUTER_HASH_MSK_DST_PORT] = BIT(20),
363 [ROUTER_HASH_MSK_PROTOCOL] = BIT(21),
364 [ROUTER_HASH_MSK_METADATA] = BIT(22),
366 /* Bits 23-31 reserved */
382 [UC_INTR] = BIT(0),
383 /* Bits 1-31 reserved */
388 /* Valid bits defined by ipa->available */
391 /* Valid bits defined by ipa->available */
394 /* Valid bits defined by ipa->available */