Lines Matching full:v4
65 IPA_BCR, /* Not IPA v4.5+ */
68 COUNTER_CFG, /* Not IPA v4.5+ */
72 QTIME_TIMESTAMP_CFG, /* IPA v4.5+ */
73 TIMERS_XO_CLK_DIV_CFG, /* IPA v4.5+ */
74 TIMERS_PULSE_GRAN_CFG, /* IPA v4.5+ */
77 SRC_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+, IPA v4.5 */
81 DST_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+, IPA v4.5 */
83 ENDP_INIT_CTRL, /* Not IPA v4.2+ for TX, not IPA v4.0+ for RX */
97 ENDP_FILTER_ROUTER_HSH_CFG, /* Not IPA v4.2 */
161 COMP_CFG_ENABLE, /* Not IPA v4.0+ */
162 RAM_ARB_PRI_CLIENT_SAMP_FIX_DIS, /* IPA v4.7+ */
166 IPA_DCMP_FAST_CLK_EN, /* Not IPA v4.5+ */
167 IPA_QMB_SELECT_CONS_EN, /* IPA v4.0+ */
168 IPA_QMB_SELECT_PROD_EN, /* IPA v4.0+ */
169 GSI_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
170 GSI_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
171 GEN_QMB_0_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
172 GEN_QMB_1_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
173 GEN_QMB_0_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
174 GEN_QMB_1_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
175 GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS, /* IPA v4.0+ */
176 GSI_SNOC_CNOC_LOOP_PROT_DISABLE, /* IPA v4.0+ */
177 GSI_MULTI_AXI_MASTERS_DIS, /* IPA v4.0+ */
178 IPA_QMB_SELECT_GLOBAL_EN, /* IPA v4.0+ */
179 QMB_RAM_RD_CACHE_DISABLE, /* IPA v4.9+ */
180 GENQMB_AOOOWR, /* IPA v4.9+ */
181 IF_OUT_OF_BUF_STOP_RESET_MASK_EN, /* IPA v4.9+ */
182 GEN_QMB_1_DYNAMIC_ASIZE, /* IPA v4.9+ */
183 GEN_QMB_0_DYNAMIC_ASIZE, /* IPA v4.9+ */
184 ATOMIC_FETCHER_ARB_LOCK_DIS, /* IPA v4.0+ */
185 FULL_FLUSH_WAIT_RS_CLOSURE_EN, /* IPA v4.5+ */
207 CLKON_DCMP, /* IPA v4.5+ */
212 QSB2AXI_CMDQ_L, /* IPA v4.0+ */
213 AGGR_WRAPPER, /* IPA v4.0+ */
214 RAM_SLAVEWAY, /* IPA v4.0+ */
215 CLKON_QMB, /* IPA v4.0+ */
216 WEIGHT_ARB, /* IPA v4.0+ */
217 GSI_IF, /* IPA v4.0+ */
218 CLKON_GLOBAL, /* IPA v4.0+ */
219 GLOBAL_2X_CLK, /* IPA v4.0+ */
220 DPL_FIFO, /* IPA v4.5+ */
221 DRBIP, /* IPA v4.7+ */
250 GEN_QMB_0_MAX_READS_BEATS, /* IPA v4.0+ */
251 GEN_QMB_1_MAX_READS_BEATS, /* IPA v4.0+ */
264 BCR_CMDQ_L_LACK_ONE_ENTRY = 0x0, /* Not IPA v4.2+ */
265 BCR_TX_NOT_USING_BRESP = 0x1, /* Not IPA v4.2+ */
266 BCR_TX_SUSPEND_IRQ_ASSERT_ONCE = 0x2, /* Not IPA v4.0+ */
267 BCR_SUSPEND_L2_IRQ = 0x3, /* Not IPA v4.2+ */
268 BCR_HOLB_DROP_L2_IRQ = 0x4, /* Not IPA v4.2+ */
289 TX0_PREFETCH_DISABLE, /* Not v4.0+ */
290 TX1_PREFETCH_DISABLE, /* Not v4.0+ */
291 PREFETCH_ALMOST_EMPTY_SIZE, /* Not v4.0+ */
292 PREFETCH_ALMOST_EMPTY_SIZE_TX0, /* v4.0+ */
293 DMAW_SCND_OUTSD_PRED_THRESHOLD, /* v4.0+ */
294 DMAW_SCND_OUTSD_PRED_EN, /* v4.0+ */
295 DMAW_MAX_BEATS_256_DIS, /* v4.0+ */
296 PA_MASK_EN, /* v4.0+ */
297 PREFETCH_ALMOST_EMPTY_SIZE_TX1, /* v4.0+ */
298 DUAL_TX_ENABLE, /* v4.5+ */
299 SSPND_PA_NO_START_STATE, /* v4,2+, not v4.5 */
300 SSPND_PA_NO_BQ_STATE, /* v4.2 only */
360 ENDP_SUSPEND, /* Not v4.0+ */
361 ENDP_DELAY, /* Not v4.2+ */
375 IPA_CS_OFFLOAD_UL /* TX */ = 0x1, /* Not IPA v4.5+ */
376 IPA_CS_OFFLOAD_DL /* RX */ = 0x2, /* Not IPA v4.5+ */
377 IPA_CS_OFFLOAD_INLINE /* TX and RX */ = 0x1, /* IPA v4.5+ */
400 HDR_A5_MUX, /* Not v4.9+ */
402 HDR_METADATA_REG_VALID, /* Not v4.5+ */
403 HDR_LEN_MSB, /* v4.5+ */
404 HDR_OFST_METADATA_MSB, /* v4.5+ */
415 HDR_TOTAL_LEN_OR_PAD_OFFSET_MSB, /* v4.5+ */
416 HDR_OFST_PKT_SIZE_MSB, /* v4.5+ */
417 HDR_ADDITIONAL_CONST_LEN_MSB, /* v4.5+ */
423 DCPH_ENABLE, /* v4.5+ */
428 HDR_FTCH_DISABLE, /* v4.5+ */
429 DRBIP_ACL_ENABLE, /* v4.9+ */
478 TIMER_BASE_VALUE, /* Not v4.5+ */
479 TIMER_SCALE, /* v4.2 only */
480 TIMER_LIMIT, /* v4.5+ */
481 TIMER_GRAN_SEL, /* v4.5+ */
502 SEQ_REP_TYPE, /* Not v4.5+ */
551 STATUS_LOCATION, /* Not v4.5+ */
552 STATUS_PKT_SUPPRESS, /* v4.0+ */
638 /* The next bit is not present for IPA v4.5+ */
643 /* The next bit is present for IPA v4.5+ */
645 /* The next three bits are present for IPA v4.9+ */