Lines Matching +full:ixp4xx +full:- +full:ethernet
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel IXP4xx Ethernet driver for Linux
7 * Ethernet port config (0x00 is not present on IXP42X):
10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
13 * RX-free queue 26 27 28
14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
17 * bits 0 -> 1 - NPE ID (RX and TX-done)
18 * bits 0 -> 2 - priority (TX, per 802.1D)
19 * bits 3 -> 4 - port ID (user-set?)
20 * bits 5 -> 31 - physical descriptor address
24 #include <linux/dma-mapping.h>
38 #include <linux/soc/ixp4xx/npe.h>
39 #include <linux/soc/ixp4xx/qmgr.h>
40 #include <linux/soc/ixp4xx/cpu.h>
72 #define MAX_CLOSE_WAIT 1000 /* microseconds, typically 2-3 cycles */
82 #define PORT2CHANNEL(p) NPE_ID(p->id)
110 #define CORE_MDC_EN 0x10 /* MDIO using NPE-B ETH-0 only */
155 /* Information about built-in Ethernet MAC interfaces */
157 u8 phy; /* MII PHY ID, 0 - 31 */
158 u8 rxq; /* configurable, currently 0 - 31 only */
213 /* Ethernet packet descriptor */
251 #define rx_desc_phys(port, n) ((port)->desc_tab_phys + \
253 #define rx_desc_ptr(port, n) (&(port)->desc_tab[n])
255 #define tx_desc_phys(port, n) ((port)->desc_tab_phys + \
257 #define tx_desc_ptr(port, n) (&(port)->desc_tab[(n) + RX_DESCS])
278 u8 *data = skb->data; in ixp_ptp_match()
288 if (skb->len < offset + OFF_PTP_SEQUENCE_ID + sizeof(seqid)) in ixp_ptp_match()
309 if (!port->hwts_rx_en) in ixp_rx_timestamp()
314 regs = port->timesync_regs; in ixp_rx_timestamp()
316 val = __raw_readl(®s->channel[ch].ch_event); in ixp_rx_timestamp()
321 lo = __raw_readl(®s->channel[ch].src_uuid_lo); in ixp_rx_timestamp()
322 hi = __raw_readl(®s->channel[ch].src_uuid_hi); in ixp_rx_timestamp()
330 lo = __raw_readl(®s->channel[ch].rx_snap_lo); in ixp_rx_timestamp()
331 hi = __raw_readl(®s->channel[ch].rx_snap_hi); in ixp_rx_timestamp()
338 shhwtstamps->hwtstamp = ns_to_ktime(ns); in ixp_rx_timestamp()
340 __raw_writel(RX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event); in ixp_rx_timestamp()
352 if (unlikely(shtx->tx_flags & SKBTX_HW_TSTAMP && port->hwts_tx_en)) in ixp_tx_timestamp()
353 shtx->tx_flags |= SKBTX_IN_PROGRESS; in ixp_tx_timestamp()
359 regs = port->timesync_regs; in ixp_tx_timestamp()
366 val = __raw_readl(®s->channel[ch].ch_event); in ixp_tx_timestamp()
372 shtx->tx_flags &= ~SKBTX_IN_PROGRESS; in ixp_tx_timestamp()
376 lo = __raw_readl(®s->channel[ch].tx_snap_lo); in ixp_tx_timestamp()
377 hi = __raw_readl(®s->channel[ch].tx_snap_hi); in ixp_tx_timestamp()
386 __raw_writel(TX_SNAPSHOT_LOCKED, ®s->channel[ch].ch_event); in ixp_tx_timestamp()
397 if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg))) in hwtstamp_set()
398 return -EFAULT; in hwtstamp_set()
400 ret = ixp46x_ptp_find(&port->timesync_regs, &port->phc_index); in hwtstamp_set()
405 regs = port->timesync_regs; in hwtstamp_set()
408 return -ERANGE; in hwtstamp_set()
412 port->hwts_rx_en = 0; in hwtstamp_set()
415 port->hwts_rx_en = PTP_SLAVE_MODE; in hwtstamp_set()
416 __raw_writel(0, ®s->channel[ch].ch_control); in hwtstamp_set()
419 port->hwts_rx_en = PTP_MASTER_MODE; in hwtstamp_set()
420 __raw_writel(MASTER_MODE, ®s->channel[ch].ch_control); in hwtstamp_set()
423 return -ERANGE; in hwtstamp_set()
426 port->hwts_tx_en = cfg.tx_type == HWTSTAMP_TX_ON; in hwtstamp_set()
430 ®s->channel[ch].ch_event); in hwtstamp_set()
432 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; in hwtstamp_set()
441 cfg.tx_type = port->hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; in hwtstamp_get()
443 switch (port->hwts_rx_en) { in hwtstamp_get()
455 return -ERANGE; in hwtstamp_get()
458 return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0; in hwtstamp_get()
466 if (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80) { in ixp4xx_mdio_cmd()
467 printk(KERN_ERR "%s: MII not ready to transmit\n", bus->name); in ixp4xx_mdio_cmd()
468 return -1; in ixp4xx_mdio_cmd()
472 __raw_writel(cmd & 0xFF, &mdio_regs->mdio_command[0]); in ixp4xx_mdio_cmd()
473 __raw_writel(cmd >> 8, &mdio_regs->mdio_command[1]); in ixp4xx_mdio_cmd()
476 &mdio_regs->mdio_command[2]); in ixp4xx_mdio_cmd()
478 &mdio_regs->mdio_command[3]); in ixp4xx_mdio_cmd()
481 (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80)) { in ixp4xx_mdio_cmd()
487 printk(KERN_ERR "%s #%i: MII write failed\n", bus->name, in ixp4xx_mdio_cmd()
489 return -1; in ixp4xx_mdio_cmd()
493 printk(KERN_DEBUG "%s #%i: mdio_%s() took %i cycles\n", bus->name, in ixp4xx_mdio_cmd()
500 if (__raw_readl(&mdio_regs->mdio_status[3]) & 0x80) { in ixp4xx_mdio_cmd()
502 printk(KERN_DEBUG "%s #%i: MII read failed\n", bus->name, in ixp4xx_mdio_cmd()
508 return (__raw_readl(&mdio_regs->mdio_status[0]) & 0xFF) | in ixp4xx_mdio_cmd()
509 ((__raw_readl(&mdio_regs->mdio_status[1]) & 0xFF) << 8); in ixp4xx_mdio_cmd()
521 printk(KERN_DEBUG "%s #%i: MII read [%i] -> 0x%X\n", bus->name, in ixp4xx_mdio_read()
537 printk(KERN_DEBUG "%s #%i: MII write [%i] <- 0x%X, err = %i\n", in ixp4xx_mdio_write()
538 bus->name, phy_id, location, val, ret); in ixp4xx_mdio_write()
548 return -ENOMEM; in ixp4xx_mdio_register()
551 __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control); in ixp4xx_mdio_register()
552 mdio_bus->name = "IXP4xx MII Bus"; in ixp4xx_mdio_register()
553 mdio_bus->read = &ixp4xx_mdio_read; in ixp4xx_mdio_register()
554 mdio_bus->write = &ixp4xx_mdio_write; in ixp4xx_mdio_register()
555 snprintf(mdio_bus->id, MII_BUS_ID_SIZE, "ixp4xx-eth-0"); in ixp4xx_mdio_register()
573 struct phy_device *phydev = dev->phydev; in ixp4xx_adjust_link()
575 if (!phydev->link) { in ixp4xx_adjust_link()
576 if (port->speed) { in ixp4xx_adjust_link()
577 port->speed = 0; in ixp4xx_adjust_link()
578 printk(KERN_INFO "%s: link down\n", dev->name); in ixp4xx_adjust_link()
583 if (port->speed == phydev->speed && port->duplex == phydev->duplex) in ixp4xx_adjust_link()
586 port->speed = phydev->speed; in ixp4xx_adjust_link()
587 port->duplex = phydev->duplex; in ixp4xx_adjust_link()
589 if (port->duplex) in ixp4xx_adjust_link()
591 &port->regs->tx_control[0]); in ixp4xx_adjust_link()
594 &port->regs->tx_control[0]); in ixp4xx_adjust_link()
597 dev->name, port->speed, port->duplex ? "full" : "half"); in ixp4xx_adjust_link()
625 phys, desc->next, desc->buf_len, desc->pkt_len, in debug_desc()
626 desc->data, desc->dest_id, desc->src_id, desc->flags, in debug_desc()
627 desc->qos, desc->padlen, desc->vlan_tci, in debug_desc()
628 desc->dst_mac_0, desc->dst_mac_1, desc->dst_mac_2, in debug_desc()
629 desc->dst_mac_3, desc->dst_mac_4, desc->dst_mac_5, in debug_desc()
630 desc->src_mac_0, desc->src_mac_1, desc->src_mac_2, in debug_desc()
631 desc->src_mac_3, desc->src_mac_4, desc->src_mac_5); in debug_desc()
642 return -1; in queue_get_desc()
644 phys &= ~0x1F; /* mask out non-address bits */ in queue_get_desc()
647 n_desc = (phys - tab_phys) / sizeof(struct desc); in queue_get_desc()
668 dma_unmap_single(&port->netdev->dev, desc->data, in dma_unmap_tx()
669 desc->buf_len, DMA_TO_DEVICE); in dma_unmap_tx()
671 dma_unmap_single(&port->netdev->dev, desc->data & ~3, in dma_unmap_tx()
672 ALIGN((desc->data & 3) + desc->buf_len, 4), in dma_unmap_tx()
684 printk(KERN_DEBUG "%s: eth_rx_irq\n", dev->name); in eth_rx_irq()
686 qmgr_disable_irq(port->plat->rxq); in eth_rx_irq()
687 napi_schedule(&port->napi); in eth_rx_irq()
693 struct net_device *dev = port->netdev; in eth_poll()
694 unsigned int rxq = port->plat->rxq, rxfreeq = RXFREE_QUEUE(port->id); in eth_poll()
734 phys = dma_map_single(&dev->dev, skb->data, in eth_poll()
736 if (dma_mapping_error(&dev->dev, phys)) { in eth_poll()
743 ALIGN(NET_IP_ALIGN + desc->pkt_len, 4)); in eth_poll()
747 dev->stats.rx_dropped++; in eth_poll()
748 /* put the desc back on RX-ready queue */ in eth_poll()
749 desc->buf_len = MAX_MRU; in eth_poll()
750 desc->pkt_len = 0; in eth_poll()
758 skb = port->rx_buff_tab[n]; in eth_poll()
759 dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN, in eth_poll()
762 dma_sync_single_for_cpu(&dev->dev, desc->data - NET_IP_ALIGN, in eth_poll()
764 memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n], in eth_poll()
765 ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4); in eth_poll()
768 skb_put(skb, desc->pkt_len); in eth_poll()
770 debug_pkt(dev, "eth_poll", skb->data, skb->len); in eth_poll()
773 skb->protocol = eth_type_trans(skb, dev); in eth_poll()
774 dev->stats.rx_packets++; in eth_poll()
775 dev->stats.rx_bytes += skb->len; in eth_poll()
778 /* put the new buffer on RX-free queue */ in eth_poll()
780 port->rx_buff_tab[n] = temp; in eth_poll()
781 desc->data = phys + NET_IP_ALIGN; in eth_poll()
783 desc->buf_len = MAX_MRU; in eth_poll()
784 desc->pkt_len = 0; in eth_poll()
813 phys &= ~0x1F; /* mask out non-address bits */ in eth_txdone_irq()
814 n_desc = (phys - tx_desc_phys(port, 0)) / sizeof(struct desc); in eth_txdone_irq()
819 if (port->tx_buff_tab[n_desc]) { /* not the draining packet */ in eth_txdone_irq()
820 port->netdev->stats.tx_packets++; in eth_txdone_irq()
821 port->netdev->stats.tx_bytes += desc->pkt_len; in eth_txdone_irq()
826 port->netdev->name, port->tx_buff_tab[n_desc]); in eth_txdone_irq()
828 free_buffer_irq(port->tx_buff_tab[n_desc]); in eth_txdone_irq()
829 port->tx_buff_tab[n_desc] = NULL; in eth_txdone_irq()
832 start = qmgr_stat_below_low_watermark(port->plat->txreadyq); in eth_txdone_irq()
833 queue_put_desc(port->plat->txreadyq, phys, desc); in eth_txdone_irq()
834 if (start) { /* TX-ready queue was empty */ in eth_txdone_irq()
837 port->netdev->name); in eth_txdone_irq()
839 netif_wake_queue(port->netdev); in eth_txdone_irq()
847 unsigned int txreadyq = port->plat->txreadyq; in eth_xmit()
857 if (unlikely(skb->len > MAX_MRU)) { in eth_xmit()
859 dev->stats.tx_errors++; in eth_xmit()
863 debug_pkt(dev, "eth_xmit", skb->data, skb->len); in eth_xmit()
865 len = skb->len; in eth_xmit()
869 mem = skb->data; in eth_xmit()
871 offset = (uintptr_t)skb->data & 3; /* keep 32-bit alignment */ in eth_xmit()
875 dev->stats.tx_dropped++; in eth_xmit()
878 memcpy_swab32(mem, (u32 *)((uintptr_t)skb->data & ~3), bytes / 4); in eth_xmit()
881 phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE); in eth_xmit()
882 if (dma_mapping_error(&dev->dev, phys)) { in eth_xmit()
887 dev->stats.tx_dropped++; in eth_xmit()
896 port->tx_buff_tab[n] = skb; in eth_xmit()
898 port->tx_buff_tab[n] = mem; in eth_xmit()
900 desc->data = phys + offset; in eth_xmit()
901 desc->buf_len = desc->pkt_len = len; in eth_xmit()
905 queue_put_desc(TX_QUEUE(port->id), tx_desc_phys(port, n), desc); in eth_xmit()
944 if ((dev->flags & IFF_ALLMULTI) && !(dev->flags & IFF_PROMISC)) { in eth_set_mcast_list()
946 __raw_writel(allmulti[i], &port->regs->mcast_addr[i]); in eth_set_mcast_list()
947 __raw_writel(allmulti[i], &port->regs->mcast_mask[i]); in eth_set_mcast_list()
950 &port->regs->rx_control[0]); in eth_set_mcast_list()
954 if ((dev->flags & IFF_PROMISC) || netdev_mc_empty(dev)) { in eth_set_mcast_list()
956 &port->regs->rx_control[0]); in eth_set_mcast_list()
965 addr = ha->addr; /* first MAC address */ in eth_set_mcast_list()
967 diffs[i] |= addr[i] ^ ha->addr[i]; in eth_set_mcast_list()
971 __raw_writel(addr[i], &port->regs->mcast_addr[i]); in eth_set_mcast_list()
972 __raw_writel(~diffs[i], &port->regs->mcast_mask[i]); in eth_set_mcast_list()
976 &port->regs->rx_control[0]); in eth_set_mcast_list()
983 return -EINVAL; in eth_ioctl()
992 return phy_mii_ioctl(dev->phydev, req, cmd); in eth_ioctl()
1002 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in ixp4xx_get_drvinfo()
1003 snprintf(info->fw_version, sizeof(info->fw_version), "%u:%u:%u:%u", in ixp4xx_get_drvinfo()
1004 port->firmware[0], port->firmware[1], in ixp4xx_get_drvinfo()
1005 port->firmware[2], port->firmware[3]); in ixp4xx_get_drvinfo()
1006 strscpy(info->bus_info, "internal", sizeof(info->bus_info)); in ixp4xx_get_drvinfo()
1014 if (port->phc_index < 0) in ixp4xx_get_ts_info()
1015 ixp46x_ptp_find(&port->timesync_regs, &port->phc_index); in ixp4xx_get_ts_info()
1017 info->phc_index = port->phc_index; in ixp4xx_get_ts_info()
1019 if (info->phc_index < 0) { in ixp4xx_get_ts_info()
1020 info->so_timestamping = in ixp4xx_get_ts_info()
1026 info->so_timestamping = in ixp4xx_get_ts_info()
1030 info->tx_types = in ixp4xx_get_ts_info()
1033 info->rx_filters = in ixp4xx_get_ts_info()
1054 err = qmgr_request_queue(RXFREE_QUEUE(port->id), RX_DESCS, 0, 0, in request_queues()
1055 "%s:RX-free", port->netdev->name); in request_queues()
1059 err = qmgr_request_queue(port->plat->rxq, RX_DESCS, 0, 0, in request_queues()
1060 "%s:RX", port->netdev->name); in request_queues()
1064 err = qmgr_request_queue(TX_QUEUE(port->id), TX_DESCS, 0, 0, in request_queues()
1065 "%s:TX", port->netdev->name); in request_queues()
1069 err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0, in request_queues()
1070 "%s:TX-ready", port->netdev->name); in request_queues()
1074 /* TX-done queue handles skbs sent out by the NPEs */ in request_queues()
1077 "%s:TX-done", DRV_NAME); in request_queues()
1084 qmgr_release_queue(port->plat->txreadyq); in request_queues()
1086 qmgr_release_queue(TX_QUEUE(port->id)); in request_queues()
1088 qmgr_release_queue(port->plat->rxq); in request_queues()
1090 qmgr_release_queue(RXFREE_QUEUE(port->id)); in request_queues()
1092 port->netdev->name); in request_queues()
1098 qmgr_release_queue(RXFREE_QUEUE(port->id)); in release_queues()
1099 qmgr_release_queue(port->plat->rxq); in release_queues()
1100 qmgr_release_queue(TX_QUEUE(port->id)); in release_queues()
1101 qmgr_release_queue(port->plat->txreadyq); in release_queues()
1112 dma_pool = dma_pool_create(DRV_NAME, &port->netdev->dev, in init_queues()
1115 return -ENOMEM; in init_queues()
1118 port->desc_tab = dma_pool_zalloc(dma_pool, GFP_KERNEL, &port->desc_tab_phys); in init_queues()
1119 if (!port->desc_tab) in init_queues()
1120 return -ENOMEM; in init_queues()
1121 memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */ in init_queues()
1122 memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab)); in init_queues()
1130 if (!(buff = netdev_alloc_skb(port->netdev, RX_BUFF_SIZE))) in init_queues()
1131 return -ENOMEM; in init_queues()
1132 data = buff->data; in init_queues()
1135 return -ENOMEM; in init_queues()
1138 desc->buf_len = MAX_MRU; in init_queues()
1139 desc->data = dma_map_single(&port->netdev->dev, data, in init_queues()
1141 if (dma_mapping_error(&port->netdev->dev, desc->data)) { in init_queues()
1143 return -EIO; in init_queues()
1145 desc->data += NET_IP_ALIGN; in init_queues()
1146 port->rx_buff_tab[i] = buff; in init_queues()
1156 if (port->desc_tab) { in destroy_queues()
1159 buffer_t *buff = port->rx_buff_tab[i]; in destroy_queues()
1161 dma_unmap_single(&port->netdev->dev, in destroy_queues()
1162 desc->data - NET_IP_ALIGN, in destroy_queues()
1169 buffer_t *buff = port->tx_buff_tab[i]; in destroy_queues()
1175 dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys); in destroy_queues()
1176 port->desc_tab = NULL; in destroy_queues()
1188 struct npe *npe = port->npe; in eth_open()
1193 err = npe_load_firmware(npe, npe_name(npe), &dev->dev); in eth_open()
1199 return -EIO; in eth_open()
1201 port->firmware[0] = msg.byte4; in eth_open()
1202 port->firmware[1] = msg.byte5; in eth_open()
1203 port->firmware[2] = msg.byte6; in eth_open()
1204 port->firmware[3] = msg.byte7; in eth_open()
1209 msg.eth_id = port->id; in eth_open()
1210 msg.byte5 = port->plat->rxq | 0x80; in eth_open()
1211 msg.byte7 = port->plat->rxq << 4; in eth_open()
1214 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_RXQ")) in eth_open()
1215 return -EIO; in eth_open()
1219 msg.eth_id = PHYSICAL_ID(port->id); in eth_open()
1220 msg.byte2 = dev->dev_addr[0]; in eth_open()
1221 msg.byte3 = dev->dev_addr[1]; in eth_open()
1222 msg.byte4 = dev->dev_addr[2]; in eth_open()
1223 msg.byte5 = dev->dev_addr[3]; in eth_open()
1224 msg.byte6 = dev->dev_addr[4]; in eth_open()
1225 msg.byte7 = dev->dev_addr[5]; in eth_open()
1226 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_MAC")) in eth_open()
1227 return -EIO; in eth_open()
1231 msg.eth_id = port->id; in eth_open()
1232 if (npe_send_recv_message(port->npe, &msg, "ETH_SET_FIREWALL_MODE")) in eth_open()
1233 return -EIO; in eth_open()
1244 port->speed = 0; /* force "link up" message */ in eth_open()
1245 phy_start(dev->phydev); in eth_open()
1248 __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]); in eth_open()
1249 __raw_writel(0x08, &port->regs->random_seed); in eth_open()
1250 __raw_writel(0x12, &port->regs->partial_empty_threshold); in eth_open()
1251 __raw_writel(0x30, &port->regs->partial_full_threshold); in eth_open()
1252 __raw_writel(0x08, &port->regs->tx_start_bytes); in eth_open()
1253 __raw_writel(0x15, &port->regs->tx_deferral); in eth_open()
1254 __raw_writel(0x08, &port->regs->tx_2part_deferral[0]); in eth_open()
1255 __raw_writel(0x07, &port->regs->tx_2part_deferral[1]); in eth_open()
1256 __raw_writel(0x80, &port->regs->slot_time); in eth_open()
1257 __raw_writel(0x01, &port->regs->int_clock_threshold); in eth_open()
1261 queue_put_desc(port->plat->txreadyq, in eth_open()
1265 queue_put_desc(RXFREE_QUEUE(port->id), in eth_open()
1268 __raw_writel(TX_CNTRL1_RETRIES, &port->regs->tx_control[1]); in eth_open()
1269 __raw_writel(DEFAULT_TX_CNTRL0, &port->regs->tx_control[0]); in eth_open()
1270 __raw_writel(0, &port->regs->rx_control[1]); in eth_open()
1271 __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]); in eth_open()
1273 napi_enable(&port->napi); in eth_open()
1277 qmgr_set_irq(port->plat->rxq, QUEUE_IRQ_SRC_NOT_EMPTY, in eth_open()
1286 napi_schedule(&port->napi); in eth_open()
1297 ports_open--; in eth_close()
1298 qmgr_disable_irq(port->plat->rxq); in eth_close()
1299 napi_disable(&port->napi); in eth_close()
1302 while (queue_get_desc(RXFREE_QUEUE(port->id), port, 0) >= 0) in eth_close()
1303 buffs--; in eth_close()
1307 msg.eth_id = port->id; in eth_close()
1309 if (npe_send_recv_message(port->npe, &msg, "ETH_ENABLE_LOOPBACK")) in eth_close()
1314 while (queue_get_desc(port->plat->rxq, port, 0) >= 0) in eth_close()
1315 buffs--; in eth_close()
1318 if (qmgr_stat_empty(TX_QUEUE(port->id))) { in eth_close()
1322 int n = queue_get_desc(port->plat->txreadyq, port, 1); in eth_close()
1326 desc->buf_len = desc->pkt_len = 1; in eth_close()
1328 queue_put_desc(TX_QUEUE(port->id), phys, desc); in eth_close()
1342 while (queue_get_desc(TX_QUEUE(port->id), port, 1) >= 0) in eth_close()
1343 buffs--; /* cancel TX */ in eth_close()
1347 while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0) in eth_close()
1348 buffs--; in eth_close()
1362 if (npe_send_recv_message(port->npe, &msg, "ETH_DISABLE_LOOPBACK")) in eth_close()
1365 phy_stop(dev->phydev); in eth_close()
1386 struct device_node *np = dev->of_node; in ixp4xx_of_get_platdata()
1398 ret = of_parse_phandle_with_fixed_args(np, "intel,npe-handle", 1, 0, in ixp4xx_of_get_platdata()
1405 plat->npe = (npe_spec.args[0] << 4); in ixp4xx_of_get_platdata()
1410 plat->has_mdio = true; in ixp4xx_of_get_platdata()
1416 ret = of_parse_phandle_with_fixed_args(np, "queue-rx", 1, 0, in ixp4xx_of_get_platdata()
1422 plat->rxq = queue_spec.args[0]; in ixp4xx_of_get_platdata()
1425 ret = of_parse_phandle_with_fixed_args(np, "queue-txready", 1, 0, in ixp4xx_of_get_platdata()
1431 plat->txreadyq = queue_spec.args[0]; in ixp4xx_of_get_platdata()
1436 memcpy(plat->hwaddr, mac, ETH_ALEN); in ixp4xx_of_get_platdata()
1445 struct device *dev = &pdev->dev; in ixp4xx_eth_probe()
1446 struct device_node *np = dev->of_node; in ixp4xx_eth_probe()
1454 return -ENODEV; in ixp4xx_eth_probe()
1457 return -ENOMEM; in ixp4xx_eth_probe()
1461 port->netdev = ndev; in ixp4xx_eth_probe()
1462 port->id = plat->npe; in ixp4xx_eth_probe()
1463 port->phc_index = -1; in ixp4xx_eth_probe()
1466 port->regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); in ixp4xx_eth_probe()
1467 if (IS_ERR(port->regs)) in ixp4xx_eth_probe()
1468 return PTR_ERR(port->regs); in ixp4xx_eth_probe()
1471 if (plat->has_mdio) { in ixp4xx_eth_probe()
1472 err = ixp4xx_mdio_register(port->regs); in ixp4xx_eth_probe()
1482 return -EPROBE_DEFER; in ixp4xx_eth_probe()
1484 ndev->netdev_ops = &ixp4xx_netdev_ops; in ixp4xx_eth_probe()
1485 ndev->ethtool_ops = &ixp4xx_ethtool_ops; in ixp4xx_eth_probe()
1486 ndev->tx_queue_len = 100; in ixp4xx_eth_probe()
1488 ndev->dev.dma_mask = dev->dma_mask; in ixp4xx_eth_probe()
1489 ndev->dev.coherent_dma_mask = dev->coherent_dma_mask; in ixp4xx_eth_probe()
1491 netif_napi_add_weight(ndev, &port->napi, eth_poll, NAPI_WEIGHT); in ixp4xx_eth_probe()
1493 if (!(port->npe = npe_request(NPE_ID(port->id)))) in ixp4xx_eth_probe()
1494 return -EIO; in ixp4xx_eth_probe()
1496 port->plat = plat; in ixp4xx_eth_probe()
1497 npe_port_tab[NPE_ID(port->id)] = port; in ixp4xx_eth_probe()
1498 if (is_valid_ether_addr(plat->hwaddr)) in ixp4xx_eth_probe()
1499 eth_hw_addr_set(ndev, plat->hwaddr); in ixp4xx_eth_probe()
1506 &port->regs->core_control); in ixp4xx_eth_probe()
1508 __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control); in ixp4xx_eth_probe()
1513 err = -ENODEV; in ixp4xx_eth_probe()
1518 phydev->irq = PHY_POLL; in ixp4xx_eth_probe()
1523 netdev_info(ndev, "%s: MII PHY %i on %s\n", ndev->name, plat->phy, in ixp4xx_eth_probe()
1524 npe_name(port->npe)); in ixp4xx_eth_probe()
1531 npe_port_tab[NPE_ID(port->id)] = NULL; in ixp4xx_eth_probe()
1532 npe_release(port->npe); in ixp4xx_eth_probe()
1539 struct phy_device *phydev = ndev->phydev; in ixp4xx_eth_remove()
1545 npe_port_tab[NPE_ID(port->id)] = NULL; in ixp4xx_eth_remove()
1546 npe_release(port->npe); in ixp4xx_eth_remove()
1552 .compatible = "intel,ixp4xx-ethernet",
1568 MODULE_DESCRIPTION("Intel IXP4xx Ethernet driver");