Lines Matching +full:axi +full:- +full:config
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx Axi Ethernet device driver
6 * Copyright (c) 2005-2008 DLA Systems, David H. Lynch Jr. <dhlii@dlasys.net>
7 * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
8 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
9 * Copyright (c) 2010 - 2011 PetaLogix
10 * Copyright (c) 2019 - 2022 Calian Advanced Technologies
11 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
13 * This is a driver for the Xilinx Axi Ethernet which is used in the Virtex6
17 * - Add Axi Fifo support.
18 * - Factor out Axi DMA code into separate driver.
19 * - Test and fix basic multicast filtering.
20 * - Add support for extended multicast filtering.
21 * - Test basic VLAN support.
22 * - Add support for extended VLAN support.
52 #define DRIVER_DESCRIPTION "Xilinx Axi Ethernet driver"
59 { .compatible = "xlnx,axi-ethernet-1.00.a", },
60 { .compatible = "xlnx,axi-ethernet-1.01.a", },
61 { .compatible = "xlnx,axi-ethernet-2.01.a", },
67 /* Option table for setting up Axi Ethernet hardware options */
123 * axienet_dma_in32 - Memory mapped Axi DMA register read
125 * @reg: Address offset from the base address of the Axi DMA core
127 * Return: The contents of the Axi DMA register
129 * This function returns the contents of the corresponding Axi DMA register.
133 return ioread32(lp->dma_regs + reg); in axienet_dma_in32()
139 desc->phys = lower_32_bits(addr); in desc_set_phys_addr()
140 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_set_phys_addr()
141 desc->phys_msb = upper_32_bits(addr); in desc_set_phys_addr()
147 dma_addr_t ret = desc->phys; in desc_get_phys_addr()
149 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_get_phys_addr()
150 ret |= ((dma_addr_t)desc->phys_msb << 16) << 16; in desc_get_phys_addr()
156 * axienet_dma_bd_release - Release buffer descriptor rings
160 * axienet_dma_bd_init. axienet_dma_bd_release is called when Axi Ethernet
169 dma_free_coherent(lp->dev, in axienet_dma_bd_release()
170 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_release()
171 lp->tx_bd_v, in axienet_dma_bd_release()
172 lp->tx_bd_p); in axienet_dma_bd_release()
174 if (!lp->rx_bd_v) in axienet_dma_bd_release()
177 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_release()
183 if (!lp->rx_bd_v[i].skb) in axienet_dma_bd_release()
186 dev_kfree_skb(lp->rx_bd_v[i].skb); in axienet_dma_bd_release()
188 /* For each descriptor, we programmed cntrl with the (non-zero) in axienet_dma_bd_release()
190 * So a non-zero value in there means we need to unmap it. in axienet_dma_bd_release()
192 if (lp->rx_bd_v[i].cntrl) { in axienet_dma_bd_release()
193 phys = desc_get_phys_addr(lp, &lp->rx_bd_v[i]); in axienet_dma_bd_release()
194 dma_unmap_single(lp->dev, phys, in axienet_dma_bd_release()
195 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_release()
199 dma_free_coherent(lp->dev, in axienet_dma_bd_release()
200 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_release()
201 lp->rx_bd_v, in axienet_dma_bd_release()
202 lp->rx_bd_p); in axienet_dma_bd_release()
206 * axienet_usec_to_timer - Calculate IRQ delay timer value
215 if (lp->axi_clk) in axienet_usec_to_timer()
216 clk_rate = clk_get_rate(lp->axi_clk); in axienet_usec_to_timer()
228 * axienet_dma_start - Set up DMA registers and start DMA operation
234 lp->rx_dma_cr = (lp->coalesce_count_rx << XAXIDMA_COALESCE_SHIFT) | in axienet_dma_start()
239 if (lp->coalesce_count_rx > 1) in axienet_dma_start()
240 lp->rx_dma_cr |= (axienet_usec_to_timer(lp, lp->coalesce_usec_rx) in axienet_dma_start()
243 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
246 lp->tx_dma_cr = (lp->coalesce_count_tx << XAXIDMA_COALESCE_SHIFT) | in axienet_dma_start()
251 if (lp->coalesce_count_tx > 1) in axienet_dma_start()
252 lp->tx_dma_cr |= (axienet_usec_to_timer(lp, lp->coalesce_usec_tx) in axienet_dma_start()
255 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
257 /* Populate the tail pointer and bring the Rx Axi DMA engine out of in axienet_dma_start()
260 axienet_dma_out_addr(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p); in axienet_dma_start()
261 lp->rx_dma_cr |= XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
262 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
263 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p + in axienet_dma_start()
264 (sizeof(*lp->rx_bd_v) * (lp->rx_bd_num - 1))); in axienet_dma_start()
266 /* Write to the RS (Run-stop) bit in the Tx channel control register. in axienet_dma_start()
270 axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p); in axienet_dma_start()
271 lp->tx_dma_cr |= XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
272 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
276 * axienet_dma_bd_init - Setup buffer descriptor rings for Axi DMA
279 * Return: 0, on success -ENOMEM, on failure
283 * and is called when Axi Ethernet driver reset is called.
292 lp->tx_bd_ci = 0; in axienet_dma_bd_init()
293 lp->tx_bd_tail = 0; in axienet_dma_bd_init()
294 lp->rx_bd_ci = 0; in axienet_dma_bd_init()
297 lp->tx_bd_v = dma_alloc_coherent(lp->dev, in axienet_dma_bd_init()
298 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_init()
299 &lp->tx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
300 if (!lp->tx_bd_v) in axienet_dma_bd_init()
301 return -ENOMEM; in axienet_dma_bd_init()
303 lp->rx_bd_v = dma_alloc_coherent(lp->dev, in axienet_dma_bd_init()
304 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_init()
305 &lp->rx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
306 if (!lp->rx_bd_v) in axienet_dma_bd_init()
309 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_bd_init()
310 dma_addr_t addr = lp->tx_bd_p + in axienet_dma_bd_init()
311 sizeof(*lp->tx_bd_v) * in axienet_dma_bd_init()
312 ((i + 1) % lp->tx_bd_num); in axienet_dma_bd_init()
314 lp->tx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
315 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
316 lp->tx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
319 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_init()
322 addr = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * in axienet_dma_bd_init()
323 ((i + 1) % lp->rx_bd_num); in axienet_dma_bd_init()
324 lp->rx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
325 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
326 lp->rx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
328 skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size); in axienet_dma_bd_init()
332 lp->rx_bd_v[i].skb = skb; in axienet_dma_bd_init()
333 addr = dma_map_single(lp->dev, skb->data, in axienet_dma_bd_init()
334 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_init()
335 if (dma_mapping_error(lp->dev, addr)) { in axienet_dma_bd_init()
339 desc_set_phys_addr(lp, addr, &lp->rx_bd_v[i]); in axienet_dma_bd_init()
341 lp->rx_bd_v[i].cntrl = lp->max_frm_size; in axienet_dma_bd_init()
349 return -ENOMEM; in axienet_dma_bd_init()
353 * axienet_set_mac_address - Write the MAC address
357 * This function is called to initialize the MAC address of the Axi Ethernet
367 if (!is_valid_ether_addr(ndev->dev_addr)) in axienet_set_mac_address()
372 (ndev->dev_addr[0]) | in axienet_set_mac_address()
373 (ndev->dev_addr[1] << 8) | in axienet_set_mac_address()
374 (ndev->dev_addr[2] << 16) | in axienet_set_mac_address()
375 (ndev->dev_addr[3] << 24)); in axienet_set_mac_address()
379 (ndev->dev_addr[4] | in axienet_set_mac_address()
380 (ndev->dev_addr[5] << 8)))); in axienet_set_mac_address()
384 * netdev_set_mac_address - Write the MAC address (from outside the driver)
390 * This function is called to initialize the MAC address of the Axi Ethernet
397 axienet_set_mac_address(ndev, addr->sa_data); in netdev_set_mac_address()
402 * axienet_set_multicast_list - Prepare the multicast table
406 * initialization. The Axi Ethernet basic multicast support has a four-entry
418 if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC) || in axienet_set_multicast_list()
424 ndev->flags |= IFF_PROMISC; in axienet_set_multicast_list()
428 dev_info(&ndev->dev, "Promiscuous mode enabled.\n"); in axienet_set_multicast_list()
437 af0reg = (ha->addr[0]); in axienet_set_multicast_list()
438 af0reg |= (ha->addr[1] << 8); in axienet_set_multicast_list()
439 af0reg |= (ha->addr[2] << 16); in axienet_set_multicast_list()
440 af0reg |= (ha->addr[3] << 24); in axienet_set_multicast_list()
442 af1reg = (ha->addr[4]); in axienet_set_multicast_list()
443 af1reg |= (ha->addr[5] << 8); in axienet_set_multicast_list()
468 dev_info(&ndev->dev, "Promiscuous mode disabled.\n"); in axienet_set_multicast_list()
473 * axienet_setoptions - Set an Axi Ethernet option
477 * The Axi Ethernet core has multiple features which can be selectively turned
480 * these options in the Axi Ethernet hardware. This is done through
489 while (tp->opt) { in axienet_setoptions()
490 reg = ((axienet_ior(lp, tp->reg)) & ~(tp->m_or)); in axienet_setoptions()
491 if (options & tp->opt) in axienet_setoptions()
492 reg |= tp->m_or; in axienet_setoptions()
493 axienet_iow(lp, tp->reg, reg); in axienet_setoptions()
497 lp->options |= options; in axienet_setoptions()
505 /* Reset Axi DMA. This would reset Axi Ethernet core as well. The reset in __axienet_device_reset()
506 * process of Axi DMA takes a while to complete as all pending in __axienet_device_reset()
518 dev_err(lp->dev, "%s: DMA reset timeout!\n", __func__); in __axienet_device_reset()
528 dev_err(lp->dev, "%s: timeout waiting for PhyRstCmplt\n", __func__); in __axienet_device_reset()
536 * axienet_dma_stop - Stop DMA operation
547 synchronize_irq(lp->rx_irq); in axienet_dma_stop()
552 synchronize_irq(lp->tx_irq); in axienet_dma_stop()
574 * axienet_device_reset - Reset and initialize the Axi Ethernet hardware.
577 * This function is called to reset and initialize the Axi Ethernet core. This
578 * is typically called during initialization. It does a reset of the Axi DMA
579 * Rx/Tx channels and initializes the Axi DMA BDs. Since Axi DMA reset lines
580 * are connected to Axi Ethernet reset lines, this in turn resets the Axi
581 * Ethernet core. No separate hardware reset is done for the Axi Ethernet
595 lp->max_frm_size = XAE_MAX_VLAN_FRAME_SIZE; in axienet_device_reset()
596 lp->options |= XAE_OPTION_VLAN; in axienet_device_reset()
597 lp->options &= (~XAE_OPTION_JUMBO); in axienet_device_reset()
599 if ((ndev->mtu > XAE_MTU) && in axienet_device_reset()
600 (ndev->mtu <= XAE_JUMBO_MTU)) { in axienet_device_reset()
601 lp->max_frm_size = ndev->mtu + VLAN_ETH_HLEN + in axienet_device_reset()
604 if (lp->max_frm_size <= lp->rxmem) in axienet_device_reset()
605 lp->options |= XAE_OPTION_JUMBO; in axienet_device_reset()
622 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_device_reset()
630 axienet_setoptions(ndev, lp->options & in axienet_device_reset()
634 axienet_setoptions(ndev, lp->options); in axienet_device_reset()
642 * axienet_free_tx_chain - Clean up a series of linked TX descriptors.
648 * in all cleaned-up descriptors. Ignored if NULL.
664 cur_p = &lp->tx_bd_v[(first_bd + i) % lp->tx_bd_num]; in axienet_free_tx_chain()
665 status = cur_p->status; in axienet_free_tx_chain()
676 dma_unmap_single(lp->dev, phys, in axienet_free_tx_chain()
677 (cur_p->cntrl & XAXIDMA_BD_CTRL_LENGTH_MASK), in axienet_free_tx_chain()
680 if (cur_p->skb && (status & XAXIDMA_BD_STS_COMPLETE_MASK)) in axienet_free_tx_chain()
681 napi_consume_skb(cur_p->skb, budget); in axienet_free_tx_chain()
683 cur_p->app0 = 0; in axienet_free_tx_chain()
684 cur_p->app1 = 0; in axienet_free_tx_chain()
685 cur_p->app2 = 0; in axienet_free_tx_chain()
686 cur_p->app4 = 0; in axienet_free_tx_chain()
687 cur_p->skb = NULL; in axienet_free_tx_chain()
690 cur_p->cntrl = 0; in axienet_free_tx_chain()
691 cur_p->status = 0; in axienet_free_tx_chain()
701 * axienet_check_tx_bd_space - Checks if a BD/group of BDs are currently busy
720 cur_p = &lp->tx_bd_v[(READ_ONCE(lp->tx_bd_tail) + num_frag) % in axienet_check_tx_bd_space()
721 lp->tx_bd_num]; in axienet_check_tx_bd_space()
722 if (cur_p->cntrl) in axienet_check_tx_bd_space()
728 * axienet_tx_poll - Invoked once a transmit is completed by the
729 * Axi DMA Tx channel.
744 struct net_device *ndev = lp->ndev; in axienet_tx_poll()
748 packets = axienet_free_tx_chain(lp, lp->tx_bd_ci, budget, false, &size, budget); in axienet_tx_poll()
751 lp->tx_bd_ci += packets; in axienet_tx_poll()
752 if (lp->tx_bd_ci >= lp->tx_bd_num) in axienet_tx_poll()
753 lp->tx_bd_ci %= lp->tx_bd_num; in axienet_tx_poll()
755 u64_stats_update_begin(&lp->tx_stat_sync); in axienet_tx_poll()
756 u64_stats_add(&lp->tx_packets, packets); in axienet_tx_poll()
757 u64_stats_add(&lp->tx_bytes, size); in axienet_tx_poll()
758 u64_stats_update_end(&lp->tx_stat_sync); in axienet_tx_poll()
768 /* Re-enable TX completion interrupts. This should in axienet_tx_poll()
772 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_tx_poll()
778 * axienet_start_xmit - Starts the transmission.
788 * it populates AXI Stream Control fields with appropriate values.
803 orig_tail_ptr = lp->tx_bd_tail; in axienet_start_xmit()
806 num_frag = skb_shinfo(skb)->nr_frags; in axienet_start_xmit()
807 cur_p = &lp->tx_bd_v[orig_tail_ptr]; in axienet_start_xmit()
820 if (skb->ip_summed == CHECKSUM_PARTIAL) { in axienet_start_xmit()
821 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) { in axienet_start_xmit()
823 cur_p->app0 |= 2; in axienet_start_xmit()
824 } else if (lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) { in axienet_start_xmit()
826 csum_index_off = csum_start_off + skb->csum_offset; in axienet_start_xmit()
828 cur_p->app0 |= 1; in axienet_start_xmit()
829 cur_p->app1 = (csum_start_off << 16) | csum_index_off; in axienet_start_xmit()
831 } else if (skb->ip_summed == CHECKSUM_UNNECESSARY) { in axienet_start_xmit()
832 cur_p->app0 |= 2; /* Tx Full Checksum Offload Enabled */ in axienet_start_xmit()
835 phys = dma_map_single(lp->dev, skb->data, in axienet_start_xmit()
837 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_start_xmit()
840 ndev->stats.tx_dropped++; in axienet_start_xmit()
844 cur_p->cntrl = skb_headlen(skb) | XAXIDMA_BD_CTRL_TXSOF_MASK; in axienet_start_xmit()
847 if (++new_tail_ptr >= lp->tx_bd_num) in axienet_start_xmit()
849 cur_p = &lp->tx_bd_v[new_tail_ptr]; in axienet_start_xmit()
850 frag = &skb_shinfo(skb)->frags[ii]; in axienet_start_xmit()
851 phys = dma_map_single(lp->dev, in axienet_start_xmit()
855 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_start_xmit()
858 ndev->stats.tx_dropped++; in axienet_start_xmit()
864 cur_p->cntrl = skb_frag_size(frag); in axienet_start_xmit()
867 cur_p->cntrl |= XAXIDMA_BD_CTRL_TXEOF_MASK; in axienet_start_xmit()
868 cur_p->skb = skb; in axienet_start_xmit()
870 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * new_tail_ptr; in axienet_start_xmit()
871 if (++new_tail_ptr >= lp->tx_bd_num) in axienet_start_xmit()
873 WRITE_ONCE(lp->tx_bd_tail, new_tail_ptr); in axienet_start_xmit()
885 /* Space might have just been freed - check again */ in axienet_start_xmit()
894 * axienet_rx_poll - Triggered by RX ISR to complete the BD processing.
911 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_rx_poll()
913 while (packets < budget && (cur_p->status & XAXIDMA_BD_STS_COMPLETE_MASK)) { in axienet_rx_poll()
919 skb = cur_p->skb; in axienet_rx_poll()
920 cur_p->skb = NULL; in axienet_rx_poll()
928 length = cur_p->app4 & 0x0000FFFF; in axienet_rx_poll()
931 dma_unmap_single(lp->dev, phys, lp->max_frm_size, in axienet_rx_poll()
935 skb->protocol = eth_type_trans(skb, lp->ndev); in axienet_rx_poll()
937 skb->ip_summed = CHECKSUM_NONE; in axienet_rx_poll()
940 if (lp->features & XAE_FEATURE_FULL_RX_CSUM) { in axienet_rx_poll()
941 csumstatus = (cur_p->app2 & in axienet_rx_poll()
945 skb->ip_summed = CHECKSUM_UNNECESSARY; in axienet_rx_poll()
947 } else if ((lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) != 0 && in axienet_rx_poll()
948 skb->protocol == htons(ETH_P_IP) && in axienet_rx_poll()
949 skb->len > 64) { in axienet_rx_poll()
950 skb->csum = be32_to_cpu(cur_p->app3 & 0xFFFF); in axienet_rx_poll()
951 skb->ip_summed = CHECKSUM_COMPLETE; in axienet_rx_poll()
960 new_skb = napi_alloc_skb(napi, lp->max_frm_size); in axienet_rx_poll()
964 phys = dma_map_single(lp->dev, new_skb->data, in axienet_rx_poll()
965 lp->max_frm_size, in axienet_rx_poll()
967 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_rx_poll()
969 netdev_err(lp->ndev, "RX DMA mapping error\n"); in axienet_rx_poll()
975 cur_p->cntrl = lp->max_frm_size; in axienet_rx_poll()
976 cur_p->status = 0; in axienet_rx_poll()
977 cur_p->skb = new_skb; in axienet_rx_poll()
982 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci; in axienet_rx_poll()
984 if (++lp->rx_bd_ci >= lp->rx_bd_num) in axienet_rx_poll()
985 lp->rx_bd_ci = 0; in axienet_rx_poll()
986 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_rx_poll()
989 u64_stats_update_begin(&lp->rx_stat_sync); in axienet_rx_poll()
990 u64_stats_add(&lp->rx_packets, packets); in axienet_rx_poll()
991 u64_stats_add(&lp->rx_bytes, size); in axienet_rx_poll()
992 u64_stats_update_end(&lp->rx_stat_sync); in axienet_rx_poll()
998 /* Re-enable RX completion interrupts. This should in axienet_rx_poll()
1002 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_rx_poll()
1008 * axienet_tx_irq - Tx Done Isr.
1014 * This is the Axi DMA Tx done Isr. It invokes NAPI polling to complete the
1033 (lp->tx_bd_v[lp->tx_bd_ci]).phys_msb, in axienet_tx_irq()
1034 (lp->tx_bd_v[lp->tx_bd_ci]).phys); in axienet_tx_irq()
1035 schedule_work(&lp->dma_err_task); in axienet_tx_irq()
1040 u32 cr = lp->tx_dma_cr; in axienet_tx_irq()
1045 napi_schedule(&lp->napi_tx); in axienet_tx_irq()
1052 * axienet_rx_irq - Rx Isr.
1058 * This is the Axi DMA Rx Isr. It invokes NAPI polling to complete the RX BD
1077 (lp->rx_bd_v[lp->rx_bd_ci]).phys_msb, in axienet_rx_irq()
1078 (lp->rx_bd_v[lp->rx_bd_ci]).phys); in axienet_rx_irq()
1079 schedule_work(&lp->dma_err_task); in axienet_rx_irq()
1084 u32 cr = lp->rx_dma_cr; in axienet_rx_irq()
1089 napi_schedule(&lp->napi_rx); in axienet_rx_irq()
1096 * axienet_eth_irq - Ethernet core Isr.
1115 ndev->stats.rx_missed_errors++; in axienet_eth_irq()
1118 ndev->stats.rx_frame_errors++; in axienet_eth_irq()
1127 * axienet_open - Driver open routine.
1131 * non-zero error value on failure
1136 * and ISR handling. Axi Ethernet core is reset through Axi DMA core. Buffer
1144 dev_dbg(&ndev->dev, "axienet_open()\n"); in axienet_open()
1146 /* When we do an Axi Ethernet reset, it resets the complete core in axienet_open()
1154 ret = phylink_of_phy_connect(lp->phylink, lp->dev->of_node, 0); in axienet_open()
1156 dev_err(lp->dev, "phylink_of_phy_connect() failed: %d\n", ret); in axienet_open()
1160 phylink_start(lp->phylink); in axienet_open()
1162 /* Enable worker thread for Axi DMA error handling */ in axienet_open()
1163 INIT_WORK(&lp->dma_err_task, axienet_dma_err_handler); in axienet_open()
1165 napi_enable(&lp->napi_rx); in axienet_open()
1166 napi_enable(&lp->napi_tx); in axienet_open()
1168 /* Enable interrupts for Axi DMA Tx */ in axienet_open()
1169 ret = request_irq(lp->tx_irq, axienet_tx_irq, IRQF_SHARED, in axienet_open()
1170 ndev->name, ndev); in axienet_open()
1173 /* Enable interrupts for Axi DMA Rx */ in axienet_open()
1174 ret = request_irq(lp->rx_irq, axienet_rx_irq, IRQF_SHARED, in axienet_open()
1175 ndev->name, ndev); in axienet_open()
1178 /* Enable interrupts for Axi Ethernet core (if defined) */ in axienet_open()
1179 if (lp->eth_irq > 0) { in axienet_open()
1180 ret = request_irq(lp->eth_irq, axienet_eth_irq, IRQF_SHARED, in axienet_open()
1181 ndev->name, ndev); in axienet_open()
1189 free_irq(lp->rx_irq, ndev); in axienet_open()
1191 free_irq(lp->tx_irq, ndev); in axienet_open()
1193 napi_disable(&lp->napi_tx); in axienet_open()
1194 napi_disable(&lp->napi_rx); in axienet_open()
1195 phylink_stop(lp->phylink); in axienet_open()
1196 phylink_disconnect_phy(lp->phylink); in axienet_open()
1197 cancel_work_sync(&lp->dma_err_task); in axienet_open()
1198 dev_err(lp->dev, "request_irq() failed\n"); in axienet_open()
1203 * axienet_stop - Driver stop routine.
1210 * The Axi DMA Tx/Rx BDs are released.
1216 dev_dbg(&ndev->dev, "axienet_close()\n"); in axienet_stop()
1218 napi_disable(&lp->napi_tx); in axienet_stop()
1219 napi_disable(&lp->napi_rx); in axienet_stop()
1221 phylink_stop(lp->phylink); in axienet_stop()
1222 phylink_disconnect_phy(lp->phylink); in axienet_stop()
1224 axienet_setoptions(ndev, lp->options & in axienet_stop()
1231 cancel_work_sync(&lp->dma_err_task); in axienet_stop()
1233 if (lp->eth_irq > 0) in axienet_stop()
1234 free_irq(lp->eth_irq, ndev); in axienet_stop()
1235 free_irq(lp->tx_irq, ndev); in axienet_stop()
1236 free_irq(lp->rx_irq, ndev); in axienet_stop()
1243 * axienet_change_mtu - Driver change mtu routine.
1249 * This is the change mtu driver routine. It checks if the Axi Ethernet
1258 return -EBUSY; in axienet_change_mtu()
1261 XAE_TRL_SIZE) > lp->rxmem) in axienet_change_mtu()
1262 return -EINVAL; in axienet_change_mtu()
1264 ndev->mtu = new_mtu; in axienet_change_mtu()
1271 * axienet_poll_controller - Axi Ethernet poll mechanism.
1280 disable_irq(lp->tx_irq); in axienet_poll_controller()
1281 disable_irq(lp->rx_irq); in axienet_poll_controller()
1282 axienet_rx_irq(lp->tx_irq, ndev); in axienet_poll_controller()
1283 axienet_tx_irq(lp->rx_irq, ndev); in axienet_poll_controller()
1284 enable_irq(lp->tx_irq); in axienet_poll_controller()
1285 enable_irq(lp->rx_irq); in axienet_poll_controller()
1294 return -EINVAL; in axienet_ioctl()
1296 return phylink_mii_ioctl(lp->phylink, rq, cmd); in axienet_ioctl()
1305 netdev_stats_to_stats64(stats, &dev->stats); in axienet_get_stats64()
1308 start = u64_stats_fetch_begin_irq(&lp->rx_stat_sync); in axienet_get_stats64()
1309 stats->rx_packets = u64_stats_read(&lp->rx_packets); in axienet_get_stats64()
1310 stats->rx_bytes = u64_stats_read(&lp->rx_bytes); in axienet_get_stats64()
1311 } while (u64_stats_fetch_retry_irq(&lp->rx_stat_sync, start)); in axienet_get_stats64()
1314 start = u64_stats_fetch_begin_irq(&lp->tx_stat_sync); in axienet_get_stats64()
1315 stats->tx_packets = u64_stats_read(&lp->tx_packets); in axienet_get_stats64()
1316 stats->tx_bytes = u64_stats_read(&lp->tx_bytes); in axienet_get_stats64()
1317 } while (u64_stats_fetch_retry_irq(&lp->tx_stat_sync, start)); in axienet_get_stats64()
1336 * axienet_ethtools_get_drvinfo - Get various Axi Ethernet driver information.
1341 * Issue "ethtool -i ethX" under linux prompt to execute this function.
1346 strscpy(ed->driver, DRIVER_NAME, sizeof(ed->driver)); in axienet_ethtools_get_drvinfo()
1347 strscpy(ed->version, DRIVER_VERSION, sizeof(ed->version)); in axienet_ethtools_get_drvinfo()
1351 * axienet_ethtools_get_regs_len - Get the total regs length present in the
1366 * axienet_ethtools_get_regs - Dump the contents of all registers present
1372 * This implements ethtool command for getting the Axi Ethernet register dump.
1373 * Issue "ethtool -d ethX" to execute this function.
1382 regs->version = 0; in axienet_ethtools_get_regs()
1383 regs->len = len; in axienet_ethtools_get_regs()
1432 ering->rx_max_pending = RX_BD_NUM_MAX; in axienet_ethtools_get_ringparam()
1433 ering->rx_mini_max_pending = 0; in axienet_ethtools_get_ringparam()
1434 ering->rx_jumbo_max_pending = 0; in axienet_ethtools_get_ringparam()
1435 ering->tx_max_pending = TX_BD_NUM_MAX; in axienet_ethtools_get_ringparam()
1436 ering->rx_pending = lp->rx_bd_num; in axienet_ethtools_get_ringparam()
1437 ering->rx_mini_pending = 0; in axienet_ethtools_get_ringparam()
1438 ering->rx_jumbo_pending = 0; in axienet_ethtools_get_ringparam()
1439 ering->tx_pending = lp->tx_bd_num; in axienet_ethtools_get_ringparam()
1450 if (ering->rx_pending > RX_BD_NUM_MAX || in axienet_ethtools_set_ringparam()
1451 ering->rx_mini_pending || in axienet_ethtools_set_ringparam()
1452 ering->rx_jumbo_pending || in axienet_ethtools_set_ringparam()
1453 ering->tx_pending < TX_BD_NUM_MIN || in axienet_ethtools_set_ringparam()
1454 ering->tx_pending > TX_BD_NUM_MAX) in axienet_ethtools_set_ringparam()
1455 return -EINVAL; in axienet_ethtools_set_ringparam()
1458 return -EBUSY; in axienet_ethtools_set_ringparam()
1460 lp->rx_bd_num = ering->rx_pending; in axienet_ethtools_set_ringparam()
1461 lp->tx_bd_num = ering->tx_pending; in axienet_ethtools_set_ringparam()
1466 * axienet_ethtools_get_pauseparam - Get the pause parameter setting for
1471 * This implements ethtool command for getting axi ethernet pause frame
1472 * setting. Issue "ethtool -a ethX" to execute this function.
1480 phylink_ethtool_get_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_get_pauseparam()
1484 * axienet_ethtools_set_pauseparam - Set device pause parameter(flow control)
1490 * paths. Issue "ethtool -A ethX tx on|off" under linux prompt to execute this
1493 * Return: 0 on success, -EFAULT if device is running
1501 return phylink_ethtool_set_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_set_pauseparam()
1505 * axienet_ethtools_get_coalesce - Get DMA interrupt coalescing count.
1512 * count on Tx and Rx paths. Issue "ethtool -c ethX" under linux prompt to
1525 ecoalesce->rx_max_coalesced_frames = lp->coalesce_count_rx; in axienet_ethtools_get_coalesce()
1526 ecoalesce->rx_coalesce_usecs = lp->coalesce_usec_rx; in axienet_ethtools_get_coalesce()
1527 ecoalesce->tx_max_coalesced_frames = lp->coalesce_count_tx; in axienet_ethtools_get_coalesce()
1528 ecoalesce->tx_coalesce_usecs = lp->coalesce_usec_tx; in axienet_ethtools_get_coalesce()
1533 * axienet_ethtools_set_coalesce - Set DMA interrupt coalescing count.
1540 * count on Tx and Rx paths. Issue "ethtool -C ethX rx-frames 5" under linux
1543 * Return: 0, on success, Non-zero error value on failure.
1556 return -EFAULT; in axienet_ethtools_set_coalesce()
1559 if (ecoalesce->rx_max_coalesced_frames) in axienet_ethtools_set_coalesce()
1560 lp->coalesce_count_rx = ecoalesce->rx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
1561 if (ecoalesce->rx_coalesce_usecs) in axienet_ethtools_set_coalesce()
1562 lp->coalesce_usec_rx = ecoalesce->rx_coalesce_usecs; in axienet_ethtools_set_coalesce()
1563 if (ecoalesce->tx_max_coalesced_frames) in axienet_ethtools_set_coalesce()
1564 lp->coalesce_count_tx = ecoalesce->tx_max_coalesced_frames; in axienet_ethtools_set_coalesce()
1565 if (ecoalesce->tx_coalesce_usecs) in axienet_ethtools_set_coalesce()
1566 lp->coalesce_usec_tx = ecoalesce->tx_coalesce_usecs; in axienet_ethtools_set_coalesce()
1577 return phylink_ethtool_ksettings_get(lp->phylink, cmd); in axienet_ethtools_get_link_ksettings()
1586 return phylink_ethtool_ksettings_set(lp->phylink, cmd); in axienet_ethtools_set_link_ksettings()
1593 return phylink_ethtool_nway_reset(lp->phylink); in axienet_ethtools_nway_reset()
1622 struct mdio_device *pcs_phy = pcs_to_axienet_local(pcs)->pcs_phy; in axienet_pcs_get_state()
1629 struct mdio_device *pcs_phy = pcs_to_axienet_local(pcs)->pcs_phy; in axienet_pcs_an_restart()
1639 struct mdio_device *pcs_phy = pcs_to_axienet_local(pcs)->pcs_phy; in axienet_pcs_config()
1640 struct net_device *ndev = pcs_to_axienet_local(pcs)->ndev; in axienet_pcs_config()
1644 if (lp->switch_x_sgmii) { in axienet_pcs_config()
1669 static struct phylink_pcs *axienet_mac_select_pcs(struct phylink_config *config, in axienet_mac_select_pcs() argument
1672 struct net_device *ndev = to_net_dev(config->dev); in axienet_mac_select_pcs()
1677 return &lp->pcs; in axienet_mac_select_pcs()
1682 static void axienet_mac_config(struct phylink_config *config, unsigned int mode, in axienet_mac_config() argument
1688 static void axienet_mac_link_down(struct phylink_config *config, in axienet_mac_link_down() argument
1695 static void axienet_mac_link_up(struct phylink_config *config, in axienet_mac_link_up() argument
1701 struct net_device *ndev = to_net_dev(config->dev); in axienet_mac_link_up()
1719 dev_err(&ndev->dev, in axienet_mac_link_up()
1747 * axienet_dma_err_handler - Work queue task for Axi DMA Error
1750 * Resets the Axi DMA and Axi Ethernet devices, and reconfigures the
1760 struct net_device *ndev = lp->ndev; in axienet_dma_err_handler()
1762 napi_disable(&lp->napi_tx); in axienet_dma_err_handler()
1763 napi_disable(&lp->napi_rx); in axienet_dma_err_handler()
1765 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
1770 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_err_handler()
1771 cur_p = &lp->tx_bd_v[i]; in axienet_dma_err_handler()
1772 if (cur_p->cntrl) { in axienet_dma_err_handler()
1775 dma_unmap_single(lp->dev, addr, in axienet_dma_err_handler()
1776 (cur_p->cntrl & in axienet_dma_err_handler()
1780 if (cur_p->skb) in axienet_dma_err_handler()
1781 dev_kfree_skb_irq(cur_p->skb); in axienet_dma_err_handler()
1782 cur_p->phys = 0; in axienet_dma_err_handler()
1783 cur_p->phys_msb = 0; in axienet_dma_err_handler()
1784 cur_p->cntrl = 0; in axienet_dma_err_handler()
1785 cur_p->status = 0; in axienet_dma_err_handler()
1786 cur_p->app0 = 0; in axienet_dma_err_handler()
1787 cur_p->app1 = 0; in axienet_dma_err_handler()
1788 cur_p->app2 = 0; in axienet_dma_err_handler()
1789 cur_p->app3 = 0; in axienet_dma_err_handler()
1790 cur_p->app4 = 0; in axienet_dma_err_handler()
1791 cur_p->skb = NULL; in axienet_dma_err_handler()
1794 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_err_handler()
1795 cur_p = &lp->rx_bd_v[i]; in axienet_dma_err_handler()
1796 cur_p->status = 0; in axienet_dma_err_handler()
1797 cur_p->app0 = 0; in axienet_dma_err_handler()
1798 cur_p->app1 = 0; in axienet_dma_err_handler()
1799 cur_p->app2 = 0; in axienet_dma_err_handler()
1800 cur_p->app3 = 0; in axienet_dma_err_handler()
1801 cur_p->app4 = 0; in axienet_dma_err_handler()
1804 lp->tx_bd_ci = 0; in axienet_dma_err_handler()
1805 lp->tx_bd_tail = 0; in axienet_dma_err_handler()
1806 lp->rx_bd_ci = 0; in axienet_dma_err_handler()
1817 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_dma_err_handler()
1824 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
1828 axienet_setoptions(ndev, lp->options); in axienet_dma_err_handler()
1829 napi_enable(&lp->napi_rx); in axienet_dma_err_handler()
1830 napi_enable(&lp->napi_tx); in axienet_dma_err_handler()
1834 * axienet_probe - Axi Ethernet probe function.
1838 * Non-zero error value on failure.
1840 * This is the probe routine for Axi Ethernet driver. This is called before
1858 return -ENOMEM; in axienet_probe()
1862 SET_NETDEV_DEV(ndev, &pdev->dev); in axienet_probe()
1863 ndev->flags &= ~IFF_MULTICAST; /* clear multicast */ in axienet_probe()
1864 ndev->features = NETIF_F_SG; in axienet_probe()
1865 ndev->netdev_ops = &axienet_netdev_ops; in axienet_probe()
1866 ndev->ethtool_ops = &axienet_ethtool_ops; in axienet_probe()
1868 /* MTU range: 64 - 9000 */ in axienet_probe()
1869 ndev->min_mtu = 64; in axienet_probe()
1870 ndev->max_mtu = XAE_JUMBO_MTU; in axienet_probe()
1873 lp->ndev = ndev; in axienet_probe()
1874 lp->dev = &pdev->dev; in axienet_probe()
1875 lp->options = XAE_OPTION_DEFAULTS; in axienet_probe()
1876 lp->rx_bd_num = RX_BD_NUM_DEFAULT; in axienet_probe()
1877 lp->tx_bd_num = TX_BD_NUM_DEFAULT; in axienet_probe()
1879 u64_stats_init(&lp->rx_stat_sync); in axienet_probe()
1880 u64_stats_init(&lp->tx_stat_sync); in axienet_probe()
1882 netif_napi_add(ndev, &lp->napi_rx, axienet_rx_poll); in axienet_probe()
1883 netif_napi_add(ndev, &lp->napi_tx, axienet_tx_poll); in axienet_probe()
1885 lp->axi_clk = devm_clk_get_optional(&pdev->dev, "s_axi_lite_clk"); in axienet_probe()
1886 if (!lp->axi_clk) { in axienet_probe()
1887 /* For backward compatibility, if named AXI clock is not present, in axienet_probe()
1888 * treat the first clock specified as the AXI clock. in axienet_probe()
1890 lp->axi_clk = devm_clk_get_optional(&pdev->dev, NULL); in axienet_probe()
1892 if (IS_ERR(lp->axi_clk)) { in axienet_probe()
1893 ret = PTR_ERR(lp->axi_clk); in axienet_probe()
1896 ret = clk_prepare_enable(lp->axi_clk); in axienet_probe()
1898 dev_err(&pdev->dev, "Unable to enable AXI clock: %d\n", ret); in axienet_probe()
1902 lp->misc_clks[0].id = "axis_clk"; in axienet_probe()
1903 lp->misc_clks[1].id = "ref_clk"; in axienet_probe()
1904 lp->misc_clks[2].id = "mgt_clk"; in axienet_probe()
1906 ret = devm_clk_bulk_get_optional(&pdev->dev, XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
1910 ret = clk_bulk_prepare_enable(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
1915 lp->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ðres); in axienet_probe()
1916 if (IS_ERR(lp->regs)) { in axienet_probe()
1917 ret = PTR_ERR(lp->regs); in axienet_probe()
1920 lp->regs_start = ethres->start; in axienet_probe()
1923 lp->features = 0; in axienet_probe()
1925 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,txcsum", &value); in axienet_probe()
1929 lp->csum_offload_on_tx_path = in axienet_probe()
1931 lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM; in axienet_probe()
1933 ndev->features |= NETIF_F_IP_CSUM; in axienet_probe()
1936 lp->csum_offload_on_tx_path = in axienet_probe()
1938 lp->features |= XAE_FEATURE_FULL_TX_CSUM; in axienet_probe()
1940 ndev->features |= NETIF_F_IP_CSUM; in axienet_probe()
1943 lp->csum_offload_on_tx_path = XAE_NO_CSUM_OFFLOAD; in axienet_probe()
1946 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,rxcsum", &value); in axienet_probe()
1950 lp->csum_offload_on_rx_path = in axienet_probe()
1952 lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM; in axienet_probe()
1955 lp->csum_offload_on_rx_path = in axienet_probe()
1957 lp->features |= XAE_FEATURE_FULL_RX_CSUM; in axienet_probe()
1960 lp->csum_offload_on_rx_path = XAE_NO_CSUM_OFFLOAD; in axienet_probe()
1963 /* For supporting jumbo frames, the Axi Ethernet hardware must have in axienet_probe()
1967 * the device-tree and accordingly set flags. in axienet_probe()
1969 of_property_read_u32(pdev->dev.of_node, "xlnx,rxmem", &lp->rxmem); in axienet_probe()
1971 lp->switch_x_sgmii = of_property_read_bool(pdev->dev.of_node, in axienet_probe()
1972 "xlnx,switch-x-sgmii"); in axienet_probe()
1975 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,phy-type", &value); in axienet_probe()
1977 netdev_warn(ndev, "Please upgrade your device tree binary blob to use phy-mode"); in axienet_probe()
1980 lp->phy_mode = PHY_INTERFACE_MODE_MII; in axienet_probe()
1983 lp->phy_mode = PHY_INTERFACE_MODE_GMII; in axienet_probe()
1986 lp->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; in axienet_probe()
1989 lp->phy_mode = PHY_INTERFACE_MODE_SGMII; in axienet_probe()
1992 lp->phy_mode = PHY_INTERFACE_MODE_1000BASEX; in axienet_probe()
1995 ret = -EINVAL; in axienet_probe()
1999 ret = of_get_phy_mode(pdev->dev.of_node, &lp->phy_mode); in axienet_probe()
2003 if (lp->switch_x_sgmii && lp->phy_mode != PHY_INTERFACE_MODE_SGMII && in axienet_probe()
2004 lp->phy_mode != PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
2005 dev_err(&pdev->dev, "xlnx,switch-x-sgmii only supported with SGMII or 1000BaseX\n"); in axienet_probe()
2006 ret = -EINVAL; in axienet_probe()
2011 np = of_parse_phandle(pdev->dev.of_node, "axistream-connected", 0); in axienet_probe()
2017 dev_err(&pdev->dev, in axienet_probe()
2022 lp->dma_regs = devm_ioremap_resource(&pdev->dev, in axienet_probe()
2024 lp->rx_irq = irq_of_parse_and_map(np, 1); in axienet_probe()
2025 lp->tx_irq = irq_of_parse_and_map(np, 0); in axienet_probe()
2027 lp->eth_irq = platform_get_irq_optional(pdev, 0); in axienet_probe()
2030 lp->dma_regs = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); in axienet_probe()
2031 lp->rx_irq = platform_get_irq(pdev, 1); in axienet_probe()
2032 lp->tx_irq = platform_get_irq(pdev, 0); in axienet_probe()
2033 lp->eth_irq = platform_get_irq_optional(pdev, 2); in axienet_probe()
2035 if (IS_ERR(lp->dma_regs)) { in axienet_probe()
2036 dev_err(&pdev->dev, "could not map DMA regs\n"); in axienet_probe()
2037 ret = PTR_ERR(lp->dma_regs); in axienet_probe()
2040 if ((lp->rx_irq <= 0) || (lp->tx_irq <= 0)) { in axienet_probe()
2041 dev_err(&pdev->dev, "could not determine irqs\n"); in axienet_probe()
2042 ret = -ENOMEM; in axienet_probe()
2046 /* Autodetect the need for 64-bit DMA pointers. in axienet_probe()
2055 void __iomem *desc = lp->dma_regs + XAXIDMA_TX_CDESC_OFFSET + 4; in axienet_probe()
2061 lp->features |= XAE_FEATURE_DMA_64BIT; in axienet_probe()
2063 dev_info(&pdev->dev, in axienet_probe()
2064 "autodetected 64-bit DMA range\n"); in axienet_probe()
2069 if (!IS_ENABLED(CONFIG_64BIT) && lp->features & XAE_FEATURE_DMA_64BIT) { in axienet_probe()
2070 dev_err(&pdev->dev, "64-bit addressable DMA is not compatible with 32-bit archecture\n"); in axienet_probe()
2071 ret = -EINVAL; in axienet_probe()
2075 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(addr_width)); in axienet_probe()
2077 dev_err(&pdev->dev, "No suitable DMA available\n"); in axienet_probe()
2082 if (lp->eth_irq <= 0) in axienet_probe()
2083 dev_info(&pdev->dev, "Ethernet core IRQ not defined\n"); in axienet_probe()
2086 ret = of_get_mac_address(pdev->dev.of_node, mac_addr); in axienet_probe()
2090 dev_warn(&pdev->dev, "could not find MAC address property: %d\n", in axienet_probe()
2095 lp->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD; in axienet_probe()
2096 lp->coalesce_usec_rx = XAXIDMA_DFT_RX_USEC; in axienet_probe()
2097 lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD; in axienet_probe()
2098 lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC; in axienet_probe()
2107 dev_warn(&pdev->dev, in axienet_probe()
2110 if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII || in axienet_probe()
2111 lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
2112 np = of_parse_phandle(pdev->dev.of_node, "pcs-handle", 0); in axienet_probe()
2114 /* Deprecated: Always use "pcs-handle" for pcs_phy. in axienet_probe()
2115 * Falling back to "phy-handle" here is only for in axienet_probe()
2118 np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); in axienet_probe()
2121 dev_err(&pdev->dev, "pcs-handle (preferred) or phy-handle required for 1000BaseX/SGMII\n"); in axienet_probe()
2122 ret = -EINVAL; in axienet_probe()
2125 lp->pcs_phy = of_mdio_find_device(np); in axienet_probe()
2126 if (!lp->pcs_phy) { in axienet_probe()
2127 ret = -EPROBE_DEFER; in axienet_probe()
2132 lp->pcs.ops = &axienet_pcs_ops; in axienet_probe()
2133 lp->pcs.poll = true; in axienet_probe()
2136 lp->phylink_config.dev = &ndev->dev; in axienet_probe()
2137 lp->phylink_config.type = PHYLINK_NETDEV; in axienet_probe()
2138 lp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | in axienet_probe()
2141 __set_bit(lp->phy_mode, lp->phylink_config.supported_interfaces); in axienet_probe()
2142 if (lp->switch_x_sgmii) { in axienet_probe()
2144 lp->phylink_config.supported_interfaces); in axienet_probe()
2146 lp->phylink_config.supported_interfaces); in axienet_probe()
2149 lp->phylink = phylink_create(&lp->phylink_config, pdev->dev.fwnode, in axienet_probe()
2150 lp->phy_mode, in axienet_probe()
2152 if (IS_ERR(lp->phylink)) { in axienet_probe()
2153 ret = PTR_ERR(lp->phylink); in axienet_probe()
2154 dev_err(&pdev->dev, "phylink_create error (%i)\n", ret); in axienet_probe()
2158 ret = register_netdev(lp->ndev); in axienet_probe()
2160 dev_err(lp->dev, "register_netdev() error (%i)\n", ret); in axienet_probe()
2167 phylink_destroy(lp->phylink); in axienet_probe()
2170 if (lp->pcs_phy) in axienet_probe()
2171 put_device(&lp->pcs_phy->dev); in axienet_probe()
2172 if (lp->mii_bus) in axienet_probe()
2175 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
2176 clk_disable_unprepare(lp->axi_clk); in axienet_probe()
2191 if (lp->phylink) in axienet_remove()
2192 phylink_destroy(lp->phylink); in axienet_remove()
2194 if (lp->pcs_phy) in axienet_remove()
2195 put_device(&lp->pcs_phy->dev); in axienet_remove()
2199 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_remove()
2200 clk_disable_unprepare(lp->axi_clk); in axienet_remove()
2232 MODULE_DESCRIPTION("Xilinx Axi Ethernet driver");