Lines Matching defs:axienet_local
439 struct axienet_local { struct
440 struct net_device *ndev;
441 struct device *dev;
443 struct phylink *phylink;
444 struct phylink_config phylink_config;
446 struct mdio_device *pcs_phy;
447 struct phylink_pcs pcs;
449 bool switch_x_sgmii;
451 struct clk *axi_clk;
452 struct clk_bulk_data misc_clks[XAE_NUM_MISC_CLOCKS];
454 struct mii_bus *mii_bus;
455 u8 mii_clk_div;
457 resource_size_t regs_start;
458 void __iomem *regs;
459 void __iomem *dma_regs;
461 struct napi_struct napi_rx;
462 u32 rx_dma_cr;
463 struct axidma_bd *rx_bd_v;
464 dma_addr_t rx_bd_p;
465 u32 rx_bd_num;
466 u32 rx_bd_ci;
467 u64_stats_t rx_packets;
468 u64_stats_t rx_bytes;
469 struct u64_stats_sync rx_stat_sync;
471 struct napi_struct napi_tx;
472 u32 tx_dma_cr;
473 struct axidma_bd *tx_bd_v;
474 dma_addr_t tx_bd_p;
475 u32 tx_bd_num;
476 u32 tx_bd_ci;
477 u32 tx_bd_tail;
478 u64_stats_t tx_packets;
479 u64_stats_t tx_bytes;
480 struct u64_stats_sync tx_stat_sync;
482 struct work_struct dma_err_task;
484 int tx_irq;
485 int rx_irq;
486 int eth_irq;
487 phy_interface_t phy_mode;
489 u32 options;
490 u32 features;
492 u32 max_frm_size;
493 u32 rxmem;
495 int csum_offload_on_tx_path;
496 int csum_offload_on_rx_path;
498 u32 coalesce_count_rx;
499 u32 coalesce_usec_rx;
500 u32 coalesce_count_tx;
501 u32 coalesce_usec_tx;