Lines Matching full:rp
521 static void rhine_wait_bit(struct rhine_private *rp, u8 reg, u8 mask, bool low) in rhine_wait_bit() argument
523 void __iomem *ioaddr = rp->base; in rhine_wait_bit()
534 netif_dbg(rp, hw, rp->dev, "%s bit wait (%02x/%02x) cycle " in rhine_wait_bit()
539 static void rhine_wait_bit_high(struct rhine_private *rp, u8 reg, u8 mask) in rhine_wait_bit_high() argument
541 rhine_wait_bit(rp, reg, mask, false); in rhine_wait_bit_high()
544 static void rhine_wait_bit_low(struct rhine_private *rp, u8 reg, u8 mask) in rhine_wait_bit_low() argument
546 rhine_wait_bit(rp, reg, mask, true); in rhine_wait_bit_low()
549 static u32 rhine_get_events(struct rhine_private *rp) in rhine_get_events() argument
551 void __iomem *ioaddr = rp->base; in rhine_get_events()
556 if (rp->quirks & rqStatusWBRace) in rhine_get_events()
561 static void rhine_ack_events(struct rhine_private *rp, u32 mask) in rhine_ack_events() argument
563 void __iomem *ioaddr = rp->base; in rhine_ack_events()
565 if (rp->quirks & rqStatusWBRace) in rhine_ack_events()
576 struct rhine_private *rp = netdev_priv(dev); in rhine_power_init() local
577 void __iomem *ioaddr = rp->base; in rhine_power_init()
580 if (rp->quirks & rqWOL) { in rhine_power_init()
590 if (rp->quirks & rq6patterns) in rhine_power_init()
595 if (rp->quirks & rq6patterns) in rhine_power_init()
600 if (rp->quirks & rq6patterns) in rhine_power_init()
632 struct rhine_private *rp = netdev_priv(dev); in rhine_chip_reset() local
633 void __iomem *ioaddr = rp->base; in rhine_chip_reset()
643 if (rp->quirks & rqForceReset) in rhine_chip_reset()
647 rhine_wait_bit_low(rp, ChipCmd1, Cmd1Reset); in rhine_chip_reset()
651 netif_info(rp, hw, dev, "Reset %s\n", (cmd1 & Cmd1Reset) ? in rhine_chip_reset()
702 struct rhine_private *rp = netdev_priv(dev); in rhine_reload_eeprom() local
703 void __iomem *ioaddr = rp->base; in rhine_reload_eeprom()
719 enable_mmio(pioaddr, rp->quirks); in rhine_reload_eeprom()
722 if (rp->quirks & rqWOL) in rhine_reload_eeprom()
730 struct rhine_private *rp = netdev_priv(dev); in rhine_poll() local
731 const int irq = rp->irq; in rhine_poll()
739 static void rhine_kick_tx_threshold(struct rhine_private *rp) in rhine_kick_tx_threshold() argument
741 if (rp->tx_thresh < 0xe0) { in rhine_kick_tx_threshold()
742 void __iomem *ioaddr = rp->base; in rhine_kick_tx_threshold()
744 rp->tx_thresh += 0x20; in rhine_kick_tx_threshold()
745 BYTE_REG_BITS_SET(rp->tx_thresh, 0x80, ioaddr + TxConfig); in rhine_kick_tx_threshold()
749 static void rhine_tx_err(struct rhine_private *rp, u32 status) in rhine_tx_err() argument
751 struct net_device *dev = rp->dev; in rhine_tx_err()
754 netif_info(rp, tx_err, dev, in rhine_tx_err()
759 rhine_kick_tx_threshold(rp); in rhine_tx_err()
760 netif_info(rp, tx_err ,dev, "Transmitter underrun, " in rhine_tx_err()
761 "Tx threshold now %02x\n", rp->tx_thresh); in rhine_tx_err()
765 netif_info(rp, tx_err, dev, "Tx descriptor write-back race\n"); in rhine_tx_err()
769 rhine_kick_tx_threshold(rp); in rhine_tx_err()
770 netif_info(rp, tx_err, dev, "Unspecified error. " in rhine_tx_err()
771 "Tx threshold now %02x\n", rp->tx_thresh); in rhine_tx_err()
777 static void rhine_update_rx_crc_and_missed_errord(struct rhine_private *rp) in rhine_update_rx_crc_and_missed_errord() argument
779 void __iomem *ioaddr = rp->base; in rhine_update_rx_crc_and_missed_errord()
780 struct net_device_stats *stats = &rp->dev->stats; in rhine_update_rx_crc_and_missed_errord()
818 struct rhine_private *rp = container_of(napi, struct rhine_private, napi); in rhine_napipoll() local
819 struct net_device *dev = rp->dev; in rhine_napipoll()
820 void __iomem *ioaddr = rp->base; in rhine_napipoll()
825 status = rhine_get_events(rp); in rhine_napipoll()
826 rhine_ack_events(rp, status & ~RHINE_EVENT_SLOW); in rhine_napipoll()
834 rhine_wait_bit_low(rp, ChipCmd, CmdTxOn); in rhine_napipoll()
836 netif_warn(rp, tx_err, dev, "Tx still on\n"); in rhine_napipoll()
842 rhine_tx_err(rp, status); in rhine_napipoll()
846 spin_lock(&rp->lock); in rhine_napipoll()
847 rhine_update_rx_crc_and_missed_errord(rp); in rhine_napipoll()
848 spin_unlock(&rp->lock); in rhine_napipoll()
853 schedule_work(&rp->slow_event_task); in rhine_napipoll()
865 struct rhine_private *rp = netdev_priv(dev); in rhine_hw_init() local
871 if (rp->quirks & rqRhineI) in rhine_hw_init()
900 struct rhine_private *rp; in rhine_init_one_common() local
919 rp = netdev_priv(dev); in rhine_init_one_common()
920 rp->dev = dev; in rhine_init_one_common()
921 rp->quirks = quirks; in rhine_init_one_common()
922 rp->pioaddr = pioaddr; in rhine_init_one_common()
923 rp->base = ioaddr; in rhine_init_one_common()
924 rp->irq = irq; in rhine_init_one_common()
925 rp->msg_enable = netif_msg_init(debug, RHINE_MSG_DEFAULT); in rhine_init_one_common()
927 phy_id = rp->quirks & rqIntPHY ? 1 : 0; in rhine_init_one_common()
929 u64_stats_init(&rp->tx_stats.syncp); in rhine_init_one_common()
930 u64_stats_init(&rp->rx_stats.syncp); in rhine_init_one_common()
952 spin_lock_init(&rp->lock); in rhine_init_one_common()
953 mutex_init(&rp->task_lock); in rhine_init_one_common()
954 INIT_WORK(&rp->reset_task, rhine_reset_task); in rhine_init_one_common()
955 INIT_WORK(&rp->slow_event_task, rhine_slow_event_task); in rhine_init_one_common()
957 rp->mii_if.dev = dev; in rhine_init_one_common()
958 rp->mii_if.mdio_read = mdio_read; in rhine_init_one_common()
959 rp->mii_if.mdio_write = mdio_write; in rhine_init_one_common()
960 rp->mii_if.phy_id_mask = 0x1f; in rhine_init_one_common()
961 rp->mii_if.reg_num_mask = 0x1f; in rhine_init_one_common()
968 netif_napi_add(dev, &rp->napi, rhine_napipoll); in rhine_init_one_common()
970 if (rp->quirks & rqRhineI) in rhine_init_one_common()
973 if (rp->quirks & rqMgmt) in rhine_init_one_common()
983 if (rp->quirks & rqRhineI) in rhine_init_one_common()
985 else if (rp->quirks & rqStatusWBRace) in rhine_init_one_common()
987 else if (rp->quirks & rqMgmt) in rhine_init_one_common()
993 name, ioaddr, dev->dev_addr, rp->irq); in rhine_init_one_common()
1003 rp->mii_if.advertising = mdio_read(dev, phy_id, 4); in rhine_init_one_common()
1007 mii_status, rp->mii_if.advertising, in rhine_init_one_common()
1018 rp->mii_if.phy_id = phy_id; in rhine_init_one_common()
1020 netif_info(rp, probe, dev, "No D3 power state at shutdown\n"); in rhine_init_one_common()
1140 struct rhine_private *rp = netdev_priv(dev); in alloc_ring() local
1154 if (rp->quirks & rqRhineI) { in alloc_ring()
1155 rp->tx_bufs = dma_alloc_coherent(hwdev, in alloc_ring()
1157 &rp->tx_bufs_dma, in alloc_ring()
1159 if (rp->tx_bufs == NULL) { in alloc_ring()
1168 rp->rx_ring = ring; in alloc_ring()
1169 rp->tx_ring = ring + RX_RING_SIZE * sizeof(struct rx_desc); in alloc_ring()
1170 rp->rx_ring_dma = ring_dma; in alloc_ring()
1171 rp->tx_ring_dma = ring_dma + RX_RING_SIZE * sizeof(struct rx_desc); in alloc_ring()
1178 struct rhine_private *rp = netdev_priv(dev); in free_ring() local
1184 rp->rx_ring, rp->rx_ring_dma); in free_ring()
1185 rp->tx_ring = NULL; in free_ring()
1187 if (rp->tx_bufs) in free_ring()
1189 rp->tx_bufs, rp->tx_bufs_dma); in free_ring()
1191 rp->tx_bufs = NULL; in free_ring()
1203 struct rhine_private *rp = netdev_priv(dev); in rhine_skb_dma_init() local
1205 const int size = rp->rx_buf_sz; in rhine_skb_dma_init()
1213 netif_err(rp, drv, dev, "Rx DMA mapping failure\n"); in rhine_skb_dma_init()
1221 static void rhine_reset_rbufs(struct rhine_private *rp) in rhine_reset_rbufs() argument
1225 rp->cur_rx = 0; in rhine_reset_rbufs()
1228 rp->rx_ring[i].rx_status = cpu_to_le32(DescOwn); in rhine_reset_rbufs()
1231 static inline void rhine_skb_dma_nic_store(struct rhine_private *rp, in rhine_skb_dma_nic_store() argument
1234 rp->rx_skbuff_dma[entry] = sd->dma; in rhine_skb_dma_nic_store()
1235 rp->rx_skbuff[entry] = sd->skb; in rhine_skb_dma_nic_store()
1237 rp->rx_ring[entry].addr = cpu_to_le32(sd->dma); in rhine_skb_dma_nic_store()
1245 struct rhine_private *rp = netdev_priv(dev); in alloc_rbufs() local
1249 rp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32); in alloc_rbufs()
1250 next = rp->rx_ring_dma; in alloc_rbufs()
1254 rp->rx_ring[i].rx_status = 0; in alloc_rbufs()
1255 rp->rx_ring[i].desc_length = cpu_to_le32(rp->rx_buf_sz); in alloc_rbufs()
1257 rp->rx_ring[i].next_desc = cpu_to_le32(next); in alloc_rbufs()
1258 rp->rx_skbuff[i] = NULL; in alloc_rbufs()
1261 rp->rx_ring[i-1].next_desc = cpu_to_le32(rp->rx_ring_dma); in alloc_rbufs()
1273 rhine_skb_dma_nic_store(rp, &sd, i); in alloc_rbufs()
1276 rhine_reset_rbufs(rp); in alloc_rbufs()
1283 struct rhine_private *rp = netdev_priv(dev); in free_rbufs() local
1289 rp->rx_ring[i].rx_status = 0; in free_rbufs()
1290 rp->rx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */ in free_rbufs()
1291 if (rp->rx_skbuff[i]) { in free_rbufs()
1293 rp->rx_skbuff_dma[i], in free_rbufs()
1294 rp->rx_buf_sz, DMA_FROM_DEVICE); in free_rbufs()
1295 dev_kfree_skb(rp->rx_skbuff[i]); in free_rbufs()
1297 rp->rx_skbuff[i] = NULL; in free_rbufs()
1303 struct rhine_private *rp = netdev_priv(dev); in alloc_tbufs() local
1307 rp->dirty_tx = rp->cur_tx = 0; in alloc_tbufs()
1308 next = rp->tx_ring_dma; in alloc_tbufs()
1310 rp->tx_skbuff[i] = NULL; in alloc_tbufs()
1311 rp->tx_ring[i].tx_status = 0; in alloc_tbufs()
1312 rp->tx_ring[i].desc_length = cpu_to_le32(TXDESC); in alloc_tbufs()
1314 rp->tx_ring[i].next_desc = cpu_to_le32(next); in alloc_tbufs()
1315 if (rp->quirks & rqRhineI) in alloc_tbufs()
1316 rp->tx_buf[i] = &rp->tx_bufs[i * PKT_BUF_SZ]; in alloc_tbufs()
1318 rp->tx_ring[i-1].next_desc = cpu_to_le32(rp->tx_ring_dma); in alloc_tbufs()
1325 struct rhine_private *rp = netdev_priv(dev); in free_tbufs() local
1330 rp->tx_ring[i].tx_status = 0; in free_tbufs()
1331 rp->tx_ring[i].desc_length = cpu_to_le32(TXDESC); in free_tbufs()
1332 rp->tx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */ in free_tbufs()
1333 if (rp->tx_skbuff[i]) { in free_tbufs()
1334 if (rp->tx_skbuff_dma[i]) { in free_tbufs()
1336 rp->tx_skbuff_dma[i], in free_tbufs()
1337 rp->tx_skbuff[i]->len, in free_tbufs()
1340 dev_kfree_skb(rp->tx_skbuff[i]); in free_tbufs()
1342 rp->tx_skbuff[i] = NULL; in free_tbufs()
1343 rp->tx_buf[i] = NULL; in free_tbufs()
1349 struct rhine_private *rp = netdev_priv(dev); in rhine_check_media() local
1350 void __iomem *ioaddr = rp->base; in rhine_check_media()
1352 if (!rp->mii_if.force_media) in rhine_check_media()
1353 mii_check_media(&rp->mii_if, netif_msg_link(rp), init_media); in rhine_check_media()
1355 if (rp->mii_if.full_duplex) in rhine_check_media()
1362 netif_info(rp, link, dev, "force_media %d, carrier %d\n", in rhine_check_media()
1363 rp->mii_if.force_media, netif_carrier_ok(dev)); in rhine_check_media()
1370 struct rhine_private *rp = netdev_priv(dev); in rhine_set_carrier() local
1380 netif_info(rp, link, dev, "force_media %d, carrier %d\n", in rhine_set_carrier()
1490 struct rhine_private *rp = netdev_priv(dev); in rhine_init_cam_filter() local
1491 void __iomem *ioaddr = rp->base; in rhine_init_cam_filter()
1510 struct rhine_private *rp = netdev_priv(dev); in rhine_update_vcam() local
1511 void __iomem *ioaddr = rp->base; in rhine_update_vcam()
1516 for_each_set_bit(vid, rp->active_vlans, VLAN_N_VID) { in rhine_update_vcam()
1527 struct rhine_private *rp = netdev_priv(dev); in rhine_vlan_rx_add_vid() local
1529 spin_lock_bh(&rp->lock); in rhine_vlan_rx_add_vid()
1530 set_bit(vid, rp->active_vlans); in rhine_vlan_rx_add_vid()
1532 spin_unlock_bh(&rp->lock); in rhine_vlan_rx_add_vid()
1538 struct rhine_private *rp = netdev_priv(dev); in rhine_vlan_rx_kill_vid() local
1540 spin_lock_bh(&rp->lock); in rhine_vlan_rx_kill_vid()
1541 clear_bit(vid, rp->active_vlans); in rhine_vlan_rx_kill_vid()
1543 spin_unlock_bh(&rp->lock); in rhine_vlan_rx_kill_vid()
1549 struct rhine_private *rp = netdev_priv(dev); in init_registers() local
1550 void __iomem *ioaddr = rp->base; in init_registers()
1560 rp->tx_thresh = 0x20; in init_registers()
1561 rp->rx_thresh = 0x60; /* Written in rhine_set_rx_mode(). */ in init_registers()
1563 iowrite32(rp->rx_ring_dma, ioaddr + RxRingPtr); in init_registers()
1564 iowrite32(rp->tx_ring_dma, ioaddr + TxRingPtr); in init_registers()
1568 if (rp->quirks & rqMgmt) in init_registers()
1571 napi_enable(&rp->napi); in init_registers()
1581 static void rhine_enable_linkmon(struct rhine_private *rp) in rhine_enable_linkmon() argument
1583 void __iomem *ioaddr = rp->base; in rhine_enable_linkmon()
1589 rhine_wait_bit_high(rp, MIIRegAddr, 0x20); in rhine_enable_linkmon()
1595 static void rhine_disable_linkmon(struct rhine_private *rp) in rhine_disable_linkmon() argument
1597 void __iomem *ioaddr = rp->base; in rhine_disable_linkmon()
1601 if (rp->quirks & rqRhineI) { in rhine_disable_linkmon()
1610 rhine_wait_bit_high(rp, MIIRegAddr, 0x20); in rhine_disable_linkmon()
1616 rhine_wait_bit_high(rp, MIIRegAddr, 0x80); in rhine_disable_linkmon()
1623 struct rhine_private *rp = netdev_priv(dev); in mdio_read() local
1624 void __iomem *ioaddr = rp->base; in mdio_read()
1627 rhine_disable_linkmon(rp); in mdio_read()
1633 rhine_wait_bit_low(rp, MIICmd, 0x40); in mdio_read()
1636 rhine_enable_linkmon(rp); in mdio_read()
1642 struct rhine_private *rp = netdev_priv(dev); in mdio_write() local
1643 void __iomem *ioaddr = rp->base; in mdio_write()
1645 rhine_disable_linkmon(rp); in mdio_write()
1652 rhine_wait_bit_low(rp, MIICmd, 0x20); in mdio_write()
1654 rhine_enable_linkmon(rp); in mdio_write()
1657 static void rhine_task_disable(struct rhine_private *rp) in rhine_task_disable() argument
1659 mutex_lock(&rp->task_lock); in rhine_task_disable()
1660 rp->task_enable = false; in rhine_task_disable()
1661 mutex_unlock(&rp->task_lock); in rhine_task_disable()
1663 cancel_work_sync(&rp->slow_event_task); in rhine_task_disable()
1664 cancel_work_sync(&rp->reset_task); in rhine_task_disable()
1667 static void rhine_task_enable(struct rhine_private *rp) in rhine_task_enable() argument
1669 mutex_lock(&rp->task_lock); in rhine_task_enable()
1670 rp->task_enable = true; in rhine_task_enable()
1671 mutex_unlock(&rp->task_lock); in rhine_task_enable()
1676 struct rhine_private *rp = netdev_priv(dev); in rhine_open() local
1677 void __iomem *ioaddr = rp->base; in rhine_open()
1680 rc = request_irq(rp->irq, rhine_interrupt, IRQF_SHARED, dev->name, dev); in rhine_open()
1684 netif_dbg(rp, ifup, dev, "%s() irq %d\n", __func__, rp->irq); in rhine_open()
1695 enable_mmio(rp->pioaddr, rp->quirks); in rhine_open()
1698 rhine_task_enable(rp); in rhine_open()
1701 netif_dbg(rp, ifup, dev, "%s() Done - status %04x MII status: %04x\n", in rhine_open()
1703 mdio_read(dev, rp->mii_if.phy_id, MII_BMSR)); in rhine_open()
1713 free_irq(rp->irq, dev); in rhine_open()
1719 struct rhine_private *rp = container_of(work, struct rhine_private, in rhine_reset_task() local
1721 struct net_device *dev = rp->dev; in rhine_reset_task()
1723 mutex_lock(&rp->task_lock); in rhine_reset_task()
1725 if (!rp->task_enable) in rhine_reset_task()
1728 napi_disable(&rp->napi); in rhine_reset_task()
1730 spin_lock_bh(&rp->lock); in rhine_reset_task()
1736 rhine_reset_rbufs(rp); in rhine_reset_task()
1742 spin_unlock_bh(&rp->lock); in rhine_reset_task()
1749 mutex_unlock(&rp->task_lock); in rhine_reset_task()
1754 struct rhine_private *rp = netdev_priv(dev); in rhine_tx_timeout() local
1755 void __iomem *ioaddr = rp->base; in rhine_tx_timeout()
1759 mdio_read(dev, rp->mii_if.phy_id, MII_BMSR)); in rhine_tx_timeout()
1761 schedule_work(&rp->reset_task); in rhine_tx_timeout()
1764 static inline bool rhine_tx_queue_full(struct rhine_private *rp) in rhine_tx_queue_full() argument
1766 return (rp->cur_tx - rp->dirty_tx) >= TX_QUEUE_LEN; in rhine_tx_queue_full()
1772 struct rhine_private *rp = netdev_priv(dev); in rhine_start_tx() local
1774 void __iomem *ioaddr = rp->base; in rhine_start_tx()
1781 entry = rp->cur_tx % TX_RING_SIZE; in rhine_start_tx()
1786 rp->tx_skbuff[entry] = skb; in rhine_start_tx()
1788 if ((rp->quirks & rqRhineI) && in rhine_start_tx()
1794 rp->tx_skbuff[entry] = NULL; in rhine_start_tx()
1800 skb_copy_and_csum_dev(skb, rp->tx_buf[entry]); in rhine_start_tx()
1802 memset(rp->tx_buf[entry] + skb->len, 0, in rhine_start_tx()
1804 rp->tx_skbuff_dma[entry] = 0; in rhine_start_tx()
1805 rp->tx_ring[entry].addr = cpu_to_le32(rp->tx_bufs_dma + in rhine_start_tx()
1806 (rp->tx_buf[entry] - in rhine_start_tx()
1807 rp->tx_bufs)); in rhine_start_tx()
1809 rp->tx_skbuff_dma[entry] = in rhine_start_tx()
1812 if (dma_mapping_error(hwdev, rp->tx_skbuff_dma[entry])) { in rhine_start_tx()
1814 rp->tx_skbuff_dma[entry] = 0; in rhine_start_tx()
1818 rp->tx_ring[entry].addr = cpu_to_le32(rp->tx_skbuff_dma[entry]); in rhine_start_tx()
1821 rp->tx_ring[entry].desc_length = in rhine_start_tx()
1830 rp->tx_ring[entry].tx_status = cpu_to_le32((vid_pcp) << 16); in rhine_start_tx()
1832 rp->tx_ring[entry].desc_length |= cpu_to_le32(0x020000); in rhine_start_tx()
1835 rp->tx_ring[entry].tx_status = 0; in rhine_start_tx()
1840 rp->tx_ring[entry].tx_status |= cpu_to_le32(DescOwn); in rhine_start_tx()
1843 rp->cur_tx++; in rhine_start_tx()
1863 if (rhine_tx_queue_full(rp)) { in rhine_start_tx()
1867 if (!rhine_tx_queue_full(rp)) in rhine_start_tx()
1871 netif_dbg(rp, tx_queued, dev, "Transmit frame #%d queued in slot %d\n", in rhine_start_tx()
1872 rp->cur_tx - 1, entry); in rhine_start_tx()
1877 static void rhine_irq_disable(struct rhine_private *rp) in rhine_irq_disable() argument
1879 iowrite16(0x0000, rp->base + IntrEnable); in rhine_irq_disable()
1887 struct rhine_private *rp = netdev_priv(dev); in rhine_interrupt() local
1891 status = rhine_get_events(rp); in rhine_interrupt()
1893 netif_dbg(rp, intr, dev, "Interrupt, status %08x\n", status); in rhine_interrupt()
1898 rhine_irq_disable(rp); in rhine_interrupt()
1899 napi_schedule(&rp->napi); in rhine_interrupt()
1903 netif_err(rp, intr, dev, "Something Wicked happened! %08x\n", in rhine_interrupt()
1914 struct rhine_private *rp = netdev_priv(dev); in rhine_tx() local
1917 unsigned int dirty_tx = rp->dirty_tx; in rhine_tx()
1928 cur_tx = rp->cur_tx; in rhine_tx()
1932 u32 txstatus = le32_to_cpu(rp->tx_ring[entry].tx_status); in rhine_tx()
1934 netif_dbg(rp, tx_done, dev, "Tx scavenge %d status %08x\n", in rhine_tx()
1938 skb = rp->tx_skbuff[entry]; in rhine_tx()
1940 netif_dbg(rp, tx_done, dev, in rhine_tx()
1951 if (((rp->quirks & rqRhineI) && txstatus & 0x0002) || in rhine_tx()
1954 rp->tx_ring[entry].tx_status = cpu_to_le32(DescOwn); in rhine_tx()
1959 if (rp->quirks & rqRhineI) in rhine_tx()
1963 netif_dbg(rp, tx_done, dev, "collisions: %1.1x:%1.1x\n", in rhine_tx()
1966 u64_stats_update_begin(&rp->tx_stats.syncp); in rhine_tx()
1967 rp->tx_stats.bytes += skb->len; in rhine_tx()
1968 rp->tx_stats.packets++; in rhine_tx()
1969 u64_stats_update_end(&rp->tx_stats.syncp); in rhine_tx()
1972 if (rp->tx_skbuff_dma[entry]) { in rhine_tx()
1974 rp->tx_skbuff_dma[entry], in rhine_tx()
1981 rp->tx_skbuff[entry] = NULL; in rhine_tx()
1985 rp->dirty_tx = dirty_tx; in rhine_tx()
1992 if (!rhine_tx_queue_full(rp) && netif_queue_stopped(dev)) { in rhine_tx()
1996 if (rhine_tx_queue_full(rp)) in rhine_tx()
2031 struct rhine_private *rp = netdev_priv(dev); in rhine_rx() local
2033 int entry = rp->cur_rx % RX_RING_SIZE; in rhine_rx()
2036 netif_dbg(rp, rx_status, dev, "%s(), entry %d status %08x\n", __func__, in rhine_rx()
2037 entry, le32_to_cpu(rp->rx_ring[entry].rx_status)); in rhine_rx()
2041 struct rx_desc *desc = rp->rx_ring + entry; in rhine_rx()
2048 netif_dbg(rp, rx_status, dev, "%s() status %08x\n", __func__, in rhine_rx()
2061 netif_dbg(rp, rx_err, dev, in rhine_rx()
2073 spin_lock(&rp->lock); in rhine_rx()
2075 spin_unlock(&rp->lock); in rhine_rx()
2091 rp->rx_skbuff_dma[entry], in rhine_rx()
2092 rp->rx_buf_sz, in rhine_rx()
2096 rp->rx_skbuff[entry]->data, in rhine_rx()
2100 rp->rx_skbuff_dma[entry], in rhine_rx()
2101 rp->rx_buf_sz, in rhine_rx()
2109 skb = rp->rx_skbuff[entry]; in rhine_rx()
2112 rp->rx_skbuff_dma[entry], in rhine_rx()
2113 rp->rx_buf_sz, in rhine_rx()
2115 rhine_skb_dma_nic_store(rp, &sd, entry); in rhine_rx()
2126 u64_stats_update_begin(&rp->rx_stats.syncp); in rhine_rx()
2127 rp->rx_stats.bytes += pkt_len; in rhine_rx()
2128 rp->rx_stats.packets++; in rhine_rx()
2129 u64_stats_update_end(&rp->rx_stats.syncp); in rhine_rx()
2133 entry = (++rp->cur_rx) % RX_RING_SIZE; in rhine_rx()
2144 struct rhine_private *rp = netdev_priv(dev); in rhine_restart_tx() local
2145 void __iomem *ioaddr = rp->base; in rhine_restart_tx()
2146 int entry = rp->dirty_tx % TX_RING_SIZE; in rhine_restart_tx()
2153 intr_status = rhine_get_events(rp); in rhine_restart_tx()
2158 iowrite32(rp->tx_ring_dma + entry * sizeof(struct tx_desc), in rhine_restart_tx()
2164 if (rp->tx_ring[entry].desc_length & cpu_to_le32(0x020000)) in rhine_restart_tx()
2174 netif_warn(rp, tx_err, dev, "another error occurred %08x\n", in rhine_restart_tx()
2182 struct rhine_private *rp = in rhine_slow_event_task() local
2184 struct net_device *dev = rp->dev; in rhine_slow_event_task()
2187 mutex_lock(&rp->task_lock); in rhine_slow_event_task()
2189 if (!rp->task_enable) in rhine_slow_event_task()
2192 intr_status = rhine_get_events(rp); in rhine_slow_event_task()
2193 rhine_ack_events(rp, intr_status & RHINE_EVENT_SLOW); in rhine_slow_event_task()
2199 netif_warn(rp, hw, dev, "PCI error\n"); in rhine_slow_event_task()
2201 iowrite16(RHINE_EVENT & 0xffff, rp->base + IntrEnable); in rhine_slow_event_task()
2204 mutex_unlock(&rp->task_lock); in rhine_slow_event_task()
2210 struct rhine_private *rp = netdev_priv(dev); in rhine_get_stats64() local
2213 spin_lock_bh(&rp->lock); in rhine_get_stats64()
2214 rhine_update_rx_crc_and_missed_errord(rp); in rhine_get_stats64()
2215 spin_unlock_bh(&rp->lock); in rhine_get_stats64()
2220 start = u64_stats_fetch_begin_irq(&rp->rx_stats.syncp); in rhine_get_stats64()
2221 stats->rx_packets = rp->rx_stats.packets; in rhine_get_stats64()
2222 stats->rx_bytes = rp->rx_stats.bytes; in rhine_get_stats64()
2223 } while (u64_stats_fetch_retry_irq(&rp->rx_stats.syncp, start)); in rhine_get_stats64()
2226 start = u64_stats_fetch_begin_irq(&rp->tx_stats.syncp); in rhine_get_stats64()
2227 stats->tx_packets = rp->tx_stats.packets; in rhine_get_stats64()
2228 stats->tx_bytes = rp->tx_stats.bytes; in rhine_get_stats64()
2229 } while (u64_stats_fetch_retry_irq(&rp->tx_stats.syncp, start)); in rhine_get_stats64()
2234 struct rhine_private *rp = netdev_priv(dev); in rhine_set_rx_mode() local
2235 void __iomem *ioaddr = rp->base; in rhine_set_rx_mode()
2249 } else if (rp->quirks & rqMgmt) { in rhine_set_rx_mode()
2271 if (rp->quirks & rqMgmt) { in rhine_set_rx_mode()
2291 struct rhine_private *rp = netdev_priv(dev); in netdev_get_link_ksettings() local
2293 mutex_lock(&rp->task_lock); in netdev_get_link_ksettings()
2294 mii_ethtool_get_link_ksettings(&rp->mii_if, cmd); in netdev_get_link_ksettings()
2295 mutex_unlock(&rp->task_lock); in netdev_get_link_ksettings()
2303 struct rhine_private *rp = netdev_priv(dev); in netdev_set_link_ksettings() local
2306 mutex_lock(&rp->task_lock); in netdev_set_link_ksettings()
2307 rc = mii_ethtool_set_link_ksettings(&rp->mii_if, cmd); in netdev_set_link_ksettings()
2308 rhine_set_carrier(&rp->mii_if); in netdev_set_link_ksettings()
2309 mutex_unlock(&rp->task_lock); in netdev_set_link_ksettings()
2316 struct rhine_private *rp = netdev_priv(dev); in netdev_nway_reset() local
2318 return mii_nway_restart(&rp->mii_if); in netdev_nway_reset()
2323 struct rhine_private *rp = netdev_priv(dev); in netdev_get_link() local
2325 return mii_link_ok(&rp->mii_if); in netdev_get_link()
2330 struct rhine_private *rp = netdev_priv(dev); in netdev_get_msglevel() local
2332 return rp->msg_enable; in netdev_get_msglevel()
2337 struct rhine_private *rp = netdev_priv(dev); in netdev_set_msglevel() local
2339 rp->msg_enable = value; in netdev_set_msglevel()
2344 struct rhine_private *rp = netdev_priv(dev); in rhine_get_wol() local
2346 if (!(rp->quirks & rqWOL)) in rhine_get_wol()
2349 spin_lock_irq(&rp->lock); in rhine_get_wol()
2352 wol->wolopts = rp->wolopts; in rhine_get_wol()
2353 spin_unlock_irq(&rp->lock); in rhine_get_wol()
2358 struct rhine_private *rp = netdev_priv(dev); in rhine_set_wol() local
2362 if (!(rp->quirks & rqWOL)) in rhine_set_wol()
2368 spin_lock_irq(&rp->lock); in rhine_set_wol()
2369 rp->wolopts = wol->wolopts; in rhine_set_wol()
2370 spin_unlock_irq(&rp->lock); in rhine_set_wol()
2389 struct rhine_private *rp = netdev_priv(dev); in netdev_ioctl() local
2395 mutex_lock(&rp->task_lock); in netdev_ioctl()
2396 rc = generic_mii_ioctl(&rp->mii_if, if_mii(rq), cmd, NULL); in netdev_ioctl()
2397 rhine_set_carrier(&rp->mii_if); in netdev_ioctl()
2398 mutex_unlock(&rp->task_lock); in netdev_ioctl()
2405 struct rhine_private *rp = netdev_priv(dev); in rhine_close() local
2406 void __iomem *ioaddr = rp->base; in rhine_close()
2408 rhine_task_disable(rp); in rhine_close()
2409 napi_disable(&rp->napi); in rhine_close()
2412 netif_dbg(rp, ifdown, dev, "Shutting down ethercard, status was %04x\n", in rhine_close()
2416 iowrite8(rp->tx_thresh | 0x02, ioaddr + TxConfig); in rhine_close()
2418 rhine_irq_disable(rp); in rhine_close()
2423 free_irq(rp->irq, dev); in rhine_close()
2435 struct rhine_private *rp = netdev_priv(dev); in rhine_remove_one_pci() local
2439 pci_iounmap(pdev, rp->base); in rhine_remove_one_pci()
2449 struct rhine_private *rp = netdev_priv(dev); in rhine_remove_one_platform() local
2453 iounmap(rp->base); in rhine_remove_one_platform()
2463 struct rhine_private *rp = netdev_priv(dev); in rhine_shutdown_pci() local
2464 void __iomem *ioaddr = rp->base; in rhine_shutdown_pci()
2466 if (!(rp->quirks & rqWOL)) in rhine_shutdown_pci()
2472 if (rp->quirks & rq6patterns) in rhine_shutdown_pci()
2475 spin_lock(&rp->lock); in rhine_shutdown_pci()
2477 if (rp->wolopts & WAKE_MAGIC) { in rhine_shutdown_pci()
2486 if (rp->wolopts & (WAKE_BCAST|WAKE_MCAST)) in rhine_shutdown_pci()
2489 if (rp->wolopts & WAKE_PHY) in rhine_shutdown_pci()
2492 if (rp->wolopts & WAKE_UCAST) in rhine_shutdown_pci()
2495 if (rp->wolopts) { in rhine_shutdown_pci()
2501 spin_unlock(&rp->lock); in rhine_shutdown_pci()
2515 struct rhine_private *rp = netdev_priv(dev); in rhine_suspend() local
2520 rhine_task_disable(rp); in rhine_suspend()
2521 rhine_irq_disable(rp); in rhine_suspend()
2522 napi_disable(&rp->napi); in rhine_suspend()
2535 struct rhine_private *rp = netdev_priv(dev); in rhine_resume() local
2540 enable_mmio(rp->pioaddr, rp->quirks); in rhine_resume()
2544 rhine_reset_rbufs(rp); in rhine_resume()
2545 rhine_task_enable(rp); in rhine_resume()
2546 spin_lock_bh(&rp->lock); in rhine_resume()
2548 spin_unlock_bh(&rp->lock); in rhine_resume()