1 // SPDX-License-Identifier: GPL-2.0
36 			     phy_interface_t phy_mode, int slave);
41 				 phy_interface_t phy_mode, int slave)  in cpsw_gmii_sel_am3352()  argument
45 	u32 mode = 0;  in cpsw_gmii_sel_am3352()  local
48 	reg = readl(priv->gmii_sel);  in cpsw_gmii_sel_am3352()
52 		mode = AM33XX_GMII_SEL_MODE_RMII;  in cpsw_gmii_sel_am3352()
56 		mode = AM33XX_GMII_SEL_MODE_RGMII;  in cpsw_gmii_sel_am3352()
62 		mode = AM33XX_GMII_SEL_MODE_RGMII;  in cpsw_gmii_sel_am3352()
67 		dev_warn(priv->dev,  in cpsw_gmii_sel_am3352()
68 			 "Unsupported PHY mode: \"%s\". Defaulting to MII.\n",  in cpsw_gmii_sel_am3352()
72 		mode = AM33XX_GMII_SEL_MODE_MII;  in cpsw_gmii_sel_am3352()
76 	mask = GMII_SEL_MODE_MASK << (slave * 2) | BIT(slave + 6);  in cpsw_gmii_sel_am3352()
77 	mask |= BIT(slave + 4);  in cpsw_gmii_sel_am3352()
78 	mode <<= slave * 2;  in cpsw_gmii_sel_am3352()
80 	if (priv->rmii_clock_external) {  in cpsw_gmii_sel_am3352()
81 		if (slave == 0)  in cpsw_gmii_sel_am3352()
82 			mode |= AM33XX_GMII_SEL_RMII1_IO_CLK_EN;  in cpsw_gmii_sel_am3352()
84 			mode |= AM33XX_GMII_SEL_RMII2_IO_CLK_EN;  in cpsw_gmii_sel_am3352()
88 		if (slave == 0)  in cpsw_gmii_sel_am3352()
89 			mode |= AM33XX_GMII_SEL_RGMII1_IDMODE;  in cpsw_gmii_sel_am3352()
91 			mode |= AM33XX_GMII_SEL_RGMII2_IDMODE;  in cpsw_gmii_sel_am3352()
95 	reg |= mode;  in cpsw_gmii_sel_am3352()
97 	writel(reg, priv->gmii_sel);  in cpsw_gmii_sel_am3352()
101 				 phy_interface_t phy_mode, int slave)  in cpsw_gmii_sel_dra7xx()  argument
105 	u32 mode = 0;  in cpsw_gmii_sel_dra7xx()  local
107 	reg = readl(priv->gmii_sel);  in cpsw_gmii_sel_dra7xx()
111 		mode = AM33XX_GMII_SEL_MODE_RMII;  in cpsw_gmii_sel_dra7xx()
118 		mode = AM33XX_GMII_SEL_MODE_RGMII;  in cpsw_gmii_sel_dra7xx()
122 		dev_warn(priv->dev,  in cpsw_gmii_sel_dra7xx()
123 			 "Unsupported PHY mode: \"%s\". Defaulting to MII.\n",  in cpsw_gmii_sel_dra7xx()
127 		mode = AM33XX_GMII_SEL_MODE_MII;  in cpsw_gmii_sel_dra7xx()
131 	switch (slave) {  in cpsw_gmii_sel_dra7xx()
137 		mode <<= 4;  in cpsw_gmii_sel_dra7xx()
140 		dev_err(priv->dev, "invalid slave number...\n");  in cpsw_gmii_sel_dra7xx()
144 	if (priv->rmii_clock_external)  in cpsw_gmii_sel_dra7xx()
145 		dev_err(priv->dev, "RMII External clock is not supported\n");  in cpsw_gmii_sel_dra7xx()
148 	reg |= mode;  in cpsw_gmii_sel_dra7xx()
150 	writel(reg, priv->gmii_sel);  in cpsw_gmii_sel_dra7xx()
157 	return dev->of_node == node &&  in match()
158 		dev->driver == &cpsw_phy_sel_driver.driver;  in match()
161 void cpsw_phy_sel(struct device *dev, phy_interface_t phy_mode, int slave)  in cpsw_phy_sel()  argument
166 	node = of_parse_phandle(dev->of_node, "cpsw-phy-sel", 0);  in cpsw_phy_sel()
168 		node = of_get_child_by_name(dev->of_node, "cpsw-phy-sel");  in cpsw_phy_sel()
170 			dev_err(dev, "Phy mode driver DT not found\n");  in cpsw_phy_sel()
183 	priv->cpsw_phy_sel(priv, phy_mode, slave);  in cpsw_phy_sel()
193 		.compatible	= "ti,am3352-cpsw-phy-sel",
197 		.compatible	= "ti,dra7xx-cpsw-phy-sel",
201 		.compatible	= "ti,am43xx-cpsw-phy-sel",
212 	of_id = of_match_node(cpsw_phy_sel_id_table, pdev->dev.of_node);  in cpsw_phy_sel_probe()
214 		return -EINVAL;  in cpsw_phy_sel_probe()
216 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);  in cpsw_phy_sel_probe()
218 		dev_err(&pdev->dev, "unable to alloc memory for cpsw phy sel\n");  in cpsw_phy_sel_probe()
219 		return -ENOMEM;  in cpsw_phy_sel_probe()
222 	priv->dev = &pdev->dev;  in cpsw_phy_sel_probe()
223 	priv->cpsw_phy_sel = of_id->data;  in cpsw_phy_sel_probe()
225 	priv->gmii_sel = devm_platform_ioremap_resource_byname(pdev, "gmii-sel");  in cpsw_phy_sel_probe()
226 	if (IS_ERR(priv->gmii_sel))  in cpsw_phy_sel_probe()
227 		return PTR_ERR(priv->gmii_sel);  in cpsw_phy_sel_probe()
229 	if (of_find_property(pdev->dev.of_node, "rmii-clock-ext", NULL))  in cpsw_phy_sel_probe()
230 		priv->rmii_clock_external = true;  in cpsw_phy_sel_probe()
232 	dev_set_drvdata(&pdev->dev, priv);  in cpsw_phy_sel_probe()
240 		.name	= "cpsw-phy-sel",