Lines Matching full:transmit
45 #define GREG_STAT_TFIFO_UND 0x00000200 /* Transmit FIFO underrun */
58 #define GREG_STAT_EOPERR 0x00400000 /* Transmit descriptor did not have EOP set */
60 #define GREG_STAT_HOSTTOTX 0x01000000 /* Moved from host memory to transmit-FIFO */
62 #define GREG_STAT_TXEACK 0x04000000 /* Error during transmit dma */
63 #define GREG_STAT_TXLERR 0x08000000 /* Late error during transmit dma */
64 #define GREG_STAT_TXPERR 0x10000000 /* Parity error during transmit dma */
65 #define GREG_STAT_TXTERR 0x20000000 /* Tag error during transmit dma */
82 #define GREG_IMASK_TFIFO_UND 0x00000200 /* Transmit FIFO underrun */
95 #define GREG_IMASK_EOPERR 0x00400000 /* Transmit descriptor did not have EOP set */
97 #define GREG_IMASK_HOSTTOTX 0x01000000 /* Moved from host memory to transmit-FIFO */
99 #define GREG_IMASK_TXEACK 0x04000000 /* Error during transmit dma */
100 #define GREG_IMASK_TXLERR 0x08000000 /* Late error during transmit dma */
101 #define GREG_IMASK_TXPERR 0x10000000 /* Parity error during transmit dma */
102 #define GREG_IMASK_TXTERR 0x20000000 /* Tag error during transmit dma */
107 #define ETX_PENDING 0x00UL /* Transmit pending/wakeup register */
108 #define ETX_CFG 0x04UL /* Transmit config register */
109 #define ETX_RING 0x08UL /* Transmit ring pointer */
110 #define ETX_BBASE 0x0cUL /* Transmit buffer base */
111 #define ETX_BDISP 0x10UL /* Transmit buffer displacement */
119 #define ETX_BPTR 0x30UL /* Transmit data buffer ptr */
122 /* ETX transmit pending register. */
123 #define ETX_TP_DMAWAKEUP 0x00000001 /* Restart transmit dma */
126 #define ETX_CFG_DMAENABLE 0x00000001 /* Enable transmit dma */
127 #define ETX_CFG_FIFOTHRESH 0x000003fe /* Transmit FIFO threshold */
164 #define BMAC_ALIMIT 0x218UL /* Transmit attempt limit */
165 #define BMAC_STIME 0x21cUL /* Transmit slot time */
166 #define BMAC_PLEN 0x220UL /* Size of transmit preamble */
167 #define BMAC_PPAT 0x224UL /* Pattern for transmit preamble */
168 #define BMAC_TXSDELIM 0x228UL /* Transmit delimiter */
170 #define BMAC_TXMAX 0x230UL /* Transmit max pkt size */
171 #define BMAC_TXMIN 0x234UL /* Transmit min pkt size */
172 #define BMAC_PATTEMPT 0x238UL /* Count of transmit peak attempts */
173 #define BMAC_DTCTR 0x23cUL /* Transmit defer timer */
174 #define BMAC_NCCTR 0x240UL /* Transmit normal-collision counter */
175 #define BMAC_FCCTR 0x244UL /* Transmit first-collision counter */
176 #define BMAC_EXCTR 0x248UL /* Transmit excess-collision counter */
177 #define BMAC_LTCTR 0x24cUL /* Transmit late-collision counter */
178 #define BMAC_RSEED 0x250UL /* Transmit random number seed */
179 #define BMAC_TXSMACHINE 0x254UL /* Transmit state machine */
215 /* BigMac transmit config register. */
217 #define BIGMAC_TXCFG_SMODE 0x00000020 /* Enable slow transmit mode */
218 #define BIGMAC_TXCFG_CIGN 0x00000040 /* Ignore transmit collisions */