Lines Matching +full:mtl +full:- +full:tx +full:- +full:config

1 /* SPDX-License-Identifier: GPL-2.0-only */
133 /* TX Queues Priorities */
137 /* MAC Flow Control TX */
186 #define GMAC4_LPI_CTRL_STATUS_LPITCSE	BIT(21)	/* LPI Tx Clock Stop Enable */
188 #define GMAC4_LPI_CTRL_STATUS_LPITXA	BIT(19)	/* Enable LPI TX Automate */
208 /* MAC config */
229 /* MAC extended config */
317 /*  MTL registers */
336 #define MTL_RXQ_DMA_QXMDMACH_MASK(x)	GENMASK(11 + (8 * ((x) - 1)), 8 * (x))
390 /* MTL ETS Control register */
399 /* MTL Queue Quantum Weight */
406 /* MTL sendSlopeCredit register */
414 /* MTL hiCredit register */
422 /* MTL loCredit register */
430 /*  MTL debug */
435 /* MTL debug: Tx FIFO Read Controller Status */
459 /*  MTL interrupt */
471 /*  MTL debug */
476 /* MTL debug: Tx FIFO Read Controller Status */