58 	struct visconti_eth *dwmac = priv;  in visconti_eth_fix_mac_speed()  local
59 	struct net_device *netdev = dev_get_drvdata(dwmac->dev);  in visconti_eth_fix_mac_speed()
63 	spin_lock_irqsave(&dwmac->lock, flags);  in visconti_eth_fix_mac_speed()
66 	val = readl(dwmac->reg + MAC_CTRL_REG);  in visconti_eth_fix_mac_speed()
71 		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RGMII)  in visconti_eth_fix_mac_speed()
75 		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RGMII)  in visconti_eth_fix_mac_speed()
77 		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RMII)  in visconti_eth_fix_mac_speed()
82 		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RGMII)  in visconti_eth_fix_mac_speed()
84 		if (dwmac->phy_intf_sel == ETHER_CONFIG_INTF_RMII)  in visconti_eth_fix_mac_speed()
91 		spin_unlock_irqrestore(&dwmac->lock, flags);  in visconti_eth_fix_mac_speed()
95 	writel(val, dwmac->reg + MAC_CTRL_REG);  in visconti_eth_fix_mac_speed()
98 	val = readl(dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
101 	writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
104 	switch (dwmac->phy_intf_sel) {  in visconti_eth_fix_mac_speed()
107 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
110 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
113 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
119 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
122 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
125 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
131 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
134 		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_fix_mac_speed()
138 	spin_unlock_irqrestore(&dwmac->lock, flags);  in visconti_eth_fix_mac_speed()
143 	struct visconti_eth *dwmac = plat_dat->bsp_priv;  in visconti_eth_init_hw()  local
151 		dwmac->phy_intf_sel = ETHER_CONFIG_INTF_RGMII;  in visconti_eth_init_hw()
154 		dwmac->phy_intf_sel = ETHER_CONFIG_INTF_MII;  in visconti_eth_init_hw()
157 		dwmac->phy_intf_sel = ETHER_CONFIG_INTF_RMII;  in visconti_eth_init_hw()
164 	reg_val = dwmac->phy_intf_sel;  in visconti_eth_init_hw()
165 	writel(reg_val, dwmac->reg + REG_ETHER_CONTROL);  in visconti_eth_init_hw()
169 	writel(clk_sel_val, dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_init_hw()
172 	       dwmac->reg + REG_ETHER_CLOCK_SEL);  in visconti_eth_init_hw()
176 	writel(reg_val, dwmac->reg + REG_ETHER_CONTROL);  in visconti_eth_init_hw()
184 	struct visconti_eth *dwmac = plat_dat->bsp_priv;  in visconti_eth_clock_probe()  local
187 	dwmac->phy_ref_clk = devm_clk_get(&pdev->dev, "phy_ref_clk");  in visconti_eth_clock_probe()
188 	if (IS_ERR(dwmac->phy_ref_clk))  in visconti_eth_clock_probe()
189 		return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->phy_ref_clk),  in visconti_eth_clock_probe()
192 	err = clk_prepare_enable(dwmac->phy_ref_clk);  in visconti_eth_clock_probe()
203 	struct visconti_eth *dwmac = get_stmmac_bsp_priv(&pdev->dev);  in visconti_eth_clock_remove()  local
207 	clk_disable_unprepare(dwmac->phy_ref_clk);  in visconti_eth_clock_remove()
217 	struct visconti_eth *dwmac;  in visconti_eth_dwmac_probe()  local
228 	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);  in visconti_eth_dwmac_probe()
229 	if (!dwmac) {  in visconti_eth_dwmac_probe()
234 	spin_lock_init(&dwmac->lock);  in visconti_eth_dwmac_probe()
235 	dwmac->reg = stmmac_res.addr;  in visconti_eth_dwmac_probe()
236 	dwmac->dev = &pdev->dev;  in visconti_eth_dwmac_probe()
237 	plat_dat->bsp_priv = dwmac;  in visconti_eth_dwmac_probe()