60 	struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;  in socfpga_dwmac_fix_mac_speed()  local
61 	void __iomem *splitter_base = dwmac->splitter_base;  in socfpga_dwmac_fix_mac_speed()
62 	void __iomem *sgmii_adapter_base = dwmac->pcs.sgmii_adapter_base;  in socfpga_dwmac_fix_mac_speed()
63 	struct device *dev = dwmac->dev;  in socfpga_dwmac_fix_mac_speed()
95 		tse_pcs_fix_mac_speed(&dwmac->pcs, phy_dev, speed);  in socfpga_dwmac_fix_mac_speed()
99 static int socfpga_dwmac_parse_data(struct socfpga_dwmac *dwmac, struct device *dev)  in socfpga_dwmac_parse_data()  argument
130 	dwmac->f2h_ptp_ref_clk = of_property_read_bool(np, "altr,f2h_ptp_ref_clk");  in socfpga_dwmac_parse_data()
141 		dwmac->splitter_base = devm_ioremap_resource(dev, &res_splitter);  in socfpga_dwmac_parse_data()
142 		if (IS_ERR(dwmac->splitter_base)) {  in socfpga_dwmac_parse_data()
144 			return PTR_ERR(dwmac->splitter_base);  in socfpga_dwmac_parse_data()
164 			dwmac->splitter_base =  in socfpga_dwmac_parse_data()
167 			if (IS_ERR(dwmac->splitter_base)) {  in socfpga_dwmac_parse_data()
168 				ret = PTR_ERR(dwmac->splitter_base);  in socfpga_dwmac_parse_data()
186 			dwmac->pcs.sgmii_adapter_base =  in socfpga_dwmac_parse_data()
189 			if (IS_ERR(dwmac->pcs.sgmii_adapter_base)) {  in socfpga_dwmac_parse_data()
190 				ret = PTR_ERR(dwmac->pcs.sgmii_adapter_base);  in socfpga_dwmac_parse_data()
208 			dwmac->pcs.tse_pcs_base =  in socfpga_dwmac_parse_data()
211 			if (IS_ERR(dwmac->pcs.tse_pcs_base)) {  in socfpga_dwmac_parse_data()
212 				ret = PTR_ERR(dwmac->pcs.tse_pcs_base);  in socfpga_dwmac_parse_data()
217 	dwmac->reg_offset = reg_offset;  in socfpga_dwmac_parse_data()
218 	dwmac->reg_shift = reg_shift;  in socfpga_dwmac_parse_data()
219 	dwmac->sys_mgr_base_addr = sys_mgr_base_addr;  in socfpga_dwmac_parse_data()
220 	dwmac->dev = dev;  in socfpga_dwmac_parse_data()
230 static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)  in socfpga_get_plat_phymode()  argument
232 	struct net_device *ndev = dev_get_drvdata(dwmac->dev);  in socfpga_get_plat_phymode()
261 static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)  in socfpga_gen5_set_phy_mode()  argument
263 	struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;  in socfpga_gen5_set_phy_mode()
264 	int phymode = socfpga_get_plat_phymode(dwmac);  in socfpga_gen5_set_phy_mode()
265 	u32 reg_offset = dwmac->reg_offset;  in socfpga_gen5_set_phy_mode()
266 	u32 reg_shift = dwmac->reg_shift;  in socfpga_gen5_set_phy_mode()
270 		dev_err(dwmac->dev, "bad phy mode %d\n", phymode);  in socfpga_gen5_set_phy_mode()
278 	if (dwmac->splitter_base)  in socfpga_gen5_set_phy_mode()
282 	reset_control_assert(dwmac->stmmac_ocp_rst);  in socfpga_gen5_set_phy_mode()
283 	reset_control_assert(dwmac->stmmac_rst);  in socfpga_gen5_set_phy_mode()
289 	if (dwmac->f2h_ptp_ref_clk ||  in socfpga_gen5_set_phy_mode()
300 	if (dwmac->f2h_ptp_ref_clk)  in socfpga_gen5_set_phy_mode()
311 	reset_control_deassert(dwmac->stmmac_ocp_rst);  in socfpga_gen5_set_phy_mode()
312 	reset_control_deassert(dwmac->stmmac_rst);  in socfpga_gen5_set_phy_mode()
314 		if (tse_pcs_init(dwmac->pcs.tse_pcs_base, &dwmac->pcs) != 0) {  in socfpga_gen5_set_phy_mode()
315 			dev_err(dwmac->dev, "Unable to initialize TSE PCS");  in socfpga_gen5_set_phy_mode()
323 static int socfpga_gen10_set_phy_mode(struct socfpga_dwmac *dwmac)  in socfpga_gen10_set_phy_mode()  argument
325 	struct regmap *sys_mgr_base_addr = dwmac->sys_mgr_base_addr;  in socfpga_gen10_set_phy_mode()
326 	int phymode = socfpga_get_plat_phymode(dwmac);  in socfpga_gen10_set_phy_mode()
327 	u32 reg_offset = dwmac->reg_offset;  in socfpga_gen10_set_phy_mode()
328 	u32 reg_shift = dwmac->reg_shift;  in socfpga_gen10_set_phy_mode()
338 	if (dwmac->splitter_base)  in socfpga_gen10_set_phy_mode()
342 	reset_control_assert(dwmac->stmmac_ocp_rst);  in socfpga_gen10_set_phy_mode()
343 	reset_control_assert(dwmac->stmmac_rst);  in socfpga_gen10_set_phy_mode()
349 	if (dwmac->f2h_ptp_ref_clk ||  in socfpga_gen10_set_phy_mode()
368 	reset_control_deassert(dwmac->stmmac_ocp_rst);  in socfpga_gen10_set_phy_mode()
369 	reset_control_deassert(dwmac->stmmac_rst);  in socfpga_gen10_set_phy_mode()
371 		if (tse_pcs_init(dwmac->pcs.tse_pcs_base, &dwmac->pcs) != 0) {  in socfpga_gen10_set_phy_mode()
372 			dev_err(dwmac->dev, "Unable to initialize TSE PCS");  in socfpga_gen10_set_phy_mode()
385 	struct socfpga_dwmac	*dwmac;  in socfpga_dwmac_probe()  local
404 	dwmac = devm_kzalloc(dev, sizeof(*dwmac), GFP_KERNEL);  in socfpga_dwmac_probe()
405 	if (!dwmac) {  in socfpga_dwmac_probe()
410 	dwmac->stmmac_ocp_rst = devm_reset_control_get_optional(dev, "stmmaceth-ocp");  in socfpga_dwmac_probe()
411 	if (IS_ERR(dwmac->stmmac_ocp_rst)) {  in socfpga_dwmac_probe()
412 		ret = PTR_ERR(dwmac->stmmac_ocp_rst);  in socfpga_dwmac_probe()
417 	reset_control_deassert(dwmac->stmmac_ocp_rst);  in socfpga_dwmac_probe()
419 	ret = socfpga_dwmac_parse_data(dwmac, dev);  in socfpga_dwmac_probe()
425 	dwmac->ops = ops;  in socfpga_dwmac_probe()
426 	plat_dat->bsp_priv = dwmac;  in socfpga_dwmac_probe()
440 	dwmac->stmmac_rst = stpriv->plat->stmmac_rst;  in socfpga_dwmac_probe()
442 	ret = ops->set_phy_mode(dwmac);  in socfpga_dwmac_probe()