84 	int (*set_phy_mode)(struct meson8b_dwmac *dwmac);
107 static void meson8b_dwmac_mask_bits(struct meson8b_dwmac *dwmac, u32 reg,  in meson8b_dwmac_mask_bits()  argument
112 	data = readl(dwmac->regs + reg);  in meson8b_dwmac_mask_bits()
116 	writel(data, dwmac->regs + reg);  in meson8b_dwmac_mask_bits()
119 static struct clk *meson8b_dwmac_register_clk(struct meson8b_dwmac *dwmac,  in meson8b_dwmac_register_clk()  argument
129 	snprintf(clk_name, sizeof(clk_name), "%s#%s", dev_name(dwmac->dev),  in meson8b_dwmac_register_clk()
140 	return devm_clk_register(dwmac->dev, hw);  in meson8b_dwmac_register_clk()
143 static int meson8b_init_rgmii_tx_clk(struct meson8b_dwmac *dwmac)  in meson8b_init_rgmii_tx_clk()  argument
146 	struct device *dev = dwmac->dev;  in meson8b_init_rgmii_tx_clk()
167 	clk_configs->m250_mux.reg = dwmac->regs + PRG_ETH0;  in meson8b_init_rgmii_tx_clk()
171 	clk = meson8b_dwmac_register_clk(dwmac, "m250_sel", mux_parents,  in meson8b_init_rgmii_tx_clk()
178 	clk_configs->m250_div.reg = dwmac->regs + PRG_ETH0;  in meson8b_init_rgmii_tx_clk()
184 	clk = meson8b_dwmac_register_clk(dwmac, "m250_div", &parent_data, 1,  in meson8b_init_rgmii_tx_clk()
193 	clk = meson8b_dwmac_register_clk(dwmac, "fixed_div2", &parent_data, 1,  in meson8b_init_rgmii_tx_clk()
200 	clk_configs->rgmii_tx_en.reg = dwmac->regs + PRG_ETH0;  in meson8b_init_rgmii_tx_clk()
202 	clk = meson8b_dwmac_register_clk(dwmac, "rgmii_tx_en", &parent_data, 1,  in meson8b_init_rgmii_tx_clk()
208 	dwmac->rgmii_tx_clk = clk;  in meson8b_init_rgmii_tx_clk()
213 static int meson8b_set_phy_mode(struct meson8b_dwmac *dwmac)  in meson8b_set_phy_mode()  argument
215 	switch (dwmac->phy_mode) {  in meson8b_set_phy_mode()
221 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_set_phy_mode()
227 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_set_phy_mode()
231 		dev_err(dwmac->dev, "fail to set phy-mode %s\n",  in meson8b_set_phy_mode()
232 			phy_modes(dwmac->phy_mode));  in meson8b_set_phy_mode()
239 static int meson_axg_set_phy_mode(struct meson8b_dwmac *dwmac)  in meson_axg_set_phy_mode()  argument
241 	switch (dwmac->phy_mode) {  in meson_axg_set_phy_mode()
247 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson_axg_set_phy_mode()
253 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson_axg_set_phy_mode()
258 		dev_err(dwmac->dev, "fail to set phy-mode %s\n",  in meson_axg_set_phy_mode()
259 			phy_modes(dwmac->phy_mode));  in meson_axg_set_phy_mode()
266 static int meson8b_devm_clk_prepare_enable(struct meson8b_dwmac *dwmac,  in meson8b_devm_clk_prepare_enable()  argument
275 	return devm_add_action_or_reset(dwmac->dev,  in meson8b_devm_clk_prepare_enable()
280 static int meson8b_init_rgmii_delays(struct meson8b_dwmac *dwmac)  in meson8b_init_rgmii_delays()  argument
288 				   dwmac->tx_delay_ns >> 1);  in meson8b_init_rgmii_delays()
290 	if (dwmac->data->has_prg_eth1_rgmii_rx_delay)  in meson8b_init_rgmii_delays()
292 					   dwmac->rx_delay_ps / 200);  in meson8b_init_rgmii_delays()
293 	else if (dwmac->rx_delay_ps == 2000)  in meson8b_init_rgmii_delays()
296 	switch (dwmac->phy_mode) {  in meson8b_init_rgmii_delays()
313 		dev_err(dwmac->dev, "unsupported phy-mode %s\n",  in meson8b_init_rgmii_delays()
314 			phy_modes(dwmac->phy_mode));  in meson8b_init_rgmii_delays()
319 		if (!dwmac->timing_adj_clk) {  in meson8b_init_rgmii_delays()
320 			dev_err(dwmac->dev,  in meson8b_init_rgmii_delays()
326 		ret = meson8b_devm_clk_prepare_enable(dwmac,  in meson8b_init_rgmii_delays()
327 						      dwmac->timing_adj_clk);  in meson8b_init_rgmii_delays()
329 			dev_err(dwmac->dev,  in meson8b_init_rgmii_delays()
335 	meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TXDLY_MASK |  in meson8b_init_rgmii_delays()
340 	meson8b_dwmac_mask_bits(dwmac, PRG_ETH1, PRG_ETH1_CFG_RXCLK_DLY,  in meson8b_init_rgmii_delays()
346 static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac)  in meson8b_init_prg_eth()  argument
350 	if (phy_interface_mode_is_rgmii(dwmac->phy_mode)) {  in meson8b_init_prg_eth()
352 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_init_prg_eth()
360 		ret = clk_set_rate(dwmac->rgmii_tx_clk, 125 * 1000 * 1000);  in meson8b_init_prg_eth()
362 			dev_err(dwmac->dev,  in meson8b_init_prg_eth()
367 		ret = meson8b_devm_clk_prepare_enable(dwmac,  in meson8b_init_prg_eth()
368 						      dwmac->rgmii_tx_clk);  in meson8b_init_prg_eth()
370 			dev_err(dwmac->dev,  in meson8b_init_prg_eth()
376 		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,  in meson8b_init_prg_eth()
382 	meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_TX_AND_PHY_REF_CLK,  in meson8b_init_prg_eth()
392 	struct meson8b_dwmac *dwmac;  in meson8b_dwmac_probe()  local
403 	dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);  in meson8b_dwmac_probe()
404 	if (!dwmac) {  in meson8b_dwmac_probe()
409 	dwmac->data = (const struct meson8b_dwmac_data *)  in meson8b_dwmac_probe()
411 	if (!dwmac->data) {  in meson8b_dwmac_probe()
415 	dwmac->regs = devm_platform_ioremap_resource(pdev, 1);  in meson8b_dwmac_probe()
416 	if (IS_ERR(dwmac->regs)) {  in meson8b_dwmac_probe()
417 		ret = PTR_ERR(dwmac->regs);  in meson8b_dwmac_probe()
421 	dwmac->dev = &pdev->dev;  in meson8b_dwmac_probe()
422 	ret = of_get_phy_mode(pdev->dev.of_node, &dwmac->phy_mode);  in meson8b_dwmac_probe()
430 				 &dwmac->tx_delay_ns))  in meson8b_dwmac_probe()
431 		dwmac->tx_delay_ns = 2;  in meson8b_dwmac_probe()
435 				 &dwmac->rx_delay_ps)) {  in meson8b_dwmac_probe()
438 					  &dwmac->rx_delay_ps))  in meson8b_dwmac_probe()
440 			dwmac->rx_delay_ps *= 1000;  in meson8b_dwmac_probe()
443 	if (dwmac->data->has_prg_eth1_rgmii_rx_delay) {  in meson8b_dwmac_probe()
444 		if (dwmac->rx_delay_ps > 3000 || dwmac->rx_delay_ps % 200) {  in meson8b_dwmac_probe()
445 			dev_err(dwmac->dev,  in meson8b_dwmac_probe()
451 		if (dwmac->rx_delay_ps != 0 && dwmac->rx_delay_ps != 2000) {  in meson8b_dwmac_probe()
452 			dev_err(dwmac->dev,  in meson8b_dwmac_probe()
459 	dwmac->timing_adj_clk = devm_clk_get_optional(dwmac->dev,  in meson8b_dwmac_probe()
461 	if (IS_ERR(dwmac->timing_adj_clk)) {  in meson8b_dwmac_probe()
462 		ret = PTR_ERR(dwmac->timing_adj_clk);  in meson8b_dwmac_probe()
466 	ret = meson8b_init_rgmii_delays(dwmac);  in meson8b_dwmac_probe()
470 	ret = meson8b_init_rgmii_tx_clk(dwmac);  in meson8b_dwmac_probe()
474 	ret = dwmac->data->set_phy_mode(dwmac);  in meson8b_dwmac_probe()
478 	ret = meson8b_init_prg_eth(dwmac);  in meson8b_dwmac_probe()
482 	plat_dat->bsp_priv = dwmac;  in meson8b_dwmac_probe()