Lines Matching +full:x +full:- +full:rc
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2018 Solarflare Communications Inc.
5 * Copyright 2019-2022 Xilinx Inc.
45 /* Number of bytes to offset when reading bit position x with dword accessors. */
46 #define ROUND_DOWN_TO_DWORD(x) (((x) & (~31)) >> 3) argument
48 #define EXTRACT_BITS(x, lbn, width) \ argument
49 (((x) >> ((lbn) & 31)) & ((1ull << (width)) - 1))
74 netif_dbg(efx, probe, efx->net_dev, in ef100_pci_parse_ef100_entry()
75 "Found EF100 function control window bar=%d offset=0x%llx\n", in ef100_pci_parse_ef100_entry()
78 if (result->valid) { in ef100_pci_parse_ef100_entry()
79 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_ef100_entry()
81 return -EINVAL; in ef100_pci_parse_ef100_entry()
86 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_ef100_entry()
89 return -EINVAL; in ef100_pci_parse_ef100_entry()
92 result->bar = bar; in ef100_pci_parse_ef100_entry()
93 result->offset = offset; in ef100_pci_parse_ef100_entry()
94 result->valid = true; in ef100_pci_parse_ef100_entry()
102 pci_resource_len(efx->pci_dev, bar); in ef100_pci_does_bar_overflow()
106 * sub-table.
114 int rc = 0; in ef100_pci_parse_continue_entry() local
124 previous_bar = efx->mem_bar; in ef100_pci_parse_continue_entry()
128 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
129 "Bad BAR value of %d in Xilinx capabilities sub-table.\n", in ef100_pci_parse_continue_entry()
131 return -EINVAL; in ef100_pci_parse_continue_entry()
138 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
139 "Xilinx table will overrun BAR[%d] offset=0x%llx\n", in ef100_pci_parse_continue_entry()
141 return -EINVAL; in ef100_pci_parse_continue_entry()
145 rc = efx_init_io(efx, bar, in ef100_pci_parse_continue_entry()
147 pci_resource_len(efx->pci_dev, bar)); in ef100_pci_parse_continue_entry()
148 if (rc) { in ef100_pci_parse_continue_entry()
149 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
150 "Mapping new BAR for Xilinx table failed, rc=%d\n", rc); in ef100_pci_parse_continue_entry()
151 return rc; in ef100_pci_parse_continue_entry()
155 rc = ef100_pci_walk_xilinx_table(efx, offset, result); in ef100_pci_parse_continue_entry()
156 if (rc) in ef100_pci_parse_continue_entry()
157 return rc; in ef100_pci_parse_continue_entry()
163 rc = efx_init_io(efx, previous_bar, in ef100_pci_parse_continue_entry()
165 pci_resource_len(efx->pci_dev, previous_bar)); in ef100_pci_parse_continue_entry()
166 if (rc) { in ef100_pci_parse_continue_entry()
167 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
168 "Putting old BAR back failed, rc=%d\n", rc); in ef100_pci_parse_continue_entry()
169 return rc; in ef100_pci_parse_continue_entry()
184 int rc = 0; in ef100_pci_walk_xilinx_table() local
197 netif_dbg(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
198 "Seen Xilinx table entry 0x%x size 0x%x at 0x%llx in BAR[%d]\n", in ef100_pci_walk_xilinx_table()
199 id, entry_size, current_entry, efx->mem_bar); in ef100_pci_walk_xilinx_table()
202 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
203 "Xilinx table entry too short len=0x%x\n", entry_size); in ef100_pci_walk_xilinx_table()
204 return -EINVAL; in ef100_pci_walk_xilinx_table()
211 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
214 return -EINVAL; in ef100_pci_walk_xilinx_table()
217 rc = ef100_pci_parse_ef100_entry(efx, current_entry, in ef100_pci_walk_xilinx_table()
219 if (rc) in ef100_pci_walk_xilinx_table()
220 return rc; in ef100_pci_walk_xilinx_table()
224 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
227 return -EINVAL; in ef100_pci_walk_xilinx_table()
230 rc = ef100_pci_parse_continue_entry(efx, current_entry, result); in ef100_pci_walk_xilinx_table()
231 if (rc) in ef100_pci_walk_xilinx_table()
232 return rc; in ef100_pci_walk_xilinx_table()
244 if (ef100_pci_does_bar_overflow(efx, efx->mem_bar, current_entry)) { in ef100_pci_walk_xilinx_table()
245 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
246 "Xilinx table overrun at position=0x%llx.\n", in ef100_pci_walk_xilinx_table()
248 return -EINVAL; in ef100_pci_walk_xilinx_table()
257 int rc, pos = structure_start + ROUND_DOWN_TO_DWORD(lbn); in _ef100_pci_get_config_bits_with_width() local
260 rc = pci_read_config_dword(efx->pci_dev, pos, &temp); in _ef100_pci_get_config_bits_with_width()
261 if (rc) { in _ef100_pci_get_config_bits_with_width()
262 netif_err(efx, probe, efx->net_dev, in _ef100_pci_get_config_bits_with_width()
265 return rc; in _ef100_pci_get_config_bits_with_width()
289 int rc = 0; in ef100_pci_parse_xilinx_cap() local
291 rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_BAR, &bar); in ef100_pci_parse_xilinx_cap()
292 if (rc) { in ef100_pci_parse_xilinx_cap()
293 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
294 "Failed to read ESF_GZ_VSEC_TBL_BAR, rc=%d\n", in ef100_pci_parse_xilinx_cap()
295 rc); in ef100_pci_parse_xilinx_cap()
296 return rc; in ef100_pci_parse_xilinx_cap()
301 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
302 "Bad BAR value of %d in Xilinx capabilities sub-table.\n", in ef100_pci_parse_xilinx_cap()
304 return -EINVAL; in ef100_pci_parse_xilinx_cap()
307 rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_OFF_LO, &offset_lo); in ef100_pci_parse_xilinx_cap()
308 if (rc) { in ef100_pci_parse_xilinx_cap()
309 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
310 "Failed to read ESF_GZ_VSEC_TBL_OFF_LO, rc=%d\n", in ef100_pci_parse_xilinx_cap()
311 rc); in ef100_pci_parse_xilinx_cap()
312 return rc; in ef100_pci_parse_xilinx_cap()
317 rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_OFF_HI, &offset_high); in ef100_pci_parse_xilinx_cap()
318 if (rc) { in ef100_pci_parse_xilinx_cap()
319 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
320 "Failed to read ESF_GZ_VSEC_TBL_OFF_HI, rc=%d\n", in ef100_pci_parse_xilinx_cap()
321 rc); in ef100_pci_parse_xilinx_cap()
322 return rc; in ef100_pci_parse_xilinx_cap()
329 if (offset > pci_resource_len(efx->pci_dev, bar) - sizeof(u32) * 2) { in ef100_pci_parse_xilinx_cap()
330 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
331 "Xilinx table will overrun BAR[%d] offset=0x%llx\n", in ef100_pci_parse_xilinx_cap()
333 return -EINVAL; in ef100_pci_parse_xilinx_cap()
337 rc = efx_init_io(efx, bar, in ef100_pci_parse_xilinx_cap()
339 pci_resource_len(efx->pci_dev, bar)); in ef100_pci_parse_xilinx_cap()
340 if (rc) { in ef100_pci_parse_xilinx_cap()
341 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
342 "efx_init_io failed, rc=%d\n", rc); in ef100_pci_parse_xilinx_cap()
343 return rc; in ef100_pci_parse_xilinx_cap()
346 rc = ef100_pci_walk_xilinx_table(efx, offset, result); in ef100_pci_parse_xilinx_cap()
350 return rc; in ef100_pci_parse_xilinx_cap()
362 result->valid = false; in ef100_pci_find_func_ctrl_window()
364 while ((cap = pci_find_next_ext_capability(efx->pci_dev, cap, PCI_EXT_CAP_ID_VNDR)) != 0) { in ef100_pci_find_func_ctrl_window()
369 int rc = 0; in ef100_pci_find_func_ctrl_window() local
373 rc = ef100_pci_get_config_bits(efx, vndr_cap, ID, &vsec_id); in ef100_pci_find_func_ctrl_window()
374 if (rc) { in ef100_pci_find_func_ctrl_window()
375 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
376 "Failed to read ESF_GZ_VSEC_ID, rc=%d\n", in ef100_pci_find_func_ctrl_window()
377 rc); in ef100_pci_find_func_ctrl_window()
378 return rc; in ef100_pci_find_func_ctrl_window()
381 rc = ef100_pci_get_config_bits(efx, vndr_cap, VER, &vsec_ver); in ef100_pci_find_func_ctrl_window()
382 if (rc) { in ef100_pci_find_func_ctrl_window()
383 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
384 "Failed to read ESF_GZ_VSEC_VER, rc=%d\n", in ef100_pci_find_func_ctrl_window()
385 rc); in ef100_pci_find_func_ctrl_window()
386 return rc; in ef100_pci_find_func_ctrl_window()
389 /* Get length of whole capability - i.e. starting at cap */ in ef100_pci_find_func_ctrl_window()
390 rc = ef100_pci_get_config_bits(efx, vndr_cap, LEN, &vsec_len); in ef100_pci_find_func_ctrl_window()
391 if (rc) { in ef100_pci_find_func_ctrl_window()
392 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
393 "Failed to read ESF_GZ_VSEC_LEN, rc=%d\n", in ef100_pci_find_func_ctrl_window()
394 rc); in ef100_pci_find_func_ctrl_window()
395 return rc; in ef100_pci_find_func_ctrl_window()
403 rc = ef100_pci_parse_xilinx_cap(efx, vndr_cap, in ef100_pci_find_func_ctrl_window()
405 if (rc) in ef100_pci_find_func_ctrl_window()
406 return rc; in ef100_pci_find_func_ctrl_window()
410 if (num_xilinx_caps && !result->valid) { in ef100_pci_find_func_ctrl_window()
411 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
414 return -EINVAL; in ef100_pci_find_func_ctrl_window()
456 int rc; in ef100_pci_probe() local
461 return -ENOMEM; in ef100_pci_probe()
462 probe_data->pci_dev = pci_dev; in ef100_pci_probe()
463 efx = &probe_data->efx; in ef100_pci_probe()
465 efx->type = (const struct efx_nic_type *)entry->driver_data; in ef100_pci_probe()
467 efx->pci_dev = pci_dev; in ef100_pci_probe()
469 rc = efx_init_struct(efx, pci_dev); in ef100_pci_probe()
470 if (rc) in ef100_pci_probe()
473 efx->vi_stride = EF100_DEFAULT_VI_STRIDE; in ef100_pci_probe()
476 rc = ef100_pci_find_func_ctrl_window(efx, &fcw); in ef100_pci_probe()
477 if (rc) { in ef100_pci_probe()
479 "Error looking for ef100 function control window, rc=%d\n", in ef100_pci_probe()
480 rc); in ef100_pci_probe()
485 /* Extended capability not found - use defaults. */ in ef100_pci_probe()
491 if (fcw.offset > pci_resource_len(efx->pci_dev, fcw.bar) - ESE_GZ_FCW_LEN) { in ef100_pci_probe()
493 rc = -EIO; in ef100_pci_probe()
498 rc = efx_init_io(efx, fcw.bar, in ef100_pci_probe()
500 pci_resource_len(efx->pci_dev, fcw.bar)); in ef100_pci_probe()
501 if (rc) in ef100_pci_probe()
504 efx->reg_base = fcw.offset; in ef100_pci_probe()
506 rc = efx->type->probe(efx); in ef100_pci_probe()
507 if (rc) in ef100_pci_probe()
510 efx->state = STATE_PROBED; in ef100_pci_probe()
511 rc = ef100_probe_netdev(probe_data); in ef100_pci_probe()
512 if (rc) in ef100_pci_probe()
521 return rc; in ef100_pci_probe()
528 int rc; in ef100_pci_sriov_configure() local
530 if (efx->type->sriov_configure) { in ef100_pci_sriov_configure()
531 rc = efx->type->sriov_configure(efx, num_vfs); in ef100_pci_sriov_configure()
532 if (rc) in ef100_pci_sriov_configure()
533 return rc; in ef100_pci_sriov_configure()
537 return -ENOENT; in ef100_pci_sriov_configure()