Lines Matching +full:ether +full:- +full:r8a7790
1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2019 Renesas Electronics Corporation
6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
14 #include <linux/dma-mapping.h>
68 return -ETIMEDOUT; in ravb_wait()
89 switch (priv->speed) { in ravb_set_rate_gbeth()
106 switch (priv->speed) { in ravb_set_rate_rcar()
118 u32 reserve = (unsigned long)skb->data & (RAVB_ALIGN - 1); in ravb_set_buffer_align()
121 skb_reserve(skb, RAVB_ALIGN - reserve); in ravb_set_buffer_align()
155 ravb_modify(priv->ndev, PIR, mask, set ? mask : 0); in ravb_mdio_ctrl()
182 return (ravb_read(priv->ndev, PIR) & PIR_MDI) != 0; in ravb_get_mdio_data()
194 /* Free TX skb function for AVB-IP */
198 struct net_device_stats *stats = &priv->stats[q]; in ravb_tx_free()
199 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_tx_free()
205 for (; priv->cur_tx[q] - priv->dirty_tx[q] > 0; priv->dirty_tx[q]++) { in ravb_tx_free()
208 entry = priv->dirty_tx[q] % (priv->num_tx_ring[q] * in ravb_tx_free()
210 desc = &priv->tx_ring[q][entry]; in ravb_tx_free()
211 txed = desc->die_dt == DT_FEMPTY; in ravb_tx_free()
216 size = le16_to_cpu(desc->ds_tagl) & TX_DS; in ravb_tx_free()
218 if (priv->tx_skb[q][entry / num_tx_desc]) { in ravb_tx_free()
219 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_tx_free()
222 if (entry % num_tx_desc == num_tx_desc - 1) { in ravb_tx_free()
224 dev_kfree_skb_any(priv->tx_skb[q][entry]); in ravb_tx_free()
225 priv->tx_skb[q][entry] = NULL; in ravb_tx_free()
227 stats->tx_packets++; in ravb_tx_free()
232 stats->tx_bytes += size; in ravb_tx_free()
233 desc->die_dt = DT_EEMPTY; in ravb_tx_free()
244 if (!priv->gbeth_rx_ring) in ravb_rx_ring_free_gbeth()
247 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_free_gbeth()
248 struct ravb_rx_desc *desc = &priv->gbeth_rx_ring[i]; in ravb_rx_ring_free_gbeth()
250 if (!dma_mapping_error(ndev->dev.parent, in ravb_rx_ring_free_gbeth()
251 le32_to_cpu(desc->dptr))) in ravb_rx_ring_free_gbeth()
252 dma_unmap_single(ndev->dev.parent, in ravb_rx_ring_free_gbeth()
253 le32_to_cpu(desc->dptr), in ravb_rx_ring_free_gbeth()
257 ring_size = sizeof(struct ravb_rx_desc) * (priv->num_rx_ring[q] + 1); in ravb_rx_ring_free_gbeth()
258 dma_free_coherent(ndev->dev.parent, ring_size, priv->gbeth_rx_ring, in ravb_rx_ring_free_gbeth()
259 priv->rx_desc_dma[q]); in ravb_rx_ring_free_gbeth()
260 priv->gbeth_rx_ring = NULL; in ravb_rx_ring_free_gbeth()
269 if (!priv->rx_ring[q]) in ravb_rx_ring_free_rcar()
272 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_free_rcar()
273 struct ravb_ex_rx_desc *desc = &priv->rx_ring[q][i]; in ravb_rx_ring_free_rcar()
275 if (!dma_mapping_error(ndev->dev.parent, in ravb_rx_ring_free_rcar()
276 le32_to_cpu(desc->dptr))) in ravb_rx_ring_free_rcar()
277 dma_unmap_single(ndev->dev.parent, in ravb_rx_ring_free_rcar()
278 le32_to_cpu(desc->dptr), in ravb_rx_ring_free_rcar()
283 (priv->num_rx_ring[q] + 1); in ravb_rx_ring_free_rcar()
284 dma_free_coherent(ndev->dev.parent, ring_size, priv->rx_ring[q], in ravb_rx_ring_free_rcar()
285 priv->rx_desc_dma[q]); in ravb_rx_ring_free_rcar()
286 priv->rx_ring[q] = NULL; in ravb_rx_ring_free_rcar()
293 const struct ravb_hw_info *info = priv->info; in ravb_ring_free()
294 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_ring_free()
298 info->rx_ring_free(ndev, q); in ravb_ring_free()
300 if (priv->tx_ring[q]) { in ravb_ring_free()
304 (priv->num_tx_ring[q] * num_tx_desc + 1); in ravb_ring_free()
305 dma_free_coherent(ndev->dev.parent, ring_size, priv->tx_ring[q], in ravb_ring_free()
306 priv->tx_desc_dma[q]); in ravb_ring_free()
307 priv->tx_ring[q] = NULL; in ravb_ring_free()
311 if (priv->rx_skb[q]) { in ravb_ring_free()
312 for (i = 0; i < priv->num_rx_ring[q]; i++) in ravb_ring_free()
313 dev_kfree_skb(priv->rx_skb[q][i]); in ravb_ring_free()
315 kfree(priv->rx_skb[q]); in ravb_ring_free()
316 priv->rx_skb[q] = NULL; in ravb_ring_free()
319 kfree(priv->tx_align[q]); in ravb_ring_free()
320 priv->tx_align[q] = NULL; in ravb_ring_free()
325 kfree(priv->tx_skb[q]); in ravb_ring_free()
326 priv->tx_skb[q] = NULL; in ravb_ring_free()
337 rx_ring_size = sizeof(*rx_desc) * priv->num_rx_ring[q]; in ravb_rx_ring_format_gbeth()
338 memset(priv->gbeth_rx_ring, 0, rx_ring_size); in ravb_rx_ring_format_gbeth()
340 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_format_gbeth()
342 rx_desc = &priv->gbeth_rx_ring[i]; in ravb_rx_ring_format_gbeth()
343 rx_desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); in ravb_rx_ring_format_gbeth()
344 dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, in ravb_rx_ring_format_gbeth()
350 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_ring_format_gbeth()
351 rx_desc->ds_cc = cpu_to_le16(0); in ravb_rx_ring_format_gbeth()
352 rx_desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_ring_format_gbeth()
353 rx_desc->die_dt = DT_FEMPTY; in ravb_rx_ring_format_gbeth()
355 rx_desc = &priv->gbeth_rx_ring[i]; in ravb_rx_ring_format_gbeth()
356 rx_desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]); in ravb_rx_ring_format_gbeth()
357 rx_desc->die_dt = DT_LINKFIX; /* type */ in ravb_rx_ring_format_gbeth()
364 unsigned int rx_ring_size = sizeof(*rx_desc) * priv->num_rx_ring[q]; in ravb_rx_ring_format_rcar()
368 memset(priv->rx_ring[q], 0, rx_ring_size); in ravb_rx_ring_format_rcar()
370 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_rx_ring_format_rcar()
372 rx_desc = &priv->rx_ring[q][i]; in ravb_rx_ring_format_rcar()
373 rx_desc->ds_cc = cpu_to_le16(RX_BUF_SZ); in ravb_rx_ring_format_rcar()
374 dma_addr = dma_map_single(ndev->dev.parent, priv->rx_skb[q][i]->data, in ravb_rx_ring_format_rcar()
380 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_ring_format_rcar()
381 rx_desc->ds_cc = cpu_to_le16(0); in ravb_rx_ring_format_rcar()
382 rx_desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_ring_format_rcar()
383 rx_desc->die_dt = DT_FEMPTY; in ravb_rx_ring_format_rcar()
385 rx_desc = &priv->rx_ring[q][i]; in ravb_rx_ring_format_rcar()
386 rx_desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]); in ravb_rx_ring_format_rcar()
387 rx_desc->die_dt = DT_LINKFIX; /* type */ in ravb_rx_ring_format_rcar()
394 const struct ravb_hw_info *info = priv->info; in ravb_ring_format()
395 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_ring_format()
398 unsigned int tx_ring_size = sizeof(*tx_desc) * priv->num_tx_ring[q] * in ravb_ring_format()
402 priv->cur_rx[q] = 0; in ravb_ring_format()
403 priv->cur_tx[q] = 0; in ravb_ring_format()
404 priv->dirty_rx[q] = 0; in ravb_ring_format()
405 priv->dirty_tx[q] = 0; in ravb_ring_format()
407 info->rx_ring_format(ndev, q); in ravb_ring_format()
409 memset(priv->tx_ring[q], 0, tx_ring_size); in ravb_ring_format()
411 for (i = 0, tx_desc = priv->tx_ring[q]; i < priv->num_tx_ring[q]; in ravb_ring_format()
413 tx_desc->die_dt = DT_EEMPTY; in ravb_ring_format()
416 tx_desc->die_dt = DT_EEMPTY; in ravb_ring_format()
419 tx_desc->dptr = cpu_to_le32((u32)priv->tx_desc_dma[q]); in ravb_ring_format()
420 tx_desc->die_dt = DT_LINKFIX; /* type */ in ravb_ring_format()
423 desc = &priv->desc_bat[RX_QUEUE_OFFSET + q]; in ravb_ring_format()
424 desc->die_dt = DT_LINKFIX; /* type */ in ravb_ring_format()
425 desc->dptr = cpu_to_le32((u32)priv->rx_desc_dma[q]); in ravb_ring_format()
428 desc = &priv->desc_bat[q]; in ravb_ring_format()
429 desc->die_dt = DT_LINKFIX; /* type */ in ravb_ring_format()
430 desc->dptr = cpu_to_le32((u32)priv->tx_desc_dma[q]); in ravb_ring_format()
438 ring_size = sizeof(struct ravb_rx_desc) * (priv->num_rx_ring[q] + 1); in ravb_alloc_rx_desc_gbeth()
440 priv->gbeth_rx_ring = dma_alloc_coherent(ndev->dev.parent, ring_size, in ravb_alloc_rx_desc_gbeth()
441 &priv->rx_desc_dma[q], in ravb_alloc_rx_desc_gbeth()
443 return priv->gbeth_rx_ring; in ravb_alloc_rx_desc_gbeth()
451 ring_size = sizeof(struct ravb_ex_rx_desc) * (priv->num_rx_ring[q] + 1); in ravb_alloc_rx_desc_rcar()
453 priv->rx_ring[q] = dma_alloc_coherent(ndev->dev.parent, ring_size, in ravb_alloc_rx_desc_rcar()
454 &priv->rx_desc_dma[q], in ravb_alloc_rx_desc_rcar()
456 return priv->rx_ring[q]; in ravb_alloc_rx_desc_rcar()
463 const struct ravb_hw_info *info = priv->info; in ravb_ring_init()
464 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_ring_init()
470 priv->rx_skb[q] = kcalloc(priv->num_rx_ring[q], in ravb_ring_init()
471 sizeof(*priv->rx_skb[q]), GFP_KERNEL); in ravb_ring_init()
472 priv->tx_skb[q] = kcalloc(priv->num_tx_ring[q], in ravb_ring_init()
473 sizeof(*priv->tx_skb[q]), GFP_KERNEL); in ravb_ring_init()
474 if (!priv->rx_skb[q] || !priv->tx_skb[q]) in ravb_ring_init()
477 for (i = 0; i < priv->num_rx_ring[q]; i++) { in ravb_ring_init()
478 skb = __netdev_alloc_skb(ndev, info->max_rx_len, GFP_KERNEL); in ravb_ring_init()
482 priv->rx_skb[q][i] = skb; in ravb_ring_init()
487 priv->tx_align[q] = kmalloc(DPTR_ALIGN * priv->num_tx_ring[q] + in ravb_ring_init()
488 DPTR_ALIGN - 1, GFP_KERNEL); in ravb_ring_init()
489 if (!priv->tx_align[q]) in ravb_ring_init()
494 if (!info->alloc_rx_desc(ndev, q)) in ravb_ring_init()
497 priv->dirty_rx[q] = 0; in ravb_ring_init()
501 (priv->num_tx_ring[q] * num_tx_desc + 1); in ravb_ring_init()
502 priv->tx_ring[q] = dma_alloc_coherent(ndev->dev.parent, ring_size, in ravb_ring_init()
503 &priv->tx_desc_dma[q], in ravb_ring_init()
505 if (!priv->tx_ring[q]) in ravb_ring_init()
513 return -ENOMEM; in ravb_ring_init()
524 ravb_write(ndev, ECMR_ZPF | ((priv->duplex > 0) ? ECMR_DM : 0) | in ravb_emac_init_gbeth()
532 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) | in ravb_emac_init_gbeth()
533 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR); in ravb_emac_init_gbeth()
534 ravb_write(ndev, (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR); in ravb_emac_init_gbeth()
536 /* E-MAC status register clear */ in ravb_emac_init_gbeth()
540 /* E-MAC interrupt enable register */ in ravb_emac_init_gbeth()
543 if (priv->phy_interface == PHY_INTERFACE_MODE_MII) { in ravb_emac_init_gbeth()
555 ravb_write(ndev, ndev->mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN, RFLR); in ravb_emac_init_rcar()
559 (ndev->features & NETIF_F_RXCSUM ? ECMR_RCSC : 0) | in ravb_emac_init_rcar()
566 (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) | in ravb_emac_init_rcar()
567 (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR); in ravb_emac_init_rcar()
569 (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), MALR); in ravb_emac_init_rcar()
571 /* E-MAC status register clear */ in ravb_emac_init_rcar()
574 /* E-MAC interrupt enable register */ in ravb_emac_init_rcar()
578 /* E-MAC init function */
582 const struct ravb_hw_info *info = priv->info; in ravb_emac_init()
584 info->emac_init(ndev); in ravb_emac_init()
624 const struct ravb_hw_info *info = priv->info; in ravb_dmac_init_rcar()
651 if (info->multi_irqs) { in ravb_dmac_init_rcar()
673 const struct ravb_hw_info *info = priv->info; in ravb_dmac_init()
681 error = info->dmac_init(ndev); in ravb_dmac_init()
685 /* Setting the control will start the AVB-DMAC process. */ in ravb_dmac_init()
703 while (count--) { in ravb_get_tx_tstamp()
711 list_for_each_entry_safe(ts_skb, ts_skb2, &priv->ts_skb_list, in ravb_get_tx_tstamp()
713 skb = ts_skb->skb; in ravb_get_tx_tstamp()
714 tag = ts_skb->tag; in ravb_get_tx_tstamp()
715 list_del(&ts_skb->list); in ravb_get_tx_tstamp()
736 if (unlikely(skb->len < sizeof(__sum16))) in ravb_rx_csum()
738 hw_csum = skb_tail_pointer(skb) - sizeof(__sum16); in ravb_rx_csum()
739 skb->csum = csum_unfold((__force __sum16)get_unaligned_le16(hw_csum)); in ravb_rx_csum()
740 skb->ip_summed = CHECKSUM_COMPLETE; in ravb_rx_csum()
741 skb_trim(skb, skb->len - sizeof(__sum16)); in ravb_rx_csum()
750 skb = priv->rx_skb[RAVB_BE][entry]; in ravb_get_skb_gbeth()
751 priv->rx_skb[RAVB_BE][entry] = NULL; in ravb_get_skb_gbeth()
752 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_get_skb_gbeth()
762 const struct ravb_hw_info *info = priv->info; in ravb_rx_gbeth()
774 entry = priv->cur_rx[q] % priv->num_rx_ring[q]; in ravb_rx_gbeth()
775 boguscnt = priv->dirty_rx[q] + priv->num_rx_ring[q] - priv->cur_rx[q]; in ravb_rx_gbeth()
776 stats = &priv->stats[q]; in ravb_rx_gbeth()
780 desc = &priv->gbeth_rx_ring[entry]; in ravb_rx_gbeth()
781 while (desc->die_dt != DT_FEMPTY) { in ravb_rx_gbeth()
784 desc_status = desc->msc; in ravb_rx_gbeth()
785 pkt_len = le16_to_cpu(desc->ds_cc) & RX_DS; in ravb_rx_gbeth()
787 if (--boguscnt < 0) in ravb_rx_gbeth()
790 /* We use 0-byte descriptors to mark the DMA mapping errors */ in ravb_rx_gbeth()
795 stats->multicast++; in ravb_rx_gbeth()
798 stats->rx_errors++; in ravb_rx_gbeth()
800 stats->rx_crc_errors++; in ravb_rx_gbeth()
802 stats->rx_frame_errors++; in ravb_rx_gbeth()
804 stats->rx_length_errors++; in ravb_rx_gbeth()
806 stats->rx_missed_errors++; in ravb_rx_gbeth()
808 die_dt = desc->die_dt & 0xF0; in ravb_rx_gbeth()
813 skb->protocol = eth_type_trans(skb, ndev); in ravb_rx_gbeth()
814 napi_gro_receive(&priv->napi[q], skb); in ravb_rx_gbeth()
815 stats->rx_packets++; in ravb_rx_gbeth()
816 stats->rx_bytes += pkt_len; in ravb_rx_gbeth()
819 priv->rx_1st_skb = ravb_get_skb_gbeth(ndev, entry, desc); in ravb_rx_gbeth()
820 skb_put(priv->rx_1st_skb, pkt_len); in ravb_rx_gbeth()
824 skb_copy_to_linear_data_offset(priv->rx_1st_skb, in ravb_rx_gbeth()
825 priv->rx_1st_skb->len, in ravb_rx_gbeth()
826 skb->data, in ravb_rx_gbeth()
828 skb_put(priv->rx_1st_skb, pkt_len); in ravb_rx_gbeth()
833 skb_copy_to_linear_data_offset(priv->rx_1st_skb, in ravb_rx_gbeth()
834 priv->rx_1st_skb->len, in ravb_rx_gbeth()
835 skb->data, in ravb_rx_gbeth()
837 skb_put(priv->rx_1st_skb, pkt_len); in ravb_rx_gbeth()
839 priv->rx_1st_skb->protocol = in ravb_rx_gbeth()
840 eth_type_trans(priv->rx_1st_skb, ndev); in ravb_rx_gbeth()
841 napi_gro_receive(&priv->napi[q], in ravb_rx_gbeth()
842 priv->rx_1st_skb); in ravb_rx_gbeth()
843 stats->rx_packets++; in ravb_rx_gbeth()
844 stats->rx_bytes += pkt_len; in ravb_rx_gbeth()
849 entry = (++priv->cur_rx[q]) % priv->num_rx_ring[q]; in ravb_rx_gbeth()
850 desc = &priv->gbeth_rx_ring[entry]; in ravb_rx_gbeth()
854 for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { in ravb_rx_gbeth()
855 entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; in ravb_rx_gbeth()
856 desc = &priv->gbeth_rx_ring[entry]; in ravb_rx_gbeth()
857 desc->ds_cc = cpu_to_le16(GBETH_RX_DESC_DATA_SIZE); in ravb_rx_gbeth()
859 if (!priv->rx_skb[q][entry]) { in ravb_rx_gbeth()
860 skb = netdev_alloc_skb(ndev, info->max_rx_len); in ravb_rx_gbeth()
864 dma_addr = dma_map_single(ndev->dev.parent, in ravb_rx_gbeth()
865 skb->data, in ravb_rx_gbeth()
872 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_gbeth()
873 desc->ds_cc = cpu_to_le16(0); in ravb_rx_gbeth()
874 desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_gbeth()
875 priv->rx_skb[q][entry] = skb; in ravb_rx_gbeth()
879 desc->die_dt = DT_FEMPTY; in ravb_rx_gbeth()
882 *quota -= limit - (++boguscnt); in ravb_rx_gbeth()
891 const struct ravb_hw_info *info = priv->info; in ravb_rx_rcar()
892 int entry = priv->cur_rx[q] % priv->num_rx_ring[q]; in ravb_rx_rcar()
893 int boguscnt = (priv->dirty_rx[q] + priv->num_rx_ring[q]) - in ravb_rx_rcar()
894 priv->cur_rx[q]; in ravb_rx_rcar()
895 struct net_device_stats *stats = &priv->stats[q]; in ravb_rx_rcar()
906 desc = &priv->rx_ring[q][entry]; in ravb_rx_rcar()
907 while (desc->die_dt != DT_FEMPTY) { in ravb_rx_rcar()
910 desc_status = desc->msc; in ravb_rx_rcar()
911 pkt_len = le16_to_cpu(desc->ds_cc) & RX_DS; in ravb_rx_rcar()
913 if (--boguscnt < 0) in ravb_rx_rcar()
916 /* We use 0-byte descriptors to mark the DMA mapping errors */ in ravb_rx_rcar()
921 stats->multicast++; in ravb_rx_rcar()
925 stats->rx_errors++; in ravb_rx_rcar()
927 stats->rx_crc_errors++; in ravb_rx_rcar()
929 stats->rx_frame_errors++; in ravb_rx_rcar()
931 stats->rx_length_errors++; in ravb_rx_rcar()
933 stats->rx_missed_errors++; in ravb_rx_rcar()
935 u32 get_ts = priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE; in ravb_rx_rcar()
937 skb = priv->rx_skb[q][entry]; in ravb_rx_rcar()
938 priv->rx_skb[q][entry] = NULL; in ravb_rx_rcar()
939 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_rx_rcar()
950 ts.tv_sec = ((u64) le16_to_cpu(desc->ts_sh) << in ravb_rx_rcar()
951 32) | le32_to_cpu(desc->ts_sl); in ravb_rx_rcar()
952 ts.tv_nsec = le32_to_cpu(desc->ts_n); in ravb_rx_rcar()
953 shhwtstamps->hwtstamp = timespec64_to_ktime(ts); in ravb_rx_rcar()
957 skb->protocol = eth_type_trans(skb, ndev); in ravb_rx_rcar()
958 if (ndev->features & NETIF_F_RXCSUM) in ravb_rx_rcar()
960 napi_gro_receive(&priv->napi[q], skb); in ravb_rx_rcar()
961 stats->rx_packets++; in ravb_rx_rcar()
962 stats->rx_bytes += pkt_len; in ravb_rx_rcar()
965 entry = (++priv->cur_rx[q]) % priv->num_rx_ring[q]; in ravb_rx_rcar()
966 desc = &priv->rx_ring[q][entry]; in ravb_rx_rcar()
970 for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) { in ravb_rx_rcar()
971 entry = priv->dirty_rx[q] % priv->num_rx_ring[q]; in ravb_rx_rcar()
972 desc = &priv->rx_ring[q][entry]; in ravb_rx_rcar()
973 desc->ds_cc = cpu_to_le16(RX_BUF_SZ); in ravb_rx_rcar()
975 if (!priv->rx_skb[q][entry]) { in ravb_rx_rcar()
976 skb = netdev_alloc_skb(ndev, info->max_rx_len); in ravb_rx_rcar()
980 dma_addr = dma_map_single(ndev->dev.parent, skb->data, in ravb_rx_rcar()
981 le16_to_cpu(desc->ds_cc), in ravb_rx_rcar()
987 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_rx_rcar()
988 desc->ds_cc = cpu_to_le16(0); in ravb_rx_rcar()
989 desc->dptr = cpu_to_le32(dma_addr); in ravb_rx_rcar()
990 priv->rx_skb[q][entry] = skb; in ravb_rx_rcar()
994 desc->die_dt = DT_FEMPTY; in ravb_rx_rcar()
997 *quota -= limit - (++boguscnt); in ravb_rx_rcar()
1006 const struct ravb_hw_info *info = priv->info; in ravb_rx()
1008 return info->receive(ndev, quota, q); in ravb_rx()
1027 const struct ravb_hw_info *info = priv->info; in ravb_stop_dma()
1031 error = ravb_wait(ndev, TCCR, info->tccr_mask, 0); in ravb_stop_dma()
1041 /* Stop the E-MAC's RX/TX processes. */ in ravb_stop_dma()
1049 /* Stop AVB-DMAC process */ in ravb_stop_dma()
1053 /* E-MAC interrupt handler */
1063 pm_wakeup_event(&priv->pdev->dev, 0); in ravb_emac_interrupt_unlocked()
1065 ndev->stats.tx_carrier_errors++; in ravb_emac_interrupt_unlocked()
1068 if (priv->no_avb_link) in ravb_emac_interrupt_unlocked()
1071 if (priv->avb_link_active_low) in ravb_emac_interrupt_unlocked()
1088 spin_lock(&priv->lock); in ravb_emac_interrupt()
1090 spin_unlock(&priv->lock); in ravb_emac_interrupt()
1109 priv->stats[RAVB_BE].rx_over_errors++; in ravb_error_interrupt()
1113 priv->stats[RAVB_NC].rx_over_errors++; in ravb_error_interrupt()
1117 priv->rx_fifo_errors++; in ravb_error_interrupt()
1124 const struct ravb_hw_info *info = priv->info; in ravb_queue_interrupt()
1131 if (napi_schedule_prep(&priv->napi[q])) { in ravb_queue_interrupt()
1133 if (!info->irq_en_dis) { in ravb_queue_interrupt()
1140 __napi_schedule(&priv->napi[q]); in ravb_queue_interrupt()
1170 const struct ravb_hw_info *info = priv->info; in ravb_interrupt()
1174 spin_lock(&priv->lock); in ravb_interrupt()
1187 if (info->nc_queues) { in ravb_interrupt()
1188 for (q = RAVB_NC; q >= RAVB_BE; q--) { in ravb_interrupt()
1198 /* E-MAC status summary */ in ravb_interrupt()
1216 spin_unlock(&priv->lock); in ravb_interrupt()
1228 spin_lock(&priv->lock); in ravb_multi_interrupt()
1248 spin_unlock(&priv->lock); in ravb_multi_interrupt()
1258 spin_lock(&priv->lock); in ravb_dma_interrupt()
1264 spin_unlock(&priv->lock); in ravb_dma_interrupt()
1280 struct net_device *ndev = napi->dev; in ravb_poll()
1282 const struct ravb_hw_info *info = priv->info; in ravb_poll()
1283 bool gptp = info->gptp || info->ccc_gac; in ravb_poll()
1286 int q = napi - priv->napi; in ravb_poll()
1292 entry = priv->cur_rx[q] % priv->num_rx_ring[q]; in ravb_poll()
1293 desc = &priv->gbeth_rx_ring[entry]; in ravb_poll()
1298 if (gptp || desc->die_dt != DT_FEMPTY) { in ravb_poll()
1304 spin_lock_irqsave(&priv->lock, flags); in ravb_poll()
1309 spin_unlock_irqrestore(&priv->lock, flags); in ravb_poll()
1313 /* Re-enable RX/TX interrupts */ in ravb_poll()
1314 spin_lock_irqsave(&priv->lock, flags); in ravb_poll()
1315 if (!info->irq_en_dis) { in ravb_poll()
1322 spin_unlock_irqrestore(&priv->lock, flags); in ravb_poll()
1325 priv->rx_over_errors = priv->stats[RAVB_BE].rx_over_errors; in ravb_poll()
1326 if (info->nc_queues) in ravb_poll()
1327 priv->rx_over_errors += priv->stats[RAVB_NC].rx_over_errors; in ravb_poll()
1328 if (priv->rx_over_errors != ndev->stats.rx_over_errors) in ravb_poll()
1329 ndev->stats.rx_over_errors = priv->rx_over_errors; in ravb_poll()
1330 if (priv->rx_fifo_errors != ndev->stats.rx_fifo_errors) in ravb_poll()
1331 ndev->stats.rx_fifo_errors = priv->rx_fifo_errors; in ravb_poll()
1333 return budget - quota; in ravb_poll()
1340 ravb_modify(ndev, ECMR, ECMR_DM, priv->duplex > 0 ? ECMR_DM : 0); in ravb_set_duplex_gbeth()
1347 const struct ravb_hw_info *info = priv->info; in ravb_adjust_link()
1348 struct phy_device *phydev = ndev->phydev; in ravb_adjust_link()
1352 spin_lock_irqsave(&priv->lock, flags); in ravb_adjust_link()
1354 /* Disable TX and RX right over here, if E-MAC change is ignored */ in ravb_adjust_link()
1355 if (priv->no_avb_link) in ravb_adjust_link()
1358 if (phydev->link) { in ravb_adjust_link()
1359 if (info->half_duplex && phydev->duplex != priv->duplex) { in ravb_adjust_link()
1361 priv->duplex = phydev->duplex; in ravb_adjust_link()
1365 if (phydev->speed != priv->speed) { in ravb_adjust_link()
1367 priv->speed = phydev->speed; in ravb_adjust_link()
1368 info->set_rate(ndev); in ravb_adjust_link()
1370 if (!priv->link) { in ravb_adjust_link()
1373 priv->link = phydev->link; in ravb_adjust_link()
1375 } else if (priv->link) { in ravb_adjust_link()
1377 priv->link = 0; in ravb_adjust_link()
1378 priv->speed = 0; in ravb_adjust_link()
1379 if (info->half_duplex) in ravb_adjust_link()
1380 priv->duplex = -1; in ravb_adjust_link()
1383 /* Enable TX and RX right over here, if E-MAC change is ignored */ in ravb_adjust_link()
1384 if (priv->no_avb_link && phydev->link) in ravb_adjust_link()
1387 spin_unlock_irqrestore(&priv->lock, flags); in ravb_adjust_link()
1401 struct device_node *np = ndev->dev.parent->of_node; in ravb_phy_init()
1403 const struct ravb_hw_info *info = priv->info; in ravb_phy_init()
1409 priv->link = 0; in ravb_phy_init()
1410 priv->speed = 0; in ravb_phy_init()
1411 priv->duplex = -1; in ravb_phy_init()
1414 pn = of_parse_phandle(np, "phy-handle", 0); in ravb_phy_init()
1427 iface = priv->rgmii_override ? PHY_INTERFACE_MODE_RGMII in ravb_phy_init()
1428 : priv->phy_interface; in ravb_phy_init()
1433 err = -ENOENT; in ravb_phy_init()
1437 /* This driver only support 10/100Mbit speeds on R-Car H3 ES1.0 in ravb_phy_init()
1446 if (!info->half_duplex) { in ravb_phy_init()
1459 phydev->mac_managed_pm = true; in ravb_phy_init()
1480 phy_start(ndev->phydev); in ravb_phy_start()
1489 return priv->msg_enable; in ravb_get_msglevel()
1496 priv->msg_enable = value; in ravb_set_msglevel()
1554 const struct ravb_hw_info *info = priv->info; in ravb_get_sset_count()
1558 return info->stats_len; in ravb_get_sset_count()
1560 return -EOPNOTSUPP; in ravb_get_sset_count()
1568 const struct ravb_hw_info *info = priv->info; in ravb_get_ethtool_stats()
1573 num_rx_q = info->nc_queues ? NUM_RX_QUEUE : 1; in ravb_get_ethtool_stats()
1574 /* Device-specific stats */ in ravb_get_ethtool_stats()
1576 struct net_device_stats *stats = &priv->stats[q]; in ravb_get_ethtool_stats()
1578 data[i++] = priv->cur_rx[q]; in ravb_get_ethtool_stats()
1579 data[i++] = priv->cur_tx[q]; in ravb_get_ethtool_stats()
1580 data[i++] = priv->dirty_rx[q]; in ravb_get_ethtool_stats()
1581 data[i++] = priv->dirty_tx[q]; in ravb_get_ethtool_stats()
1582 data[i++] = stats->rx_packets; in ravb_get_ethtool_stats()
1583 data[i++] = stats->tx_packets; in ravb_get_ethtool_stats()
1584 data[i++] = stats->rx_bytes; in ravb_get_ethtool_stats()
1585 data[i++] = stats->tx_bytes; in ravb_get_ethtool_stats()
1586 data[i++] = stats->multicast; in ravb_get_ethtool_stats()
1587 data[i++] = stats->rx_errors; in ravb_get_ethtool_stats()
1588 data[i++] = stats->rx_crc_errors; in ravb_get_ethtool_stats()
1589 data[i++] = stats->rx_frame_errors; in ravb_get_ethtool_stats()
1590 data[i++] = stats->rx_length_errors; in ravb_get_ethtool_stats()
1591 data[i++] = stats->rx_missed_errors; in ravb_get_ethtool_stats()
1592 data[i++] = stats->rx_over_errors; in ravb_get_ethtool_stats()
1599 const struct ravb_hw_info *info = priv->info; in ravb_get_strings()
1603 memcpy(data, info->gstrings_stats, info->gstrings_size); in ravb_get_strings()
1615 ring->rx_max_pending = BE_RX_RING_MAX; in ravb_get_ringparam()
1616 ring->tx_max_pending = BE_TX_RING_MAX; in ravb_get_ringparam()
1617 ring->rx_pending = priv->num_rx_ring[RAVB_BE]; in ravb_get_ringparam()
1618 ring->tx_pending = priv->num_tx_ring[RAVB_BE]; in ravb_get_ringparam()
1627 const struct ravb_hw_info *info = priv->info; in ravb_set_ringparam()
1630 if (ring->tx_pending > BE_TX_RING_MAX || in ravb_set_ringparam()
1631 ring->rx_pending > BE_RX_RING_MAX || in ravb_set_ringparam()
1632 ring->tx_pending < BE_TX_RING_MIN || in ravb_set_ringparam()
1633 ring->rx_pending < BE_RX_RING_MIN) in ravb_set_ringparam()
1634 return -EINVAL; in ravb_set_ringparam()
1635 if (ring->rx_mini_pending || ring->rx_jumbo_pending) in ravb_set_ringparam()
1636 return -EINVAL; in ravb_set_ringparam()
1641 if (info->gptp) in ravb_set_ringparam()
1650 synchronize_irq(ndev->irq); in ravb_set_ringparam()
1654 if (info->nc_queues) in ravb_set_ringparam()
1659 priv->num_rx_ring[RAVB_BE] = ring->rx_pending; in ravb_set_ringparam()
1660 priv->num_tx_ring[RAVB_BE] = ring->tx_pending; in ravb_set_ringparam()
1674 if (info->gptp) in ravb_set_ringparam()
1675 ravb_ptp_init(ndev, priv->pdev); in ravb_set_ringparam()
1687 const struct ravb_hw_info *hw_info = priv->info; in ravb_get_ts_info()
1689 info->so_timestamping = in ravb_get_ts_info()
1696 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); in ravb_get_ts_info()
1697 info->rx_filters = in ravb_get_ts_info()
1701 if (hw_info->gptp || hw_info->ccc_gac) in ravb_get_ts_info()
1702 info->phc_index = ptp_clock_index(priv->ptp.clock); in ravb_get_ts_info()
1711 wol->supported = WAKE_MAGIC; in ravb_get_wol()
1712 wol->wolopts = priv->wol_enabled ? WAKE_MAGIC : 0; in ravb_get_wol()
1718 const struct ravb_hw_info *info = priv->info; in ravb_set_wol()
1720 if (!info->magic_pkt || (wol->wolopts & ~WAKE_MAGIC)) in ravb_set_wol()
1721 return -EOPNOTSUPP; in ravb_set_wol()
1723 priv->wol_enabled = !!(wol->wolopts & WAKE_MAGIC); in ravb_set_wol()
1725 device_set_wakeup_enable(&priv->pdev->dev, priv->wol_enabled); in ravb_set_wol()
1754 name = devm_kasprintf(dev, GFP_KERNEL, "%s:%s", ndev->name, ch); in ravb_hook_irq()
1756 return -ENOMEM; in ravb_hook_irq()
1768 const struct ravb_hw_info *info = priv->info; in ravb_open()
1769 struct platform_device *pdev = priv->pdev; in ravb_open()
1770 struct device *dev = &pdev->dev; in ravb_open()
1773 napi_enable(&priv->napi[RAVB_BE]); in ravb_open()
1774 if (info->nc_queues) in ravb_open()
1775 napi_enable(&priv->napi[RAVB_NC]); in ravb_open()
1777 if (!info->multi_irqs) { in ravb_open()
1778 error = request_irq(ndev->irq, ravb_interrupt, IRQF_SHARED, in ravb_open()
1779 ndev->name, ndev); in ravb_open()
1785 error = ravb_hook_irq(ndev->irq, ravb_multi_interrupt, ndev, in ravb_open()
1789 error = ravb_hook_irq(priv->emac_irq, ravb_emac_interrupt, ndev, in ravb_open()
1793 error = ravb_hook_irq(priv->rx_irqs[RAVB_BE], ravb_be_interrupt, in ravb_open()
1797 error = ravb_hook_irq(priv->tx_irqs[RAVB_BE], ravb_be_interrupt, in ravb_open()
1801 error = ravb_hook_irq(priv->rx_irqs[RAVB_NC], ravb_nc_interrupt, in ravb_open()
1805 error = ravb_hook_irq(priv->tx_irqs[RAVB_NC], ravb_nc_interrupt, in ravb_open()
1810 if (info->err_mgmt_irqs) { in ravb_open()
1811 error = ravb_hook_irq(priv->erra_irq, ravb_multi_interrupt, in ravb_open()
1815 error = ravb_hook_irq(priv->mgmta_irq, ravb_multi_interrupt, in ravb_open()
1829 if (info->gptp) in ravb_open()
1830 ravb_ptp_init(ndev, priv->pdev); in ravb_open()
1843 if (info->gptp) in ravb_open()
1846 if (!info->multi_irqs) in ravb_open()
1848 if (info->err_mgmt_irqs) in ravb_open()
1849 free_irq(priv->mgmta_irq, ndev); in ravb_open()
1851 if (info->err_mgmt_irqs) in ravb_open()
1852 free_irq(priv->erra_irq, ndev); in ravb_open()
1854 free_irq(priv->tx_irqs[RAVB_NC], ndev); in ravb_open()
1856 free_irq(priv->rx_irqs[RAVB_NC], ndev); in ravb_open()
1858 free_irq(priv->tx_irqs[RAVB_BE], ndev); in ravb_open()
1860 free_irq(priv->rx_irqs[RAVB_BE], ndev); in ravb_open()
1862 free_irq(priv->emac_irq, ndev); in ravb_open()
1864 free_irq(ndev->irq, ndev); in ravb_open()
1866 if (info->nc_queues) in ravb_open()
1867 napi_disable(&priv->napi[RAVB_NC]); in ravb_open()
1868 napi_disable(&priv->napi[RAVB_BE]); in ravb_open()
1882 ndev->stats.tx_errors++; in ravb_tx_timeout()
1884 schedule_work(&priv->work); in ravb_tx_timeout()
1891 const struct ravb_hw_info *info = priv->info; in ravb_tx_timeout_work()
1892 struct net_device *ndev = priv->ndev; in ravb_tx_timeout_work()
1898 if (info->gptp) in ravb_tx_timeout_work()
1908 * re-enables the TX and RX and skip the following in ravb_tx_timeout_work()
1909 * re-initialization procedure. in ravb_tx_timeout_work()
1916 if (info->nc_queues) in ravb_tx_timeout_work()
1923 * should return here to avoid re-enabling the TX and RX in in ravb_tx_timeout_work()
1934 if (info->gptp) in ravb_tx_timeout_work()
1935 ravb_ptp_init(ndev, priv->pdev); in ravb_tx_timeout_work()
1944 const struct ravb_hw_info *info = priv->info; in ravb_start_xmit()
1945 unsigned int num_tx_desc = priv->num_tx_desc; in ravb_start_xmit()
1955 spin_lock_irqsave(&priv->lock, flags); in ravb_start_xmit()
1956 if (priv->cur_tx[q] - priv->dirty_tx[q] > (priv->num_tx_ring[q] - 1) * in ravb_start_xmit()
1961 spin_unlock_irqrestore(&priv->lock, flags); in ravb_start_xmit()
1968 entry = priv->cur_tx[q] % (priv->num_tx_ring[q] * num_tx_desc); in ravb_start_xmit()
1969 priv->tx_skb[q][entry / num_tx_desc] = skb; in ravb_start_xmit()
1972 buffer = PTR_ALIGN(priv->tx_align[q], DPTR_ALIGN) + in ravb_start_xmit()
1974 len = PTR_ALIGN(skb->data, DPTR_ALIGN) - skb->data; in ravb_start_xmit()
1985 * length of the second DMA descriptor (skb->len - len) in ravb_start_xmit()
1991 memcpy(buffer, skb->data, len); in ravb_start_xmit()
1992 dma_addr = dma_map_single(ndev->dev.parent, buffer, len, in ravb_start_xmit()
1994 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_start_xmit()
1997 desc = &priv->tx_ring[q][entry]; in ravb_start_xmit()
1998 desc->ds_tagl = cpu_to_le16(len); in ravb_start_xmit()
1999 desc->dptr = cpu_to_le32(dma_addr); in ravb_start_xmit()
2001 buffer = skb->data + len; in ravb_start_xmit()
2002 len = skb->len - len; in ravb_start_xmit()
2003 dma_addr = dma_map_single(ndev->dev.parent, buffer, len, in ravb_start_xmit()
2005 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_start_xmit()
2010 desc = &priv->tx_ring[q][entry]; in ravb_start_xmit()
2011 len = skb->len; in ravb_start_xmit()
2012 dma_addr = dma_map_single(ndev->dev.parent, skb->data, skb->len, in ravb_start_xmit()
2014 if (dma_mapping_error(ndev->dev.parent, dma_addr)) in ravb_start_xmit()
2017 desc->ds_tagl = cpu_to_le16(len); in ravb_start_xmit()
2018 desc->dptr = cpu_to_le32(dma_addr); in ravb_start_xmit()
2021 if (info->gptp || info->ccc_gac) { in ravb_start_xmit()
2026 desc--; in ravb_start_xmit()
2027 dma_unmap_single(ndev->dev.parent, dma_addr, in ravb_start_xmit()
2032 ts_skb->skb = skb_get(skb); in ravb_start_xmit()
2033 ts_skb->tag = priv->ts_skb_tag++; in ravb_start_xmit()
2034 priv->ts_skb_tag &= 0x3ff; in ravb_start_xmit()
2035 list_add_tail(&ts_skb->list, &priv->ts_skb_list); in ravb_start_xmit()
2038 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in ravb_start_xmit()
2039 desc->tagh_tsr = (ts_skb->tag >> 4) | TX_TSR; in ravb_start_xmit()
2040 desc->ds_tagl |= cpu_to_le16(ts_skb->tag << 12); in ravb_start_xmit()
2048 desc->die_dt = DT_FEND; in ravb_start_xmit()
2049 desc--; in ravb_start_xmit()
2050 desc->die_dt = DT_FSTART; in ravb_start_xmit()
2052 desc->die_dt = DT_FSINGLE; in ravb_start_xmit()
2056 priv->cur_tx[q] += num_tx_desc; in ravb_start_xmit()
2057 if (priv->cur_tx[q] - priv->dirty_tx[q] > in ravb_start_xmit()
2058 (priv->num_tx_ring[q] - 1) * num_tx_desc && in ravb_start_xmit()
2063 spin_unlock_irqrestore(&priv->lock, flags); in ravb_start_xmit()
2067 dma_unmap_single(ndev->dev.parent, le32_to_cpu(desc->dptr), in ravb_start_xmit()
2068 le16_to_cpu(desc->ds_tagl), DMA_TO_DEVICE); in ravb_start_xmit()
2071 priv->tx_skb[q][entry / num_tx_desc] = NULL; in ravb_start_xmit()
2079 return (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) ? RAVB_NC : in ravb_select_queue()
2087 const struct ravb_hw_info *info = priv->info; in ravb_get_stats()
2090 nstats = &ndev->stats; in ravb_get_stats()
2091 stats0 = &priv->stats[RAVB_BE]; in ravb_get_stats()
2093 if (info->tx_counters) { in ravb_get_stats()
2094 nstats->tx_dropped += ravb_read(ndev, TROCR); in ravb_get_stats()
2098 if (info->carrier_counters) { in ravb_get_stats()
2099 nstats->collisions += ravb_read(ndev, CXR41); in ravb_get_stats()
2101 nstats->tx_carrier_errors += ravb_read(ndev, CXR42); in ravb_get_stats()
2105 nstats->rx_packets = stats0->rx_packets; in ravb_get_stats()
2106 nstats->tx_packets = stats0->tx_packets; in ravb_get_stats()
2107 nstats->rx_bytes = stats0->rx_bytes; in ravb_get_stats()
2108 nstats->tx_bytes = stats0->tx_bytes; in ravb_get_stats()
2109 nstats->multicast = stats0->multicast; in ravb_get_stats()
2110 nstats->rx_errors = stats0->rx_errors; in ravb_get_stats()
2111 nstats->rx_crc_errors = stats0->rx_crc_errors; in ravb_get_stats()
2112 nstats->rx_frame_errors = stats0->rx_frame_errors; in ravb_get_stats()
2113 nstats->rx_length_errors = stats0->rx_length_errors; in ravb_get_stats()
2114 nstats->rx_missed_errors = stats0->rx_missed_errors; in ravb_get_stats()
2115 nstats->rx_over_errors = stats0->rx_over_errors; in ravb_get_stats()
2116 if (info->nc_queues) { in ravb_get_stats()
2117 stats1 = &priv->stats[RAVB_NC]; in ravb_get_stats()
2119 nstats->rx_packets += stats1->rx_packets; in ravb_get_stats()
2120 nstats->tx_packets += stats1->tx_packets; in ravb_get_stats()
2121 nstats->rx_bytes += stats1->rx_bytes; in ravb_get_stats()
2122 nstats->tx_bytes += stats1->tx_bytes; in ravb_get_stats()
2123 nstats->multicast += stats1->multicast; in ravb_get_stats()
2124 nstats->rx_errors += stats1->rx_errors; in ravb_get_stats()
2125 nstats->rx_crc_errors += stats1->rx_crc_errors; in ravb_get_stats()
2126 nstats->rx_frame_errors += stats1->rx_frame_errors; in ravb_get_stats()
2127 nstats->rx_length_errors += stats1->rx_length_errors; in ravb_get_stats()
2128 nstats->rx_missed_errors += stats1->rx_missed_errors; in ravb_get_stats()
2129 nstats->rx_over_errors += stats1->rx_over_errors; in ravb_get_stats()
2141 spin_lock_irqsave(&priv->lock, flags); in ravb_set_rx_mode()
2143 ndev->flags & IFF_PROMISC ? ECMR_PRM : 0); in ravb_set_rx_mode()
2144 spin_unlock_irqrestore(&priv->lock, flags); in ravb_set_rx_mode()
2150 struct device_node *np = ndev->dev.parent->of_node; in ravb_close()
2152 const struct ravb_hw_info *info = priv->info; in ravb_close()
2163 if (info->gptp) in ravb_close()
2166 /* Set the config mode to stop the AVB-DMAC's processes */ in ravb_close()
2172 if (info->gptp || info->ccc_gac) { in ravb_close()
2173 list_for_each_entry_safe(ts_skb, ts_skb2, &priv->ts_skb_list, list) { in ravb_close()
2174 list_del(&ts_skb->list); in ravb_close()
2175 kfree_skb(ts_skb->skb); in ravb_close()
2181 if (ndev->phydev) { in ravb_close()
2182 phy_stop(ndev->phydev); in ravb_close()
2183 phy_disconnect(ndev->phydev); in ravb_close()
2188 if (info->multi_irqs) { in ravb_close()
2189 free_irq(priv->tx_irqs[RAVB_NC], ndev); in ravb_close()
2190 free_irq(priv->rx_irqs[RAVB_NC], ndev); in ravb_close()
2191 free_irq(priv->tx_irqs[RAVB_BE], ndev); in ravb_close()
2192 free_irq(priv->rx_irqs[RAVB_BE], ndev); in ravb_close()
2193 free_irq(priv->emac_irq, ndev); in ravb_close()
2194 if (info->err_mgmt_irqs) { in ravb_close()
2195 free_irq(priv->erra_irq, ndev); in ravb_close()
2196 free_irq(priv->mgmta_irq, ndev); in ravb_close()
2199 free_irq(ndev->irq, ndev); in ravb_close()
2201 if (info->nc_queues) in ravb_close()
2202 napi_disable(&priv->napi[RAVB_NC]); in ravb_close()
2203 napi_disable(&priv->napi[RAVB_BE]); in ravb_close()
2207 if (info->nc_queues) in ravb_close()
2219 config.tx_type = priv->tstamp_tx_ctrl ? HWTSTAMP_TX_ON : in ravb_hwtstamp_get()
2221 switch (priv->tstamp_rx_ctrl & RAVB_RXTSTAMP_TYPE) { in ravb_hwtstamp_get()
2232 return copy_to_user(req->ifr_data, &config, sizeof(config)) ? in ravb_hwtstamp_get()
2233 -EFAULT : 0; in ravb_hwtstamp_get()
2244 if (copy_from_user(&config, req->ifr_data, sizeof(config))) in ravb_hwtstamp_set()
2245 return -EFAULT; in ravb_hwtstamp_set()
2255 return -ERANGE; in ravb_hwtstamp_set()
2270 priv->tstamp_tx_ctrl = tstamp_tx_ctrl; in ravb_hwtstamp_set()
2271 priv->tstamp_rx_ctrl = tstamp_rx_ctrl; in ravb_hwtstamp_set()
2273 return copy_to_user(req->ifr_data, &config, sizeof(config)) ? in ravb_hwtstamp_set()
2274 -EFAULT : 0; in ravb_hwtstamp_set()
2280 struct phy_device *phydev = ndev->phydev; in ravb_do_ioctl()
2283 return -EINVAL; in ravb_do_ioctl()
2286 return -ENODEV; in ravb_do_ioctl()
2302 ndev->mtu = new_mtu; in ravb_change_mtu()
2305 synchronize_irq(priv->emac_irq); in ravb_change_mtu()
2319 spin_lock_irqsave(&priv->lock, flags); in ravb_set_rx_csum()
2330 spin_unlock_irqrestore(&priv->lock, flags); in ravb_set_rx_csum()
2343 netdev_features_t changed = ndev->features ^ features; in ravb_set_features_rcar()
2348 ndev->features = features; in ravb_set_features_rcar()
2357 const struct ravb_hw_info *info = priv->info; in ravb_set_features()
2359 return info->set_feature(ndev, features); in ravb_set_features()
2380 struct platform_device *pdev = priv->pdev; in ravb_mdio_init()
2381 struct device *dev = &pdev->dev; in ravb_mdio_init()
2385 priv->mdiobb.ops = &bb_ops; in ravb_mdio_init()
2388 priv->mii_bus = alloc_mdio_bitbang(&priv->mdiobb); in ravb_mdio_init()
2389 if (!priv->mii_bus) in ravb_mdio_init()
2390 return -ENOMEM; in ravb_mdio_init()
2393 priv->mii_bus->name = "ravb_mii"; in ravb_mdio_init()
2394 priv->mii_bus->parent = dev; in ravb_mdio_init()
2395 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in ravb_mdio_init()
2396 pdev->name, pdev->id); in ravb_mdio_init()
2399 error = of_mdiobus_register(priv->mii_bus, dev->of_node); in ravb_mdio_init()
2406 free_mdio_bitbang(priv->mii_bus); in ravb_mdio_init()
2414 mdiobus_unregister(priv->mii_bus); in ravb_mdio_release()
2417 free_mdio_bitbang(priv->mii_bus); in ravb_mdio_release()
2436 .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
2462 .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
2485 .max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
2518 { .compatible = "renesas,etheravb-r8a7790", .data = &ravb_gen2_hw_info },
2519 { .compatible = "renesas,etheravb-r8a7794", .data = &ravb_gen2_hw_info },
2520 { .compatible = "renesas,etheravb-rcar-gen2", .data = &ravb_gen2_hw_info },
2521 { .compatible = "renesas,etheravb-r8a7795", .data = &ravb_gen3_hw_info },
2522 { .compatible = "renesas,etheravb-rcar-gen3", .data = &ravb_gen3_hw_info },
2523 { .compatible = "renesas,etheravb-rcar-gen4", .data = &ravb_gen3_hw_info },
2524 { .compatible = "renesas,etheravb-rzv2m", .data = &ravb_rzv2m_hw_info },
2525 { .compatible = "renesas,rzg2l-gbeth", .data = &gbeth_hw_info },
2533 const struct ravb_hw_info *info = priv->info; in ravb_set_gti()
2534 struct device *dev = ndev->dev.parent; in ravb_set_gti()
2538 if (info->gptp_ref_clk) in ravb_set_gti()
2539 rate = clk_get_rate(priv->gptp_clk); in ravb_set_gti()
2541 rate = clk_get_rate(priv->clk); in ravb_set_gti()
2543 return -EINVAL; in ravb_set_gti()
2548 dev_err(dev, "gti.tiv increment 0x%llx is outside the range 0x%x - 0x%x\n", in ravb_set_gti()
2550 return -EINVAL; in ravb_set_gti()
2561 const struct ravb_hw_info *info = priv->info; in ravb_set_config_mode()
2563 if (info->gptp) { in ravb_set_config_mode()
2567 } else if (info->ccc_gac) { in ravb_set_config_mode()
2582 if (!of_property_read_u32(np, "rx-internal-delay-ps", &delay)) { in ravb_parse_delay_mode()
2584 priv->rxcidm = !!delay; in ravb_parse_delay_mode()
2587 if (!of_property_read_u32(np, "tx-internal-delay-ps", &delay)) { in ravb_parse_delay_mode()
2589 priv->txcidm = !!delay; in ravb_parse_delay_mode()
2596 /* Fall back to legacy rgmii-*id behavior */ in ravb_parse_delay_mode()
2597 if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in ravb_parse_delay_mode()
2598 priv->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) { in ravb_parse_delay_mode()
2599 priv->rxcidm = 1; in ravb_parse_delay_mode()
2600 priv->rgmii_override = 1; in ravb_parse_delay_mode()
2603 if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in ravb_parse_delay_mode()
2604 priv->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) { in ravb_parse_delay_mode()
2605 priv->txcidm = 1; in ravb_parse_delay_mode()
2606 priv->rgmii_override = 1; in ravb_parse_delay_mode()
2615 if (priv->rxcidm) in ravb_set_delay_mode()
2617 if (priv->txcidm) in ravb_set_delay_mode()
2624 struct device_node *np = pdev->dev.of_node; in ravb_probe()
2634 dev_err(&pdev->dev, in ravb_probe()
2636 return -EINVAL; in ravb_probe()
2639 rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); in ravb_probe()
2641 return dev_err_probe(&pdev->dev, PTR_ERR(rstc), in ravb_probe()
2647 return -ENOMEM; in ravb_probe()
2649 info = of_device_get_match_data(&pdev->dev); in ravb_probe()
2651 ndev->features = info->net_features; in ravb_probe()
2652 ndev->hw_features = info->net_hw_features; in ravb_probe()
2655 pm_runtime_enable(&pdev->dev); in ravb_probe()
2656 pm_runtime_get_sync(&pdev->dev); in ravb_probe()
2658 if (info->multi_irqs) { in ravb_probe()
2659 if (info->err_mgmt_irqs) in ravb_probe()
2670 ndev->irq = irq; in ravb_probe()
2672 SET_NETDEV_DEV(ndev, &pdev->dev); in ravb_probe()
2675 priv->info = info; in ravb_probe()
2676 priv->rstc = rstc; in ravb_probe()
2677 priv->ndev = ndev; in ravb_probe()
2678 priv->pdev = pdev; in ravb_probe()
2679 priv->num_tx_ring[RAVB_BE] = BE_TX_RING_SIZE; in ravb_probe()
2680 priv->num_rx_ring[RAVB_BE] = BE_RX_RING_SIZE; in ravb_probe()
2681 if (info->nc_queues) { in ravb_probe()
2682 priv->num_tx_ring[RAVB_NC] = NC_TX_RING_SIZE; in ravb_probe()
2683 priv->num_rx_ring[RAVB_NC] = NC_RX_RING_SIZE; in ravb_probe()
2686 priv->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in ravb_probe()
2687 if (IS_ERR(priv->addr)) { in ravb_probe()
2688 error = PTR_ERR(priv->addr); in ravb_probe()
2692 /* The Ether-specific entries in the device structure. */ in ravb_probe()
2693 ndev->base_addr = res->start; in ravb_probe()
2695 spin_lock_init(&priv->lock); in ravb_probe()
2696 INIT_WORK(&priv->work, ravb_tx_timeout_work); in ravb_probe()
2698 error = of_get_phy_mode(np, &priv->phy_interface); in ravb_probe()
2699 if (error && error != -ENODEV) in ravb_probe()
2702 priv->no_avb_link = of_property_read_bool(np, "renesas,no-ether-link"); in ravb_probe()
2703 priv->avb_link_active_low = in ravb_probe()
2704 of_property_read_bool(np, "renesas,ether-link-active-low"); in ravb_probe()
2706 if (info->multi_irqs) { in ravb_probe()
2707 if (info->err_mgmt_irqs) in ravb_probe()
2715 priv->emac_irq = irq; in ravb_probe()
2722 priv->rx_irqs[i] = irq; in ravb_probe()
2730 priv->tx_irqs[i] = irq; in ravb_probe()
2733 if (info->err_mgmt_irqs) { in ravb_probe()
2739 priv->erra_irq = irq; in ravb_probe()
2746 priv->mgmta_irq = irq; in ravb_probe()
2750 priv->clk = devm_clk_get(&pdev->dev, NULL); in ravb_probe()
2751 if (IS_ERR(priv->clk)) { in ravb_probe()
2752 error = PTR_ERR(priv->clk); in ravb_probe()
2756 priv->refclk = devm_clk_get_optional(&pdev->dev, "refclk"); in ravb_probe()
2757 if (IS_ERR(priv->refclk)) { in ravb_probe()
2758 error = PTR_ERR(priv->refclk); in ravb_probe()
2761 clk_prepare_enable(priv->refclk); in ravb_probe()
2763 if (info->gptp_ref_clk) { in ravb_probe()
2764 priv->gptp_clk = devm_clk_get(&pdev->dev, "gptp"); in ravb_probe()
2765 if (IS_ERR(priv->gptp_clk)) { in ravb_probe()
2766 error = PTR_ERR(priv->gptp_clk); in ravb_probe()
2769 clk_prepare_enable(priv->gptp_clk); in ravb_probe()
2772 ndev->max_mtu = info->rx_max_buf_size - (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); in ravb_probe()
2773 ndev->min_mtu = ETH_MIN_MTU; in ravb_probe()
2775 /* FIXME: R-Car Gen2 has 4byte alignment restriction for tx buffer in ravb_probe()
2780 priv->num_tx_desc = info->aligned_tx ? 2 : 1; in ravb_probe()
2783 ndev->netdev_ops = &ravb_netdev_ops; in ravb_probe()
2784 ndev->ethtool_ops = &ravb_ethtool_ops; in ravb_probe()
2789 if (info->gptp || info->ccc_gac) { in ravb_probe()
2799 if (info->internal_delay) { in ravb_probe()
2805 priv->desc_bat_size = sizeof(struct ravb_desc) * DBAT_ENTRY_NUM; in ravb_probe()
2806 priv->desc_bat = dma_alloc_coherent(ndev->dev.parent, priv->desc_bat_size, in ravb_probe()
2807 &priv->desc_bat_dma, GFP_KERNEL); in ravb_probe()
2808 if (!priv->desc_bat) { in ravb_probe()
2809 dev_err(&pdev->dev, in ravb_probe()
2811 priv->desc_bat_size); in ravb_probe()
2812 error = -ENOMEM; in ravb_probe()
2816 priv->desc_bat[q].die_dt = DT_EOS; in ravb_probe()
2817 ravb_write(ndev, priv->desc_bat_dma, DBAT); in ravb_probe()
2820 INIT_LIST_HEAD(&priv->ts_skb_list); in ravb_probe()
2823 if (info->ccc_gac) in ravb_probe()
2827 priv->msg_enable = RAVB_DEF_MSG_ENABLE; in ravb_probe()
2831 if (!is_valid_ether_addr(ndev->dev_addr)) { in ravb_probe()
2832 dev_warn(&pdev->dev, in ravb_probe()
2840 dev_err(&pdev->dev, "failed to initialize MDIO\n"); in ravb_probe()
2844 netif_napi_add(ndev, &priv->napi[RAVB_BE], ravb_poll); in ravb_probe()
2845 if (info->nc_queues) in ravb_probe()
2846 netif_napi_add(ndev, &priv->napi[RAVB_NC], ravb_poll); in ravb_probe()
2853 device_set_wakeup_capable(&pdev->dev, 1); in ravb_probe()
2857 (u32)ndev->base_addr, ndev->dev_addr, ndev->irq); in ravb_probe()
2864 if (info->nc_queues) in ravb_probe()
2865 netif_napi_del(&priv->napi[RAVB_NC]); in ravb_probe()
2867 netif_napi_del(&priv->napi[RAVB_BE]); in ravb_probe()
2870 dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat, in ravb_probe()
2871 priv->desc_bat_dma); in ravb_probe()
2874 if (info->ccc_gac) in ravb_probe()
2877 clk_disable_unprepare(priv->gptp_clk); in ravb_probe()
2879 clk_disable_unprepare(priv->refclk); in ravb_probe()
2883 pm_runtime_put(&pdev->dev); in ravb_probe()
2884 pm_runtime_disable(&pdev->dev); in ravb_probe()
2893 const struct ravb_hw_info *info = priv->info; in ravb_remove()
2896 if (info->ccc_gac) in ravb_remove()
2899 clk_disable_unprepare(priv->gptp_clk); in ravb_remove()
2900 clk_disable_unprepare(priv->refclk); in ravb_remove()
2902 dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat, in ravb_remove()
2903 priv->desc_bat_dma); in ravb_remove()
2906 pm_runtime_put_sync(&pdev->dev); in ravb_remove()
2908 if (info->nc_queues) in ravb_remove()
2909 netif_napi_del(&priv->napi[RAVB_NC]); in ravb_remove()
2910 netif_napi_del(&priv->napi[RAVB_BE]); in ravb_remove()
2912 pm_runtime_disable(&pdev->dev); in ravb_remove()
2913 reset_control_assert(priv->rstc); in ravb_remove()
2923 const struct ravb_hw_info *info = priv->info; in ravb_wol_setup()
2931 synchronize_irq(priv->emac_irq); in ravb_wol_setup()
2932 if (info->nc_queues) in ravb_wol_setup()
2933 napi_disable(&priv->napi[RAVB_NC]); in ravb_wol_setup()
2934 napi_disable(&priv->napi[RAVB_BE]); in ravb_wol_setup()
2940 return enable_irq_wake(priv->emac_irq); in ravb_wol_setup()
2946 const struct ravb_hw_info *info = priv->info; in ravb_wol_restore()
2948 if (info->nc_queues) in ravb_wol_restore()
2949 napi_enable(&priv->napi[RAVB_NC]); in ravb_wol_restore()
2950 napi_enable(&priv->napi[RAVB_BE]); in ravb_wol_restore()
2957 return disable_irq_wake(priv->emac_irq); in ravb_wol_restore()
2971 if (priv->wol_enabled) in ravb_suspend()
2983 const struct ravb_hw_info *info = priv->info; in ravb_resume()
2987 if (priv->wol_enabled) in ravb_resume()
2998 if (info->gptp || info->ccc_gac) { in ravb_resume()
3008 if (info->internal_delay) in ravb_resume()
3012 ravb_write(ndev, priv->desc_bat_dma, DBAT); in ravb_resume()
3015 if (priv->wol_enabled) { in ravb_resume()
3032 /* Runtime PM callback shared between ->runtime_suspend() in ravb_runtime_nop()
3033 * and ->runtime_resume(). Simply returns success. in ravb_runtime_nop()
3035 * This driver re-initializes all registers after in ravb_runtime_nop()