Lines Matching refs:RTL_R32
82 #define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg)) macro
761 return RTL_R32(tp, ERIAR) & ERIAR_FLAG; in DECLARE_RTL_COND()
793 RTL_R32(tp, ERIDR) : ~0; in _rtl_eri_read()
825 return RTL_R32(tp, GPHY_OCP) & OCPAR_FLAG; in DECLARE_RTL_COND()
846 (RTL_R32(tp, GPHY_OCP) & 0xffff) : -ETIMEDOUT; in r8168_phy_ocp_read()
864 return RTL_R32(tp, OCPDR); in r8168_mac_ocp_read()
936 return RTL_R32(tp, PHYAR) & 0x80000000; in DECLARE_RTL_COND()
958 RTL_R32(tp, PHYAR) & 0xffff : -ETIMEDOUT; in r8169_mdio_read()
971 return RTL_R32(tp, OCPAR) & OCPAR_FLAG; in DECLARE_RTL_COND()
978 RTL_W32(tp, 0xd0, RTL_R32(tp, 0xd0) & ~R8168DP_1_MDIO_ACCESS_BIT); in r8168dp_2_mdio_start()
983 RTL_W32(tp, 0xd0, RTL_R32(tp, 0xd0) | R8168DP_1_MDIO_ACCESS_BIT); in r8168dp_2_mdio_stop()
1043 return RTL_R32(tp, EPHYAR) & EPHYAR_FLAG; in DECLARE_RTL_COND()
1061 RTL_R32(tp, EPHYAR) & EPHYAR_DATA_MASK : ~0; in rtl_ephy_read()
1068 RTL_R32(tp, OCPDR) : ~0; in r8168dp_ocp_read()
1227 return RTL_R32(tp, EFUSEAR) & EFUSEAR_FLAG; in DECLARE_RTL_COND()
1235 RTL_R32(tp, EFUSEAR) & EFUSEAR_DATA_MASK : ~0; in rtl8168d_efuse_read()
1241 return RTL_R32(tp, IntrStatus_8125); in rtl_get_events()
1442 u32 rx_config = RTL_R32(tp, RxConfig); in rtl_set_rx_config_features()
1538 return RTL_R32(tp, CounterAddrLow) & (CounterReset | CounterDump); in DECLARE_RTL_COND()
2216 RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | in rtl_wol_enable_rx()
2402 RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~RX_CONFIG_ACCEPT_MASK); in rtl_rx_close()
2412 return RTL_R32(tp, TxConfig) & TXCFG_EMPTY; in DECLARE_RTL_COND()
2448 RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~RXDV_GATED_EN); in rtl_disable_rxdvgate()
2453 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | RXDV_GATED_EN); in rtl_enable_rxdvgate()
2540 tmp = RTL_R32(tp, RxConfig); in rtl_set_rx_mode()
2546 return RTL_R32(tp, CSIAR) & CSIAR_FLAG; in DECLARE_RTL_COND()
2568 RTL_R32(tp, CSIDR) : ~0; in rtl_csi_read()
2862 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | TXPLA_RST); in rtl_hw_start_8168e_1()
2863 RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~TXPLA_RST); in rtl_hw_start_8168e_1()
2897 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN); in rtl_hw_start_8168e_2()
2920 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN); in rtl_hw_start_8168f()
3432 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8105e_1()
3435 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) & ~0x010000); in rtl_hw_start_8105e_1()
3461 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8402()
3484 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8106()
3486 RTL_W32(tp, MISC, (RTL_R32(tp, MISC) | DISABLE_LAN_EN) & ~EARLY_TALLY_EN); in rtl_hw_start_8106()
5194 xid = (RTL_R32(tp, TxConfig) >> 20) & 0xfcf; in rtl_init_one()