Lines Matching +full:ecam +full:- +full:based
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
26 #include <linux/dma-mapping.h>
37 #define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
38 #define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
39 #define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
40 #define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
41 #define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
42 #define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
43 #define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
44 #define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
45 #define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
46 #define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
47 #define FIRMWARE_8411_2 "rtl_nic/rtl8411-2.fw"
48 #define FIRMWARE_8106E_1 "rtl_nic/rtl8106e-1.fw"
49 #define FIRMWARE_8106E_2 "rtl_nic/rtl8106e-2.fw"
50 #define FIRMWARE_8168G_2 "rtl_nic/rtl8168g-2.fw"
51 #define FIRMWARE_8168G_3 "rtl_nic/rtl8168g-3.fw"
52 #define FIRMWARE_8168H_2 "rtl_nic/rtl8168h-2.fw"
53 #define FIRMWARE_8168FP_3 "rtl_nic/rtl8168fp-3.fw"
54 #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
55 #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
56 #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
58 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
59 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
66 #define R8169_RX_BUF_SIZE (SZ_16K - 1)
77 #define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
78 #define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
79 #define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
80 #define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
81 #define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
82 #define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg))
84 #define JUMBO_4K (4 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
85 #define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
86 #define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
87 #define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
99 /* PCI-E devices. */
186 #define TXCFG_AUTO_FIFO (1 << 7) /* 8111e-vl */
187 #define TXCFG_EMPTY (1 << 11) /* 8111e-vl */
391 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
410 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
599 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
600 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
632 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
658 return &tp->pci_dev->dev; in tp_to_dev()
679 return tp->mac_version >= RTL_GIGA_MAC_VER_61; in rtl_is_8125()
684 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_is_8168evl_up()
685 tp->mac_version != RTL_GIGA_MAC_VER_39 && in rtl_is_8168evl_up()
686 tp->mac_version <= RTL_GIGA_MAC_VER_53; in rtl_is_8168evl_up()
691 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_supports_eee()
692 tp->mac_version != RTL_GIGA_MAC_VER_37 && in rtl_supports_eee()
693 tp->mac_version != RTL_GIGA_MAC_VER_39; in rtl_supports_eee()
715 if (c->check(tp) == high) in rtl_loop_wait()
721 netdev_err(tp->dev, "%s == %d (loop: %d, delay: %lu).\n", in rtl_loop_wait()
722 c->msg, !high, n, usecs); in rtl_loop_wait()
752 /* based on RTL8168FP_OOBMAC_BASE in vendor driver */ in r8168fp_adjust_ocp_cmd()
754 (tp->mac_version == RTL_GIGA_MAC_VER_52 || in r8168fp_adjust_ocp_cmd()
755 tp->mac_version == RTL_GIGA_MAC_VER_53)) in r8168fp_adjust_ocp_cmd()
846 (RTL_R32(tp, GPHY_OCP) & 0xffff) : -ETIMEDOUT; in r8168_phy_ocp_read()
876 * PHY MCU interrupts before PHY power-down.
880 switch (tp->mac_version) { in rtl8168g_phy_suspend_quirk()
895 tp->ocp_base = value ? value << 4 : OCP_STD_PHY_BASE; in r8168g_mdio_write()
899 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_write()
900 reg -= 0x10; in r8168g_mdio_write()
902 if (tp->ocp_base == OCP_STD_PHY_BASE && reg == MII_BMCR) in r8168g_mdio_write()
905 r8168_phy_ocp_write(tp, tp->ocp_base + reg * 2, value); in r8168g_mdio_write()
911 return tp->ocp_base == OCP_STD_PHY_BASE ? 0 : tp->ocp_base >> 4; in r8168g_mdio_read()
913 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_read()
914 reg -= 0x10; in r8168g_mdio_read()
916 return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2); in r8168g_mdio_read()
922 tp->ocp_base = value << 4; in mac_mcu_write()
926 r8168_mac_ocp_write(tp, tp->ocp_base + reg, value); in mac_mcu_write()
931 return r8168_mac_ocp_read(tp, tp->ocp_base + reg); in mac_mcu_read()
958 RTL_R32(tp, PHYAR) & 0xffff : -ETIMEDOUT; in r8169_mdio_read()
1014 switch (tp->mac_version) { in rtl_writephy()
1030 switch (tp->mac_version) { in rtl_readphy()
1104 return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10; in rtl8168_get_ocp_reg()
1149 if (tp->dash_type == RTL_DASH_DP) in rtl8168_driver_start()
1171 if (tp->dash_type == RTL_DASH_DP) in rtl8168_driver_stop()
1191 switch (tp->mac_version) { in rtl_check_dash()
1204 switch (tp->mac_version) { in rtl_set_d3_pll_down()
1265 RTL_W32(tp, IntrMask_8125, tp->irq_mask); in rtl_irq_enable()
1267 RTL_W16(tp, IntrMask, tp->irq_mask); in rtl_irq_enable()
1279 struct phy_device *phydev = tp->phydev; in rtl_link_chg_patch()
1281 if (tp->mac_version == RTL_GIGA_MAC_VER_34 || in rtl_link_chg_patch()
1282 tp->mac_version == RTL_GIGA_MAC_VER_38) { in rtl_link_chg_patch()
1283 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1286 } else if (phydev->speed == SPEED_100) { in rtl_link_chg_patch()
1294 } else if (tp->mac_version == RTL_GIGA_MAC_VER_35 || in rtl_link_chg_patch()
1295 tp->mac_version == RTL_GIGA_MAC_VER_36) { in rtl_link_chg_patch()
1296 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1303 } else if (tp->mac_version == RTL_GIGA_MAC_VER_37) { in rtl_link_chg_patch()
1304 if (phydev->speed == SPEED_10) { in rtl_link_chg_patch()
1319 wol->supported = WAKE_ANY; in rtl8169_get_wol()
1320 wol->wolopts = tp->saved_wolopts; in rtl8169_get_wol()
1343 tmp--; in __rtl8169_set_wol()
1349 tmp--; in __rtl8169_set_wol()
1363 switch (tp->mac_version) { in __rtl8169_set_wol()
1386 if (tp->dash_type == RTL_DASH_NONE) { in __rtl8169_set_wol()
1388 tp->dev->wol_enabled = wolopts ? 1 : 0; in __rtl8169_set_wol()
1396 if (wol->wolopts & ~WAKE_ANY) in rtl8169_set_wol()
1397 return -EINVAL; in rtl8169_set_wol()
1399 tp->saved_wolopts = wol->wolopts; in rtl8169_set_wol()
1400 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_set_wol()
1409 struct rtl_fw *rtl_fw = tp->rtl_fw; in rtl8169_get_drvinfo()
1411 strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); in rtl8169_get_drvinfo()
1412 strscpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info)); in rtl8169_get_drvinfo()
1413 BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version)); in rtl8169_get_drvinfo()
1415 strscpy(info->fw_version, rtl_fw->version, in rtl8169_get_drvinfo()
1416 sizeof(info->fw_version)); in rtl8169_get_drvinfo()
1429 if (dev->mtu > TD_MSS_MAX) in rtl8169_fix_features()
1432 if (dev->mtu > ETH_DATA_LEN && in rtl8169_fix_features()
1433 tp->mac_version > RTL_GIGA_MAC_VER_06) in rtl8169_fix_features()
1467 tp->cp_cmd |= RxChkSum; in rtl8169_set_features()
1469 tp->cp_cmd &= ~RxChkSum; in rtl8169_set_features()
1473 tp->cp_cmd |= RxVlan; in rtl8169_set_features()
1475 tp->cp_cmd &= ~RxVlan; in rtl8169_set_features()
1478 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl8169_set_features()
1492 u32 opts2 = le32_to_cpu(desc->opts2); in rtl8169_rx_vlan_tag()
1502 u32 __iomem *data = tp->mmio_addr; in rtl8169_get_regs()
1532 return -EOPNOTSUPP; in rtl8169_get_sset_count()
1543 u32 cmd = lower_32_bits(tp->counters_phys_addr); in rtl8169_do_counters()
1545 RTL_W32(tp, CounterAddrHigh, upper_32_bits(tp->counters_phys_addr)); in rtl8169_do_counters()
1559 * is disabled. If 0xff chip may be in a PCI power-save state. in rtl8169_update_counters()
1567 struct rtl8169_counters *counters = tp->counters; in rtl8169_init_counter_offsets()
1584 if (tp->tc_offset.inited) in rtl8169_init_counter_offsets()
1587 if (tp->mac_version >= RTL_GIGA_MAC_VER_19) { in rtl8169_init_counter_offsets()
1591 tp->tc_offset.tx_errors = counters->tx_errors; in rtl8169_init_counter_offsets()
1592 tp->tc_offset.tx_multi_collision = counters->tx_multi_collision; in rtl8169_init_counter_offsets()
1593 tp->tc_offset.tx_aborted = counters->tx_aborted; in rtl8169_init_counter_offsets()
1594 tp->tc_offset.rx_missed = counters->rx_missed; in rtl8169_init_counter_offsets()
1597 tp->tc_offset.inited = true; in rtl8169_init_counter_offsets()
1606 counters = tp->counters; in rtl8169_get_ethtool_stats()
1609 data[0] = le64_to_cpu(counters->tx_packets); in rtl8169_get_ethtool_stats()
1610 data[1] = le64_to_cpu(counters->rx_packets); in rtl8169_get_ethtool_stats()
1611 data[2] = le64_to_cpu(counters->tx_errors); in rtl8169_get_ethtool_stats()
1612 data[3] = le32_to_cpu(counters->rx_errors); in rtl8169_get_ethtool_stats()
1613 data[4] = le16_to_cpu(counters->rx_missed); in rtl8169_get_ethtool_stats()
1614 data[5] = le16_to_cpu(counters->align_errors); in rtl8169_get_ethtool_stats()
1615 data[6] = le32_to_cpu(counters->tx_one_collision); in rtl8169_get_ethtool_stats()
1616 data[7] = le32_to_cpu(counters->tx_multi_collision); in rtl8169_get_ethtool_stats()
1617 data[8] = le64_to_cpu(counters->rx_unicast); in rtl8169_get_ethtool_stats()
1618 data[9] = le64_to_cpu(counters->rx_broadcast); in rtl8169_get_ethtool_stats()
1619 data[10] = le32_to_cpu(counters->rx_multicast); in rtl8169_get_ethtool_stats()
1620 data[11] = le16_to_cpu(counters->tx_aborted); in rtl8169_get_ethtool_stats()
1621 data[12] = le16_to_cpu(counters->tx_underun); in rtl8169_get_ethtool_stats()
1636 * > 1 - the availability of the IntrMitigate (0xe2) register through the
1641 * > 2 - the Tx timer unit at gigabit speed
1691 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_coalesce_info()
1697 if (tp->phydev->speed == SPEED_UNKNOWN) in rtl_coalesce_info()
1700 for (; ci->speed; ci++) { in rtl_coalesce_info()
1701 if (tp->phydev->speed == ci->speed) in rtl_coalesce_info()
1705 return ERR_PTR(-ELNRNG); in rtl_coalesce_info()
1719 return -EOPNOTSUPP; in rtl_get_coalesce()
1728 scale = ci->scale_nsecs[tp->cp_cmd & INTT_MASK]; in rtl_get_coalesce()
1733 ec->tx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
1737 ec->tx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
1740 ec->rx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
1743 ec->rx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
1760 if (usec <= ci->scale_nsecs[i] * RTL_COALESCE_T_MAX / 1000U) { in rtl_coalesce_choose_scale()
1762 return ci->scale_nsecs[i]; in rtl_coalesce_choose_scale()
1766 return -ERANGE; in rtl_coalesce_choose_scale()
1775 u32 tx_fr = ec->tx_max_coalesced_frames; in rtl_set_coalesce()
1776 u32 rx_fr = ec->rx_max_coalesced_frames; in rtl_set_coalesce()
1782 return -EOPNOTSUPP; in rtl_set_coalesce()
1785 return -ERANGE; in rtl_set_coalesce()
1787 coal_usec_max = max(ec->rx_coalesce_usecs, ec->tx_coalesce_usecs); in rtl_set_coalesce()
1795 * - both rx_usecs=0 & rx_frames=0 in hardware (no delay on RX) in rtl_set_coalesce()
1796 * - rtl_get_coalesce returns rx_usecs=0, rx_frames=1 in rtl_set_coalesce()
1797 * - then user does `ethtool -C eth0 rx-usecs 100` in rtl_set_coalesce()
1808 if ((tx_fr && !ec->tx_coalesce_usecs) || in rtl_set_coalesce()
1809 (rx_fr && !ec->rx_coalesce_usecs)) in rtl_set_coalesce()
1810 return -EINVAL; in rtl_set_coalesce()
1815 units = DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
1817 units = DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
1822 /* Meaning of PktCntrDisable bit changed from RTL8168e-vl */ in rtl_set_coalesce()
1826 tp->cp_cmd |= PktCntrDisable; in rtl_set_coalesce()
1828 tp->cp_cmd &= ~PktCntrDisable; in rtl_set_coalesce()
1831 tp->cp_cmd = (tp->cp_cmd & ~INTT_MASK) | cp01; in rtl_set_coalesce()
1832 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_set_coalesce()
1843 return -EOPNOTSUPP; in rtl8169_get_eee()
1845 return phy_ethtool_get_eee(tp->phydev, data); in rtl8169_get_eee()
1854 return -EOPNOTSUPP; in rtl8169_set_eee()
1856 ret = phy_ethtool_set_eee(tp->phydev, data); in rtl8169_set_eee()
1859 tp->eee_adv = phy_read_mmd(dev->phydev, MDIO_MMD_AN, in rtl8169_set_eee()
1869 data->rx_max_pending = NUM_RX_DESC; in rtl8169_get_ringparam()
1870 data->rx_pending = NUM_RX_DESC; in rtl8169_get_ringparam()
1871 data->tx_max_pending = NUM_TX_DESC; in rtl8169_get_ringparam()
1872 data->tx_pending = NUM_TX_DESC; in rtl8169_get_ringparam()
1881 phy_get_pause(tp->phydev, &tx_pause, &rx_pause); in rtl8169_get_pauseparam()
1883 data->autoneg = tp->phydev->autoneg; in rtl8169_get_pauseparam()
1884 data->tx_pause = tx_pause ? 1 : 0; in rtl8169_get_pauseparam()
1885 data->rx_pause = rx_pause ? 1 : 0; in rtl8169_get_pauseparam()
1893 if (dev->mtu > ETH_DATA_LEN) in rtl8169_set_pauseparam()
1894 return -EOPNOTSUPP; in rtl8169_set_pauseparam()
1896 phy_set_asym_pause(tp->phydev, data->rx_pause, data->tx_pause); in rtl8169_set_pauseparam()
1928 struct phy_device *phydev = tp->phydev; in rtl_enable_eee()
1932 if (tp->eee_adv >= 0) in rtl_enable_eee()
1933 adv = tp->eee_adv; in rtl_enable_eee()
2056 /* Catch-all */ in rtl8169_get_mac_version()
2062 while ((xid & p->mask) != p->val) in rtl8169_get_mac_version()
2064 ver = p->ver; in rtl8169_get_mac_version()
2078 if (tp->rtl_fw) { in rtl_release_firmware()
2079 rtl_fw_release_firmware(tp->rtl_fw); in rtl_release_firmware()
2080 kfree(tp->rtl_fw); in rtl_release_firmware()
2081 tp->rtl_fw = NULL; in rtl_release_firmware()
2090 if (tp->rtl_fw) { in r8169_apply_firmware()
2091 rtl_fw_write_firmware(tp, tp->rtl_fw); in r8169_apply_firmware()
2092 /* At least one firmware doesn't reset tp->ocp_base. */ in r8169_apply_firmware()
2093 tp->ocp_base = OCP_STD_PHY_BASE; in r8169_apply_firmware()
2096 phy_read_poll_timeout(tp->phydev, MII_BMCR, val, in r8169_apply_firmware()
2105 if (tp->mac_version != RTL_GIGA_MAC_VER_38) in rtl8168_config_eee_mac()
2119 RTL_W16(tp, EEE_TXIDLE_TIMER_8125, tp->dev->mtu + ETH_HLEN + 0x20); in rtl8125_set_eee_txidle_timer()
2154 set_bit(flag, tp->wk.flags); in rtl_schedule_task()
2155 schedule_work(&tp->wk.work); in rtl_schedule_task()
2160 r8169_hw_phy_config(tp, tp->phydev, tp->mac_version); in rtl8169_init_phy()
2162 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { in rtl8169_init_phy()
2163 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); in rtl8169_init_phy()
2164 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl8169_init_phy()
2169 if (tp->mac_version == RTL_GIGA_MAC_VER_05 && in rtl8169_init_phy()
2170 tp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_GIGABYTE && in rtl8169_init_phy()
2171 tp->pci_dev->subsystem_device == 0xe000) in rtl8169_init_phy()
2172 phy_write_paged(tp->phydev, 0x0001, 0x10, 0xf01b); in rtl8169_init_phy()
2175 phy_speed_up(tp->phydev); in rtl8169_init_phy()
2180 genphy_soft_reset(tp->phydev); in rtl8169_init_phy()
2193 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl_rar_set()
2208 rtl_rar_set(tp, dev->dev_addr); in rtl_set_mac_address()
2215 if (tp->mac_version >= RTL_GIGA_MAC_VER_25) in rtl_wol_enable_rx()
2222 if (tp->dash_type != RTL_DASH_NONE) in rtl_prepare_power_down()
2225 if (tp->mac_version == RTL_GIGA_MAC_VER_32 || in rtl_prepare_power_down()
2226 tp->mac_version == RTL_GIGA_MAC_VER_33) in rtl_prepare_power_down()
2230 phy_speed_down(tp->phydev, false); in rtl_prepare_power_down()
2237 switch (tp->mac_version) { in rtl_init_rxcfg()
2261 tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0; in rtl8169_init_ring_indexes()
2312 bool jumbo = tp->dev->mtu > ETH_DATA_LEN; in rtl_jumbo_config()
2316 switch (tp->mac_version) { in rtl_jumbo_config()
2350 if (pci_is_pcie(tp->pci_dev) && tp->supports_gmii) in rtl_jumbo_config()
2351 pcie_set_readrq(tp->pci_dev, readrq); in rtl_jumbo_config()
2356 tp->phydev->advertising); in rtl_jumbo_config()
2358 tp->phydev->advertising); in rtl_jumbo_config()
2359 phy_start_aneg(tp->phydev); in rtl_jumbo_config()
2380 if (tp->rtl_fw || !tp->fw_name) in rtl_request_firmware()
2387 rtl_fw->phy_write = rtl_writephy; in rtl_request_firmware()
2388 rtl_fw->phy_read = rtl_readphy; in rtl_request_firmware()
2389 rtl_fw->mac_mcu_write = mac_mcu_write; in rtl_request_firmware()
2390 rtl_fw->mac_mcu_read = mac_mcu_read; in rtl_request_firmware()
2391 rtl_fw->fw_name = tp->fw_name; in rtl_request_firmware()
2392 rtl_fw->dev = tp_to_dev(tp); in rtl_request_firmware()
2397 tp->rtl_fw = rtl_fw; in rtl_request_firmware()
2428 switch (tp->mac_version) { in rtl_wait_txrx_fifo_empty()
2482 RTL_W32(tp, TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2483 RTL_W32(tp, TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2484 RTL_W32(tp, RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2485 RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2492 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl8169_set_magic_reg()
2494 else if (tp->mac_version == RTL_GIGA_MAC_VER_06) in rtl8169_set_magic_reg()
2513 if (dev->flags & IFF_PROMISC) { in rtl_set_rx_mode()
2516 dev->flags & IFF_ALLMULTI || in rtl_set_rx_mode()
2517 tp->mac_version == RTL_GIGA_MAC_VER_35) { in rtl_set_rx_mode()
2530 if (tp->mac_version > RTL_GIGA_MAC_VER_06) { in rtl_set_rx_mode()
2551 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_write()
2562 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_read()
2573 struct pci_dev *pdev = tp->pci_dev; in rtl_set_aspm_entry_latency()
2577 * controls the L0s/L1 entrance latency. We try standard ECAM access in rtl_set_aspm_entry_latency()
2582 if (pdev->cfg_size > 0x070f && in rtl_set_aspm_entry_latency()
2586 netdev_notice_once(tp->dev, in rtl_set_aspm_entry_latency()
2609 while (len-- > 0) { in __rtl_ephy_init()
2610 w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits; in __rtl_ephy_init()
2611 rtl_ephy_write(tp, e->offset, w); in __rtl_ephy_init()
2620 pcie_capability_clear_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_disable_clock_request()
2626 pcie_capability_set_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_enable_clock_request()
2646 switch (tp->mac_version) { in rtl_enable_exit_l1()
2663 switch (tp->mac_version) { in rtl_disable_exit_l1()
2678 if (enable && tp->aspm_manageable) { in rtl_hw_aspm_clkreq_enable()
2682 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
2694 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
3040 /* The following Realtek-provided magic fixes an issue with the RX unit in rtl_hw_start_8411_2()
3041 * getting confused after the PHY having been powered-down. in rtl_hw_start_8411_2()
3222 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8168h_1()
3337 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8117()
3490 /* L0 7us, L1 32us - needed to avoid issues with link-up detection */ in rtl_hw_start_8106()
3530 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3535 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3560 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3660 if (hw_configs[tp->mac_version]) in rtl_hw_config()
3661 hw_configs[tp->mac_version](tp); in rtl_hw_config()
3692 tp->cp_cmd |= PCIMulRW; in rtl_hw_start_8169()
3694 if (tp->mac_version == RTL_GIGA_MAC_VER_02 || in rtl_hw_start_8169()
3695 tp->mac_version == RTL_GIGA_MAC_VER_03) in rtl_hw_start_8169()
3696 tp->cp_cmd |= EnAnaPLL; in rtl_hw_start_8169()
3698 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8169()
3710 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start()
3712 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_hw_start()
3726 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ in rtl_hw_start()
3732 rtl_set_rx_config_features(tp, tp->dev->features); in rtl_hw_start()
3733 rtl_set_rx_mode(tp->dev); in rtl_hw_start()
3741 dev->mtu = new_mtu; in rtl8169_change_mtu()
3745 switch (tp->mac_version) { in rtl8169_change_mtu()
3759 u32 eor = le32_to_cpu(desc->opts1) & RingEnd; in rtl8169_mark_to_asic()
3761 desc->opts2 = 0; in rtl8169_mark_to_asic()
3764 WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | R8169_RX_BUF_SIZE)); in rtl8169_mark_to_asic()
3781 netdev_err(tp->dev, "Failed to map RX DMA!\n"); in rtl8169_alloc_rx_data()
3786 desc->addr = cpu_to_le64(mapping); in rtl8169_alloc_rx_data()
3796 for (i = 0; i < NUM_RX_DESC && tp->Rx_databuff[i]; i++) { in rtl8169_rx_clear()
3798 le64_to_cpu(tp->RxDescArray[i].addr), in rtl8169_rx_clear()
3800 __free_pages(tp->Rx_databuff[i], get_order(R8169_RX_BUF_SIZE)); in rtl8169_rx_clear()
3801 tp->Rx_databuff[i] = NULL; in rtl8169_rx_clear()
3802 tp->RxDescArray[i].addr = 0; in rtl8169_rx_clear()
3803 tp->RxDescArray[i].opts1 = 0; in rtl8169_rx_clear()
3814 data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i); in rtl8169_rx_fill()
3817 return -ENOMEM; in rtl8169_rx_fill()
3819 tp->Rx_databuff[i] = data; in rtl8169_rx_fill()
3823 tp->RxDescArray[NUM_RX_DESC - 1].opts1 |= cpu_to_le32(RingEnd); in rtl8169_rx_fill()
3832 memset(tp->tx_skb, 0, sizeof(tp->tx_skb)); in rtl8169_init_ring()
3833 memset(tp->Rx_databuff, 0, sizeof(tp->Rx_databuff)); in rtl8169_init_ring()
3840 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_unmap_tx_skb()
3841 struct TxDesc *desc = tp->TxDescArray + entry; in rtl8169_unmap_tx_skb()
3843 dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), tx_skb->len, in rtl8169_unmap_tx_skb()
3856 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_tx_clear_range()
3857 unsigned int len = tx_skb->len; in rtl8169_tx_clear_range()
3860 struct sk_buff *skb = tx_skb->skb; in rtl8169_tx_clear_range()
3871 rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC); in rtl8169_tx_clear()
3872 netdev_reset_queue(tp->dev); in rtl8169_tx_clear()
3877 napi_disable(&tp->napi); in rtl8169_cleanup()
3887 if (going_down && tp->dev->wol_enabled) in rtl8169_cleanup()
3890 switch (tp->mac_version) { in rtl8169_cleanup()
3919 netif_stop_queue(tp->dev); in rtl_reset_work()
3924 rtl8169_mark_to_asic(tp->RxDescArray + i); in rtl_reset_work()
3926 napi_enable(&tp->napi); in rtl_reset_work()
3940 struct TxDesc *txd = tp->TxDescArray + entry; in rtl8169_tx_map()
3950 netdev_err(tp->dev, "Failed to map TX data!\n"); in rtl8169_tx_map()
3954 txd->addr = cpu_to_le64(mapping); in rtl8169_tx_map()
3955 txd->opts2 = cpu_to_le32(opts[1]); in rtl8169_tx_map()
3958 if (entry == NUM_TX_DESC - 1) in rtl8169_tx_map()
3962 txd->opts1 = cpu_to_le32(opts1); in rtl8169_tx_map()
3964 tp->tx_skb[entry].len = len; in rtl8169_tx_map()
3975 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { in rtl8169_xmit_frags()
3976 const skb_frag_t *frag = info->frags + cur_frag; in rtl8169_xmit_frags()
3989 rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag); in rtl8169_xmit_frags()
3990 return -EIO; in rtl8169_xmit_frags()
4002 return ih && ih->protocol == IPPROTO_UDP; in rtl_skb_is_udp()
4005 return i6h && i6h->nexthdr == IPPROTO_UDP; in rtl_skb_is_udp()
4017 unsigned int padto = 0, len = skb->len; in rtl8125_quirk_udp_padto()
4021 unsigned int trans_data_len = skb_tail_pointer(skb) - in rtl8125_quirk_udp_padto()
4026 u16 dest = ntohs(udp_hdr(skb)->dest); in rtl8125_quirk_udp_padto()
4030 padto = len + RTL_MIN_PATCH_LEN - trans_data_len; in rtl8125_quirk_udp_padto()
4035 len + sizeof(struct udphdr) - trans_data_len); in rtl8125_quirk_udp_padto()
4048 switch (tp->mac_version) { in rtl_quirk_packet_padto()
4063 u32 mss = skb_shinfo(skb)->gso_size; in rtl8169_tso_csum_v1()
4068 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v1()
4071 if (ip->protocol == IPPROTO_TCP) in rtl8169_tso_csum_v1()
4073 else if (ip->protocol == IPPROTO_UDP) in rtl8169_tso_csum_v1()
4084 u32 mss = shinfo->gso_size; in rtl8169_tso_csum_v2()
4087 if (shinfo->gso_type & SKB_GSO_TCPV4) { in rtl8169_tso_csum_v2()
4089 } else if (shinfo->gso_type & SKB_GSO_TCPV6) { in rtl8169_tso_csum_v2()
4101 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v2()
4107 ip_protocol = ip_hdr(skb)->protocol; in rtl8169_tso_csum_v2()
4112 ip_protocol = ipv6_hdr(skb)->nexthdr; in rtl8169_tso_csum_v2()
4140 unsigned int slots_avail = READ_ONCE(tp->dirty_tx) + NUM_TX_DESC in rtl_tx_slots_avail()
4141 - READ_ONCE(tp->cur_tx); in rtl_tx_slots_avail()
4150 switch (tp->mac_version) { in rtl_chip_supports_csum_v2()
4170 unsigned int frags = skb_shinfo(skb)->nr_frags; in rtl8169_start_xmit()
4172 unsigned int entry = tp->cur_tx % NUM_TX_DESC; in rtl8169_start_xmit()
4191 if (unlikely(rtl8169_tx_map(tp, opts, skb_headlen(skb), skb->data, in rtl8169_start_xmit()
4195 txd_first = tp->TxDescArray + entry; in rtl8169_start_xmit()
4203 txd_last = tp->TxDescArray + entry; in rtl8169_start_xmit()
4204 txd_last->opts1 |= cpu_to_le32(LastFrag); in rtl8169_start_xmit()
4205 tp->tx_skb[entry].skb = skb; in rtl8169_start_xmit()
4212 door_bell = __netdev_sent_queue(dev, skb->len, netdev_xmit_more()); in rtl8169_start_xmit()
4214 txd_first->opts1 |= cpu_to_le32(DescOwn | FirstFrag); in rtl8169_start_xmit()
4216 /* rtl_tx needs to see descriptor changes before updated tp->cur_tx */ in rtl8169_start_xmit()
4219 WRITE_ONCE(tp->cur_tx, tp->cur_tx + frags + 1); in rtl8169_start_xmit()
4223 /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must in rtl8169_start_xmit()
4229 * - publish queue status and cur_tx ring index (write barrier) in rtl8169_start_xmit()
4230 * - refresh dirty_tx ring index (read barrier). in rtl8169_start_xmit()
4250 dev->stats.tx_dropped++; in rtl8169_start_xmit()
4255 dev->stats.tx_dropped++; in rtl8169_start_xmit()
4262 unsigned int nr_frags = info->nr_frags; in rtl_last_frag_len()
4267 return skb_frag_size(info->frags + nr_frags - 1); in rtl_last_frag_len()
4280 else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4 && in rtl8168evl_fix_tso()
4297 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl8169_features_check()
4303 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_features_check()
4305 if (skb->len < ETH_ZLEN) in rtl8169_features_check()
4322 struct pci_dev *pdev = tp->pci_dev; in rtl8169_pcierr_interrupt()
4343 dirty_tx = tp->dirty_tx; in rtl_tx()
4345 while (READ_ONCE(tp->cur_tx) != dirty_tx) { in rtl_tx()
4349 status = le32_to_cpu(tp->TxDescArray[entry].opts1); in rtl_tx()
4353 skb = tp->tx_skb[entry].skb; in rtl_tx()
4358 bytes_compl += skb->len; in rtl_tx()
4364 if (tp->dirty_tx != dirty_tx) { in rtl_tx()
4369 * - publish dirty_tx ring index (write barrier) in rtl_tx()
4370 * - refresh cur_tx ring index and queue status (read barrier) in rtl_tx()
4375 smp_store_mb(tp->dirty_tx, dirty_tx); in rtl_tx()
4382 * it is slow enough). -- FR in rtl_tx()
4386 if (tp->cur_tx != dirty_tx && skb) in rtl_tx()
4401 skb->ip_summed = CHECKSUM_UNNECESSARY; in rtl8169_rx_csum()
4411 for (count = 0; count < budget; count++, tp->cur_rx++) { in rtl_rx()
4412 unsigned int pkt_size, entry = tp->cur_rx % NUM_RX_DESC; in rtl_rx()
4413 struct RxDesc *desc = tp->RxDescArray + entry; in rtl_rx()
4419 status = le32_to_cpu(desc->opts1); in rtl_rx()
4433 dev->stats.rx_errors++; in rtl_rx()
4435 dev->stats.rx_length_errors++; in rtl_rx()
4437 dev->stats.rx_crc_errors++; in rtl_rx()
4439 if (!(dev->features & NETIF_F_RXALL)) in rtl_rx()
4446 if (likely(!(dev->features & NETIF_F_RXFCS))) in rtl_rx()
4447 pkt_size -= ETH_FCS_LEN; in rtl_rx()
4450 * They are seen as a symptom of over-mtu sized frames. in rtl_rx()
4453 dev->stats.rx_dropped++; in rtl_rx()
4454 dev->stats.rx_length_errors++; in rtl_rx()
4458 skb = napi_alloc_skb(&tp->napi, pkt_size); in rtl_rx()
4460 dev->stats.rx_dropped++; in rtl_rx()
4464 addr = le64_to_cpu(desc->addr); in rtl_rx()
4465 rx_buf = page_address(tp->Rx_databuff[entry]); in rtl_rx()
4470 skb->tail += pkt_size; in rtl_rx()
4471 skb->len = pkt_size; in rtl_rx()
4475 skb->protocol = eth_type_trans(skb, dev); in rtl_rx()
4479 if (skb->pkt_type == PACKET_MULTICAST) in rtl_rx()
4480 dev->stats.multicast++; in rtl_rx()
4482 napi_gro_receive(&tp->napi, skb); in rtl_rx()
4497 if ((status & 0xffff) == 0xffff || !(status & tp->irq_mask)) in rtl8169_interrupt()
4501 rtl8169_pcierr_interrupt(tp->dev); in rtl8169_interrupt()
4506 phy_mac_interrupt(tp->phydev); in rtl8169_interrupt()
4509 tp->mac_version == RTL_GIGA_MAC_VER_11)) { in rtl8169_interrupt()
4510 netif_stop_queue(tp->dev); in rtl8169_interrupt()
4514 if (napi_schedule_prep(&tp->napi)) { in rtl8169_interrupt()
4516 __napi_schedule(&tp->napi); in rtl8169_interrupt()
4531 if (!netif_running(tp->dev) || in rtl_task()
4532 !test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags)) in rtl_task()
4535 if (test_and_clear_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags)) { in rtl_task()
4537 netif_wake_queue(tp->dev); in rtl_task()
4546 struct net_device *dev = tp->dev; in rtl8169_poll()
4565 pm_request_resume(&tp->pci_dev->dev); in r8169_phylink_handler()
4567 pm_runtime_idle(&tp->pci_dev->dev); in r8169_phylink_handler()
4570 phy_print_status(tp->phydev); in r8169_phylink_handler()
4575 struct phy_device *phydev = tp->phydev; in r8169_phy_connect()
4579 phy_mode = tp->supports_gmii ? PHY_INTERFACE_MODE_GMII : in r8169_phy_connect()
4582 ret = phy_connect_direct(tp->dev, phydev, r8169_phylink_handler, in r8169_phy_connect()
4587 if (!tp->supports_gmii) in r8169_phy_connect()
4598 bitmap_zero(tp->wk.flags, RTL_FLAG_MAX); in rtl8169_down()
4600 phy_stop(tp->phydev); in rtl8169_down()
4604 pci_clear_master(tp->pci_dev); in rtl8169_down()
4614 pci_set_master(tp->pci_dev); in rtl8169_up()
4615 phy_init_hw(tp->phydev); in rtl8169_up()
4616 phy_resume(tp->phydev); in rtl8169_up()
4618 napi_enable(&tp->napi); in rtl8169_up()
4619 set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags); in rtl8169_up()
4622 phy_start(tp->phydev); in rtl8169_up()
4628 struct pci_dev *pdev = tp->pci_dev; in rtl8169_close()
4630 pm_runtime_get_sync(&pdev->dev); in rtl8169_close()
4636 cancel_work_sync(&tp->wk.work); in rtl8169_close()
4638 free_irq(tp->irq, tp); in rtl8169_close()
4640 phy_disconnect(tp->phydev); in rtl8169_close()
4642 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl8169_close()
4643 tp->RxPhyAddr); in rtl8169_close()
4644 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl8169_close()
4645 tp->TxPhyAddr); in rtl8169_close()
4646 tp->TxDescArray = NULL; in rtl8169_close()
4647 tp->RxDescArray = NULL; in rtl8169_close()
4649 pm_runtime_put_sync(&pdev->dev); in rtl8169_close()
4659 rtl8169_interrupt(tp->irq, tp); in rtl8169_netpoll()
4666 struct pci_dev *pdev = tp->pci_dev; in rtl_open()
4668 int retval = -ENOMEM; in rtl_open()
4670 pm_runtime_get_sync(&pdev->dev); in rtl_open()
4676 tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES, in rtl_open()
4677 &tp->TxPhyAddr, GFP_KERNEL); in rtl_open()
4678 if (!tp->TxDescArray) in rtl_open()
4681 tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES, in rtl_open()
4682 &tp->RxPhyAddr, GFP_KERNEL); in rtl_open()
4683 if (!tp->RxDescArray) in rtl_open()
4693 retval = request_irq(tp->irq, rtl8169_interrupt, irqflags, dev->name, tp); in rtl_open()
4705 pm_runtime_put_sync(&pdev->dev); in rtl_open()
4710 free_irq(tp->irq, tp); in rtl_open()
4715 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl_open()
4716 tp->RxPhyAddr); in rtl_open()
4717 tp->RxDescArray = NULL; in rtl_open()
4719 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl_open()
4720 tp->TxPhyAddr); in rtl_open()
4721 tp->TxDescArray = NULL; in rtl_open()
4729 struct pci_dev *pdev = tp->pci_dev; in rtl8169_get_stats64()
4730 struct rtl8169_counters *counters = tp->counters; in rtl8169_get_stats64()
4732 pm_runtime_get_noresume(&pdev->dev); in rtl8169_get_stats64()
4734 netdev_stats_to_stats64(stats, &dev->stats); in rtl8169_get_stats64()
4735 dev_fetch_sw_netstats(stats, dev->tstats); in rtl8169_get_stats64()
4741 if (pm_runtime_active(&pdev->dev)) in rtl8169_get_stats64()
4748 stats->tx_errors = le64_to_cpu(counters->tx_errors) - in rtl8169_get_stats64()
4749 le64_to_cpu(tp->tc_offset.tx_errors); in rtl8169_get_stats64()
4750 stats->collisions = le32_to_cpu(counters->tx_multi_collision) - in rtl8169_get_stats64()
4751 le32_to_cpu(tp->tc_offset.tx_multi_collision); in rtl8169_get_stats64()
4752 stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) - in rtl8169_get_stats64()
4753 le16_to_cpu(tp->tc_offset.tx_aborted); in rtl8169_get_stats64()
4754 stats->rx_missed_errors = le16_to_cpu(counters->rx_missed) - in rtl8169_get_stats64()
4755 le16_to_cpu(tp->tc_offset.rx_missed); in rtl8169_get_stats64()
4757 pm_runtime_put_noidle(&pdev->dev); in rtl8169_get_stats64()
4762 netif_device_detach(tp->dev); in rtl8169_net_suspend()
4764 if (netif_running(tp->dev)) in rtl8169_net_suspend()
4772 rtl_rar_set(tp, tp->dev->dev_addr); in rtl8169_runtime_resume()
4773 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_runtime_resume()
4775 if (tp->TxDescArray) in rtl8169_runtime_resume()
4778 netif_device_attach(tp->dev); in rtl8169_runtime_resume()
4790 clk_disable_unprepare(tp->clk); in rtl8169_suspend()
4801 clk_prepare_enable(tp->clk); in rtl8169_resume()
4804 if (tp->mac_version == RTL_GIGA_MAC_VER_37) in rtl8169_resume()
4814 if (!tp->TxDescArray) { in rtl8169_runtime_suspend()
4815 netif_device_detach(tp->dev); in rtl8169_runtime_suspend()
4831 if (tp->dash_type != RTL_DASH_NONE) in rtl8169_runtime_idle()
4832 return -EBUSY; in rtl8169_runtime_idle()
4834 if (!netif_running(tp->dev) || !netif_carrier_ok(tp->dev)) in rtl8169_runtime_idle()
4837 return -EBUSY; in rtl8169_runtime_idle()
4855 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_shutdown()
4858 tp->dash_type == RTL_DASH_NONE) { in rtl_shutdown()
4859 pci_wake_from_d3(pdev, tp->saved_wolopts); in rtl_shutdown()
4869 pm_runtime_get_noresume(&pdev->dev); in rtl_remove_one()
4871 unregister_netdev(tp->dev); in rtl_remove_one()
4873 if (tp->dash_type != RTL_DASH_NONE) in rtl_remove_one()
4879 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_remove_one()
4904 tp->irq_mask = RxOK | RxErr | TxOK | TxErr | LinkChg; in rtl_set_irq_mask()
4906 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_set_irq_mask()
4907 tp->irq_mask |= SYSErr | RxOverflow | RxFIFOOver; in rtl_set_irq_mask()
4908 else if (tp->mac_version == RTL_GIGA_MAC_VER_11) in rtl_set_irq_mask()
4910 tp->irq_mask |= RxFIFOOver; in rtl_set_irq_mask()
4912 tp->irq_mask |= RxOverflow; in rtl_set_irq_mask()
4919 switch (tp->mac_version) { in rtl_alloc_irq()
4933 return pci_alloc_irq_vectors(tp->pci_dev, 1, 1, flags); in rtl_alloc_irq()
4940 if (rtl_is_8168evl_up(tp) && tp->mac_version != RTL_GIGA_MAC_VER_34) { in rtl_read_mac_address()
4964 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_read_reg()
4967 return -ENODEV; in r8169_mdio_read_reg()
4975 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_write_reg()
4978 return -ENODEV; in r8169_mdio_write_reg()
4987 struct pci_dev *pdev = tp->pci_dev; in r8169_mdio_register()
4991 new_bus = devm_mdiobus_alloc(&pdev->dev); in r8169_mdio_register()
4993 return -ENOMEM; in r8169_mdio_register()
4995 new_bus->name = "r8169"; in r8169_mdio_register()
4996 new_bus->priv = tp; in r8169_mdio_register()
4997 new_bus->parent = &pdev->dev; in r8169_mdio_register()
4998 new_bus->irq[0] = PHY_MAC_INTERRUPT; in r8169_mdio_register()
4999 snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x", in r8169_mdio_register()
5000 pci_domain_nr(pdev->bus), pci_dev_id(pdev)); in r8169_mdio_register()
5002 new_bus->read = r8169_mdio_read_reg; in r8169_mdio_register()
5003 new_bus->write = r8169_mdio_write_reg; in r8169_mdio_register()
5005 ret = devm_mdiobus_register(&pdev->dev, new_bus); in r8169_mdio_register()
5009 tp->phydev = mdiobus_get_phy(new_bus, 0); in r8169_mdio_register()
5010 if (!tp->phydev) { in r8169_mdio_register()
5011 return -ENODEV; in r8169_mdio_register()
5012 } else if (!tp->phydev->drv) { in r8169_mdio_register()
5016 …dev_err(&pdev->dev, "no dedicated PHY driver found for PHY ID 0x%08x, maybe realtek.ko needs to be… in r8169_mdio_register()
5017 tp->phydev->phy_id); in r8169_mdio_register()
5018 return -EUNATCH; in r8169_mdio_register()
5021 tp->phydev->mac_managed_pm = 1; in r8169_mdio_register()
5023 phy_support_asym_pause(tp->phydev); in r8169_mdio_register()
5026 phy_suspend(tp->phydev); in r8169_mdio_register()
5065 switch (tp->mac_version) { in rtl_hw_initialize()
5082 /* Non-GBit versions don't support jumbo frames */ in rtl_jumbo_max()
5083 if (!tp->supports_gmii) in rtl_jumbo_max()
5086 switch (tp->mac_version) { in rtl_jumbo_max()
5105 struct net_device *dev = tp->dev; in rtl_init_mac_address()
5121 dev->addr_assign_type = NET_ADDR_RANDOM; in rtl_init_mac_address()
5131 if (tp->mac_version >= RTL_GIGA_MAC_VER_61 && in rtl_aspm_is_safe()
5146 dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp)); in rtl_init_one()
5148 return -ENOMEM; in rtl_init_one()
5150 SET_NETDEV_DEV(dev, &pdev->dev); in rtl_init_one()
5151 dev->netdev_ops = &rtl_netdev_ops; in rtl_init_one()
5153 tp->dev = dev; in rtl_init_one()
5154 tp->pci_dev = pdev; in rtl_init_one()
5155 tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1; in rtl_init_one()
5156 tp->eee_adv = -1; in rtl_init_one()
5157 tp->ocp_base = OCP_STD_PHY_BASE; in rtl_init_one()
5159 dev->tstats = devm_netdev_alloc_pcpu_stats(&pdev->dev, in rtl_init_one()
5161 if (!dev->tstats) in rtl_init_one()
5162 return -ENOMEM; in rtl_init_one()
5165 tp->clk = devm_clk_get_optional_enabled(&pdev->dev, "ether_clk"); in rtl_init_one()
5166 if (IS_ERR(tp->clk)) in rtl_init_one()
5167 return dev_err_probe(&pdev->dev, PTR_ERR(tp->clk), "failed to get ether_clk\n"); in rtl_init_one()
5172 dev_err(&pdev->dev, "enable failure\n"); in rtl_init_one()
5177 dev_info(&pdev->dev, "Mem-Wr-Inval unavailable\n"); in rtl_init_one()
5180 region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1; in rtl_init_one()
5182 dev_err(&pdev->dev, "no MMIO resource found\n"); in rtl_init_one()
5183 return -ENODEV; in rtl_init_one()
5188 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); in rtl_init_one()
5192 tp->mmio_addr = pcim_iomap_table(pdev)[region]; in rtl_init_one()
5197 chipset = rtl8169_get_mac_version(xid, tp->supports_gmii); in rtl_init_one()
5199 …dev_err(&pdev->dev, "unknown chip XID %03x, contact r8169 maintainers (see MAINTAINERS file)\n", x… in rtl_init_one()
5200 return -ENODEV; in rtl_init_one()
5203 tp->mac_version = chipset; in rtl_init_one()
5212 else if (tp->mac_version >= RTL_GIGA_MAC_VER_46) in rtl_init_one()
5216 tp->aspm_manageable = !rc; in rtl_init_one()
5218 tp->dash_type = rtl_check_dash(tp); in rtl_init_one()
5220 tp->cp_cmd = RTL_R16(tp, CPlusCmd) & CPCMD_MASK; in rtl_init_one()
5222 if (sizeof(dma_addr_t) > 4 && tp->mac_version >= RTL_GIGA_MAC_VER_18 && in rtl_init_one()
5223 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) in rtl_init_one()
5224 dev->features |= NETIF_F_HIGHDMA; in rtl_init_one()
5236 dev_err(&pdev->dev, "Can't allocate interrupt\n"); in rtl_init_one()
5239 tp->irq = pci_irq_vector(pdev, 0); in rtl_init_one()
5241 INIT_WORK(&tp->wk.work, rtl_task); in rtl_init_one()
5245 dev->ethtool_ops = &rtl8169_ethtool_ops; in rtl_init_one()
5247 netif_napi_add(dev, &tp->napi, rtl8169_poll); in rtl_init_one()
5249 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM | in rtl_init_one()
5251 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; in rtl_init_one()
5252 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in rtl_init_one()
5258 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl_init_one()
5260 dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX; in rtl_init_one()
5263 dev->hw_features |= NETIF_F_IPV6_CSUM; in rtl_init_one()
5265 dev->features |= dev->hw_features; in rtl_init_one()
5273 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6; in rtl_init_one()
5277 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO; in rtl_init_one()
5282 dev->hw_features |= NETIF_F_RXALL; in rtl_init_one()
5283 dev->hw_features |= NETIF_F_RXFCS; in rtl_init_one()
5286 rtl8169_set_features(dev, dev->features); in rtl_init_one()
5288 if (tp->dash_type == RTL_DASH_NONE) { in rtl_init_one()
5292 dev->wol_enabled = 1; in rtl_init_one()
5297 dev->max_mtu = jumbo_max; in rtl_init_one()
5301 tp->fw_name = rtl_chip_infos[chipset].fw_name; in rtl_init_one()
5303 tp->counters = dmam_alloc_coherent (&pdev->dev, sizeof(*tp->counters), in rtl_init_one()
5304 &tp->counters_phys_addr, in rtl_init_one()
5306 if (!tp->counters) in rtl_init_one()
5307 return -ENOMEM; in rtl_init_one()
5320 rtl_chip_infos[chipset].name, dev->dev_addr, xid, tp->irq); in rtl_init_one()
5324 jumbo_max, tp->mac_version <= RTL_GIGA_MAC_VER_06 ? in rtl_init_one()
5327 if (tp->dash_type != RTL_DASH_NONE) { in rtl_init_one()
5333 pm_runtime_put_sync(&pdev->dev); in rtl_init_one()