673 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))  macro
742 	RTL_W8 (ChipCmd, CmdReset);  in rtl8139_chip_reset()
835 	RTL_W8 (HltClk, 'R');  in rtl8139_init_board()
870 			RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_init_board()
871 			RTL_W8 (Config1, tmp8);  in rtl8139_init_board()
872 			RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_init_board()
877 				RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_init_board()
878 				RTL_W8 (Config4, tmp8 & ~LWPTN);  in rtl8139_init_board()
879 				RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_init_board()
886 		RTL_W8 (Config1, tmp8);  in rtl8139_init_board()
1104 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */  in rtl8139_init_one()
1159 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);  in read_eeprom()
1160 	RTL_W8 (Cfg9346, EE_ENB);  in read_eeprom()
1166 		RTL_W8 (Cfg9346, EE_ENB | dataval);  in read_eeprom()
1168 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);  in read_eeprom()
1171 	RTL_W8 (Cfg9346, EE_ENB);  in read_eeprom()
1175 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);  in read_eeprom()
1180 		RTL_W8 (Cfg9346, EE_ENB);  in read_eeprom()
1185 	RTL_W8(Cfg9346, 0);  in read_eeprom()
1226 		RTL_W8 (Config4, MDIO_WRITE1);  in mdio_sync()
1228 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);  in mdio_sync()
1256 		RTL_W8 (Config4, MDIO_DIR | dataval);  in mdio_read()
1258 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);  in mdio_read()
1264 		RTL_W8 (Config4, 0);  in mdio_read()
1267 		RTL_W8 (Config4, MDIO_CLK);  in mdio_read()
1289 			RTL_W8 (Cfg9346, Cfg9346_Unlock);  in mdio_write()
1291 			RTL_W8 (Cfg9346, Cfg9346_Lock);  in mdio_write()
1304 		RTL_W8 (Config4, dataval);  in mdio_write()
1306 		RTL_W8 (Config4, dataval | MDIO_CLK);  in mdio_write()
1311 		RTL_W8 (Config4, 0);  in mdio_write()
1313 		RTL_W8 (Config4, MDIO_CLK);  in mdio_write()
1390 		RTL_W8 (HltClk, 'R');  in rtl8139_hw_start()
1406 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);  in rtl8139_hw_start()
1418 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);  in rtl8139_hw_start()
1424 	RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_hw_start()
1440 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);  in rtl8139_hw_start()
1590 			RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_thread_iter()
1591 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);  in rtl8139_thread_iter()
1592 			RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_thread_iter()
1685 		RTL_W8 (ChipCmd, CmdRxEnb);  in rtl8139_tx_timeout_task()
1863 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);  in rtl8139_rx_err()
1864 	RTL_W8 (ChipCmd, tmp8);  in rtl8139_rx_err()
1896 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);  in rtl8139_rx_err()
1905 	RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_rx_err()
2271 	RTL_W8 (ChipCmd, 0);  in rtl8139_close()
2294 	RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_close()
2297 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */  in rtl8139_close()
2360 	RTL_W8 (Cfg9346, Cfg9346_Unlock);  in rtl8139_set_wol()
2361 	RTL_W8 (Config3, cfg3);  in rtl8139_set_wol()
2362 	RTL_W8 (Cfg9346, Cfg9346_Lock);  in rtl8139_set_wol()
2374 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */  in rtl8139_set_wol()
2623 	RTL_W8 (ChipCmd, 0);  in rtl8139_suspend()