1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 int __ocelot_bulk_read_ix(struct ocelot *ocelot, u32 reg, u32 offset, void *buf,  in __ocelot_bulk_read_ix()  argument
16 	u16 target = reg >> TARGET_OFFSET;  in __ocelot_bulk_read_ix()
20 	return regmap_bulk_read(ocelot->targets[target],  in __ocelot_bulk_read_ix()
21 				ocelot->map[target][reg & REG_MASK] + offset,  in __ocelot_bulk_read_ix()
26 u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset)  in __ocelot_read_ix()  argument
28 	u16 target = reg >> TARGET_OFFSET;  in __ocelot_read_ix()
33 	regmap_read(ocelot->targets[target],  in __ocelot_read_ix()
34 		    ocelot->map[target][reg & REG_MASK] + offset, &val);  in __ocelot_read_ix()
39 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 offset)  in __ocelot_write_ix()  argument
41 	u16 target = reg >> TARGET_OFFSET;  in __ocelot_write_ix()
45 	regmap_write(ocelot->targets[target],  in __ocelot_write_ix()
46 		     ocelot->map[target][reg & REG_MASK] + offset, val);  in __ocelot_write_ix()
50 void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask, u32 reg,  in __ocelot_rmw_ix()  argument
51 		     u32 offset)  in __ocelot_rmw_ix()  argument
53 	u16 target = reg >> TARGET_OFFSET;  in __ocelot_rmw_ix()
57 	regmap_update_bits(ocelot->targets[target],  in __ocelot_rmw_ix()
58 			   ocelot->map[target][reg & REG_MASK] + offset,  in __ocelot_rmw_ix()
63 u32 ocelot_port_readl(struct ocelot_port *port, u32 reg)  in ocelot_port_readl()  argument
65 	struct ocelot *ocelot = port->ocelot;  in ocelot_port_readl()
66 	u16 target = reg >> TARGET_OFFSET;  in ocelot_port_readl()
71 	regmap_read(port->target, ocelot->map[target][reg & REG_MASK], &val);  in ocelot_port_readl()
76 void ocelot_port_writel(struct ocelot_port *port, u32 val, u32 reg)  in ocelot_port_writel()  argument
78 	struct ocelot *ocelot = port->ocelot;  in ocelot_port_writel()
79 	u16 target = reg >> TARGET_OFFSET;  in ocelot_port_writel()
83 	regmap_write(port->target, ocelot->map[target][reg & REG_MASK], val);  in ocelot_port_writel()
87 void ocelot_port_rmwl(struct ocelot_port *port, u32 val, u32 mask, u32 reg)  in ocelot_port_rmwl()  argument
89 	u32 cur = ocelot_port_readl(port, reg);  in ocelot_port_rmwl()
91 	ocelot_port_writel(port, (cur & (~mask)) | val, reg);  in ocelot_port_rmwl()
96 			    u32 reg, u32 offset)  in __ocelot_target_read_ix()  argument
100 	regmap_read(ocelot->targets[target],  in __ocelot_target_read_ix()
101 		    ocelot->map[target][reg] + offset, &val);  in __ocelot_target_read_ix()
106 			      u32 val, u32 reg, u32 offset)  in __ocelot_target_write_ix()  argument
108 	regmap_write(ocelot->targets[target],  in __ocelot_target_write_ix()
109 		     ocelot->map[target][reg] + offset, val);  in __ocelot_target_write_ix()
120 		u32 reg = regfields[i].reg;  in ocelot_regfields_init()  local
122 		if (!reg)  in ocelot_regfields_init()
125 		target = regfields[i].reg >> TARGET_OFFSET;  in ocelot_regfields_init()
127 		regfield.reg = ocelot->map[target][reg & REG_MASK];  in ocelot_regfields_init()
133 		ocelot->regfields[i] =  in ocelot_regfields_init()
134 		devm_regmap_field_alloc(ocelot->dev,  in ocelot_regfields_init()
135 					ocelot->targets[target],  in ocelot_regfields_init()
138 		if (IS_ERR(ocelot->regfields[i]))  in ocelot_regfields_init()
139 			return PTR_ERR(ocelot->regfields[i]);  in ocelot_regfields_init()
156 	regs = devm_ioremap_resource(ocelot->dev, res);  in ocelot_regmap_init()
160 	ocelot_regmap_config.name = res->name;  in ocelot_regmap_init()
162 	return devm_regmap_init_mmio(ocelot->dev, regs, &ocelot_regmap_config);  in ocelot_regmap_init()