Lines Matching full:sparx5
2 /* Microchip Sparx5 Switch driver
6 * The Sparx5 Chip Register Model can be browsed at this location:
27 static u64 sparx5_ptp_get_1ppm(struct sparx5 *sparx5) in sparx5_ptp_get_1ppm() argument
37 switch (sparx5->coreclock) { in sparx5_ptp_get_1ppm()
55 static u64 sparx5_ptp_get_nominal_value(struct sparx5 *sparx5) in sparx5_ptp_get_nominal_value() argument
59 switch (sparx5->coreclock) { in sparx5_ptp_get_nominal_value()
79 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_hwtstamp_set() local
88 if (test_bit(port->portno, sparx5->bridge_mask)) in sparx5_ptp_hwtstamp_set()
132 mutex_lock(&sparx5->ptp_lock); in sparx5_ptp_hwtstamp_set()
133 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_set()
135 mutex_unlock(&sparx5->ptp_lock); in sparx5_ptp_hwtstamp_set()
142 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_hwtstamp_get() local
145 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_get()
225 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_txtstamp_request() local
239 spin_lock_irqsave(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_request()
240 if (sparx5->ptp_skbs == SPARX5_MAX_PTP_ID) { in sparx5_ptp_txtstamp_request()
241 spin_unlock_irqrestore(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_request()
251 sparx5->ptp_skbs++; in sparx5_ptp_txtstamp_request()
256 spin_unlock_irqrestore(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_request()
264 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_txtstamp_release() local
267 spin_lock_irqsave(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_release()
269 sparx5->ptp_skbs--; in sparx5_ptp_txtstamp_release()
271 spin_unlock_irqrestore(&sparx5->ptp_ts_id_lock, flags); in sparx5_ptp_txtstamp_release()
274 static void sparx5_get_hwtimestamp(struct sparx5 *sparx5, in sparx5_get_hwtimestamp() argument
282 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_get_hwtimestamp()
290 sparx5, PTP_PTP_PIN_CFG(TOD_ACC_PIN)); in sparx5_get_hwtimestamp()
292 ts->tv_sec = spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(TOD_ACC_PIN)); in sparx5_get_hwtimestamp()
293 curr_nsec = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(TOD_ACC_PIN)); in sparx5_get_hwtimestamp()
301 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_get_hwtimestamp()
307 struct sparx5 *sparx5 = args; in sparx5_ptp_irq_handler() local
318 val = spx5_rd(sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
333 port = sparx5->ports[txport]; in sparx5_ptp_irq_handler()
336 delay = spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP); in sparx5_ptp_irq_handler()
344 sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
346 val = spx5_rd(sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
353 id = spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP); in sparx5_ptp_irq_handler()
355 id |= spx5_rd(sparx5, REW_PTP_TWOSTEP_STAMP_SUBNS); in sparx5_ptp_irq_handler()
371 sparx5, REW_PTP_TWOSTEP_CTRL); in sparx5_ptp_irq_handler()
376 spin_lock(&sparx5->ptp_ts_id_lock); in sparx5_ptp_irq_handler()
377 sparx5->ptp_skbs--; in sparx5_ptp_irq_handler()
378 spin_unlock(&sparx5->ptp_ts_id_lock); in sparx5_ptp_irq_handler()
381 sparx5_get_hwtimestamp(sparx5, &ts, delay); in sparx5_ptp_irq_handler()
396 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_adjfine() local
410 tod_inc = sparx5_ptp_get_nominal_value(sparx5); in sparx5_ptp_adjfine()
416 ref = sparx5_ptp_get_1ppm(sparx5) * (scaled_ppm >> 16); in sparx5_ptp_adjfine()
417 ref += (sparx5_ptp_get_1ppm(sparx5) * (0xffff & scaled_ppm)) >> 16; in sparx5_ptp_adjfine()
420 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjfine()
424 sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_adjfine()
426 spx5_wr((u32)tod_inc & 0xFFFFFFFF, sparx5, in sparx5_ptp_adjfine()
428 spx5_wr((u32)(tod_inc >> 32), sparx5, in sparx5_ptp_adjfine()
432 PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS, sparx5, in sparx5_ptp_adjfine()
435 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjfine()
444 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_settime64() local
447 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_settime64()
456 sparx5, PTP_PTP_PIN_CFG(TOD_ACC_PIN)); in sparx5_ptp_settime64()
460 sparx5, PTP_PTP_TOD_SEC_MSB(TOD_ACC_PIN)); in sparx5_ptp_settime64()
462 sparx5, PTP_PTP_TOD_SEC_LSB(TOD_ACC_PIN)); in sparx5_ptp_settime64()
463 spx5_wr(ts->tv_nsec, sparx5, PTP_PTP_TOD_NSEC(TOD_ACC_PIN)); in sparx5_ptp_settime64()
472 sparx5, PTP_PTP_PIN_CFG(TOD_ACC_PIN)); in sparx5_ptp_settime64()
474 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_settime64()
483 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_gettime64() local
488 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_gettime64()
496 sparx5, PTP_PTP_PIN_CFG(TOD_ACC_PIN)); in sparx5_ptp_gettime64()
498 s = spx5_rd(sparx5, PTP_PTP_TOD_SEC_MSB(TOD_ACC_PIN)); in sparx5_ptp_gettime64()
500 s |= spx5_rd(sparx5, PTP_PTP_TOD_SEC_LSB(TOD_ACC_PIN)); in sparx5_ptp_gettime64()
501 ns = spx5_rd(sparx5, PTP_PTP_TOD_NSEC(TOD_ACC_PIN)); in sparx5_ptp_gettime64()
504 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_gettime64()
520 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_adjtime() local
525 spin_lock_irqsave(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjtime()
534 sparx5, PTP_PTP_PIN_CFG(TOD_ACC_PIN)); in sparx5_ptp_adjtime()
537 sparx5, PTP_PTP_TOD_NSEC(TOD_ACC_PIN)); in sparx5_ptp_adjtime()
546 sparx5, PTP_PTP_PIN_CFG(TOD_ACC_PIN)); in sparx5_ptp_adjtime()
548 spin_unlock_irqrestore(&sparx5->ptp_clock_lock, flags); in sparx5_ptp_adjtime()
567 .name = "sparx5 ptp",
575 static int sparx5_ptp_phc_init(struct sparx5 *sparx5, in sparx5_ptp_phc_init() argument
579 struct sparx5_phc *phc = &sparx5->phc[index]; in sparx5_ptp_phc_init()
582 phc->clock = ptp_clock_register(&phc->info, sparx5->dev); in sparx5_ptp_phc_init()
587 phc->sparx5 = sparx5; in sparx5_ptp_phc_init()
595 int sparx5_ptp_init(struct sparx5 *sparx5) in sparx5_ptp_init() argument
597 u64 tod_adj = sparx5_ptp_get_nominal_value(sparx5); in sparx5_ptp_init()
601 if (!sparx5->ptp) in sparx5_ptp_init()
605 err = sparx5_ptp_phc_init(sparx5, i, &sparx5_ptp_clock_info); in sparx5_ptp_init()
610 spin_lock_init(&sparx5->ptp_clock_lock); in sparx5_ptp_init()
611 spin_lock_init(&sparx5->ptp_ts_id_lock); in sparx5_ptp_init()
612 mutex_init(&sparx5->ptp_lock); in sparx5_ptp_init()
615 spx5_wr(PTP_PTP_DOM_CFG_PTP_ENA_SET(0), sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
620 sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
623 spx5_wr((u32)tod_adj & 0xFFFFFFFF, sparx5, in sparx5_ptp_init()
625 spx5_wr((u32)(tod_adj >> 32), sparx5, in sparx5_ptp_init()
631 sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
634 spx5_wr(PTP_PTP_DOM_CFG_PTP_ENA_SET(0x7), sparx5, PTP_PTP_DOM_CFG); in sparx5_ptp_init()
636 for (i = 0; i < sparx5->port_count; i++) { in sparx5_ptp_init()
637 port = sparx5->ports[i]; in sparx5_ptp_init()
647 void sparx5_ptp_deinit(struct sparx5 *sparx5) in sparx5_ptp_deinit() argument
652 for (i = 0; i < sparx5->port_count; i++) { in sparx5_ptp_deinit()
653 port = sparx5->ports[i]; in sparx5_ptp_deinit()
661 ptp_clock_unregister(sparx5->phc[i].clock); in sparx5_ptp_deinit()
664 void sparx5_ptp_rxtstamp(struct sparx5 *sparx5, struct sk_buff *skb, in sparx5_ptp_rxtstamp() argument
672 if (!sparx5->ptp) in sparx5_ptp_rxtstamp()
675 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_rxtstamp()