Lines Matching refs:mlxsw_reg_write

204 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);  in mlxsw_sp_flow_counter_clear()
356 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); in mlxsw_sp_port_vid_stp_set()
382 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); in mlxsw_sp_port_admin_status_set()
393 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); in mlxsw_sp_port_dev_addr_set()
431 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sp_port_mtu_set()
440 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sp_port_swid_set()
449 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); in mlxsw_sp_port_vp_mode_set()
464 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl); in mlxsw_sp_port_vid_learning_set()
498 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spevet), spevet_pl); in mlxsw_sp_port_egress_ethtype_set()
516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl); in __mlxsw_sp_port_pvid_set()
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl); in mlxsw_sp_port_allow_untagged_set()
562 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl); in mlxsw_sp_port_system_port_mapping_set()
656 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sp_port_module_map()
674 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); in mlxsw_sp_port_module_unmap()
1012 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl); in __mlxsw_sp_port_vlan_set()
1206 err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pplr), in mlxsw_sp_feature_loopback()
1376 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sp_port_speed_by_width_set()
1412 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); in mlxsw_sp_port_ets_set()
1427 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); in mlxsw_sp_port_ets_maxrate_set()
1442 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); in mlxsw_sp_port_min_bw_set()
1453 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl); in mlxsw_sp_port_prio_tc_set()
1549 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtctm), qtctm_pl); in mlxsw_sp_port_tc_mc_mode_set()
1579 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvc), spvc_pl); in mlxsw_sp_port_vlan_classification_set()
1980 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmecr), pmecr_pl); in mlxsw_sp_port_mapping_event_set()
2576 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl); in mlxsw_sp_cpu_policers_set()
2623 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); in mlxsw_sp_trap_groups_set()
2709 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); in mlxsw_sp_lag_init()
2973 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rips), rips_pl); in mlxsw_sp_ipv6_addr_init()
4160 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mprs), mprs_pl); in mlxsw_sp_parsing_depth_inc()
4183 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mprs), mprs_pl); in mlxsw_sp_parsing_depth_dec()
4200 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mprs), mprs_pl); in mlxsw_sp_parsing_vxlan_udp_dport_set()
4235 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); in mlxsw_sp_lag_create()
4243 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); in mlxsw_sp_lag_destroy()
4254 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); in mlxsw_sp_lag_col_port_add()
4265 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); in mlxsw_sp_lag_col_port_remove()
4276 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); in mlxsw_sp_lag_col_port_enable()
4287 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); in mlxsw_sp_lag_col_port_disable()
4457 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); in mlxsw_sp_lag_dist_port_add()
4468 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); in mlxsw_sp_lag_dist_port_remove()
4543 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); in mlxsw_sp_port_stp_set()