Lines Matching +full:ethernet +full:- +full:pse
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
12 #include <linux/dma-mapping.h>
52 #define NEXT_DESP_IDX(X, Y) (((X) + 1) & ((Y) - 1))
57 #define MTK_PP_MAX_BUF_SIZE (PAGE_SIZE - MTK_PP_PAD)
110 /* Unicast Filter MAC Address Register - Low */
113 /* Unicast Filter MAC Address Register - High */
119 /* PSE Free Queue Flow Control */
124 /* PSE Input Queue Reservation Register*/
125 #define PSE_IQ_REV(x) (0x140 + (((x) - 1) << 2))
127 /* PSE Output Queue Threshold Register*/
128 #define PSE_OQ_TH(x) (0x160 + (((x) - 1) << 2))
254 #define MTK_QDMA_TX_MASK (MTK_QDMA_TX_NUM - 1)
281 #define TX_DMA_PLEN0(x) (((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset)
282 #define TX_DMA_PLEN1(x) ((x) & eth->soc->txrx.dma_max_len)
293 #define RX_DMA_PREP_PLEN0(x) (((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset)
294 #define RX_DMA_GET_PLEN0(x) (((x) >> eth->soc->txrx.dma_len_offset) & eth->soc->txrx.dma_max_len)
418 /* ethernet subsystem chip id register */
425 /* ethernet system control register */
429 /* ethernet subsystem config register */
440 /* ethernet subsystem clock register */
447 /* ethernet reset control register */
454 /* ethernet reset check idle register */
457 /* ethernet reset control register */
462 /* ethernet dma channel agent map */
469 /* Register to auto-negotiation restart */
584 /* struct mtk_hw_stats - the structure that holds the traffic statistics.
615 /* PDMA descriptor can point at 1-2 segments. This enum allows us to
706 /* struct mtk_tx_buf - This struct holds the pointers to the memory pointed at
725 /* struct mtk_tx_ring - This struct holds info describing a TX ring
758 /* struct mtk_rx_ring - This struct holds info describing a RX ring
861 /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */
864 /* 0: GMAC2 -> GEPHY, 1: GMAC0 -> GePHY */
868 /* 0: U3 -> QPHY, 1: GMAC2 -> QPHY */
872 /* 2: GMAC1 -> SGMII, 3: GMAC2 -> SGMII */
877 /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */
959 /* struct mtk_eth_data - This is the structure holding all differences
1002 /* struct mtk_pcs - This structure holds each sgmii regmap and associated
1015 /* struct mtk_sgmii - This is the structure holding sgmii regmap and its
1023 /* struct mtk_eth - This is the main datasructure for holding the state
1123 /* struct mtk_mac - the structure that holds the info about the MACs of the
1151 const struct mtk_soc_data *soc = ppe->eth->soc; in mtk_foe_get_entry()
1153 return ppe->foe_table + hash * soc->foe_entry_size; in mtk_foe_get_entry()
1158 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib1_ts_mask()
1166 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib1_ppoe_mask()
1174 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib1_vlan_tag_mask()
1182 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib1_vlan_layer_mask()
1190 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_prep_ib1_vlan_layer()
1198 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib1_vlan_layer()
1206 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib1_pkt_type_mask()
1214 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib1_pkt_type()
1222 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) in mtk_get_ib2_multicast_mask()