Lines Matching refs:mtk_w32
176 void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg) in mtk_w32() function
193 mtk_w32(eth, val, reg); in mtk_m32()
223 mtk_w32(eth, PHY_IAC_ACCESS | in _mtk_mdio_write()
235 mtk_w32(eth, PHY_IAC_ACCESS | in _mtk_mdio_write()
243 mtk_w32(eth, PHY_IAC_ACCESS | in _mtk_mdio_write()
268 mtk_w32(eth, PHY_IAC_ACCESS | in _mtk_mdio_read()
280 mtk_w32(eth, PHY_IAC_ACCESS | in _mtk_mdio_read()
287 mtk_w32(eth, PHY_IAC_ACCESS | in _mtk_mdio_read()
349 mtk_w32(eth, TRGMII_MODE, INTF_MODE); in mtk_gmac0_rgmii_adjust()
359 mtk_w32(eth, val, INTF_MODE); in mtk_gmac0_rgmii_adjust()
372 mtk_w32(eth, val, TRGMII_RCK_CTRL); in mtk_gmac0_rgmii_adjust()
376 mtk_w32(eth, val, TRGMII_TCK_CTRL); in mtk_gmac0_rgmii_adjust()
476 mtk_w32(mac->hw, in mtk_mac_config()
568 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
613 mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); in mtk_mac_link_down()
652 mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); in mtk_mac_link_up()
717 mtk_w32(eth, val & ~mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
728 mtk_w32(eth, val | mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
739 mtk_w32(eth, val & ~mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
750 mtk_w32(eth, val | mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
769 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
771 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
775 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
777 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
983 mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head); in mtk_init_fq_dma()
984 mtk_w32(eth, phy_ring_tail, soc->reg_map->qdma.fq_tail); in mtk_init_fq_dma()
985 mtk_w32(eth, (cnt << 16) | cnt, soc->reg_map->qdma.fq_count); in mtk_init_fq_dma()
986 mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, soc->reg_map->qdma.fq_blen); in mtk_init_fq_dma()
1297 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_tx_map()
1303 mtk_w32(eth, next_idx, MT7628_TX_CTX_IDX0); in mtk_tx_map()
1459 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1465 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1660 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_xdp_submit_frame()
1665 mtk_w32(eth, NEXT_DESP_IDX(idx, ring->dma_size), in mtk_xdp_submit_frame()
2040 mtk_w32(eth, cpu, reg_map->qdma.crx_ptr); in mtk_poll_tx_qdma()
2129 mtk_w32(eth, (MTK_GDM1_AF | MTK_GDM2_AF), in mtk_handle_status_irq()
2142 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->tx_irq_status); in mtk_napi_tx()
2175 mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, in mtk_napi_rx()
2261 mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr); in mtk_tx_alloc()
2262 mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr); in mtk_tx_alloc()
2263 mtk_w32(eth, in mtk_tx_alloc()
2266 mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr); in mtk_tx_alloc()
2267 mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES, in mtk_tx_alloc()
2270 mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0); in mtk_tx_alloc()
2271 mtk_w32(eth, MTK_DMA_SIZE, MT7628_TX_MAX_CNT0); in mtk_tx_alloc()
2272 mtk_w32(eth, 0, MT7628_TX_CTX_IDX0); in mtk_tx_alloc()
2273 mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx); in mtk_tx_alloc()
2419 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2421 mtk_w32(eth, rx_dma_size, in mtk_rx_alloc()
2423 mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), in mtk_rx_alloc()
2426 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2428 mtk_w32(eth, rx_dma_size, in mtk_rx_alloc()
2430 mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), in mtk_rx_alloc()
2433 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_rx_alloc()
2500 mtk_w32(eth, ring_ctrl_dw1, MTK_LRO_CTRL_DW1_CFG(i)); in mtk_hwlro_rx_init()
2501 mtk_w32(eth, ring_ctrl_dw2, MTK_LRO_CTRL_DW2_CFG(i)); in mtk_hwlro_rx_init()
2502 mtk_w32(eth, ring_ctrl_dw3, MTK_LRO_CTRL_DW3_CFG(i)); in mtk_hwlro_rx_init()
2512 mtk_w32(eth, MTK_HW_LRO_BW_THRE, MTK_PDMA_LRO_CTRL_DW2); in mtk_hwlro_rx_init()
2515 mtk_w32(eth, MTK_HW_LRO_REPLACE_DELTA, MTK_PDMA_LRO_ALT_SCORE_DELTA); in mtk_hwlro_rx_init()
2518 mtk_w32(eth, (MTK_HW_LRO_TIMER_UNIT << 16) | MTK_HW_LRO_REFRESH_TIME, in mtk_hwlro_rx_init()
2530 mtk_w32(eth, lro_ctrl_dw3, MTK_PDMA_LRO_CTRL_DW3); in mtk_hwlro_rx_init()
2531 mtk_w32(eth, lro_ctrl_dw0, MTK_PDMA_LRO_CTRL_DW0); in mtk_hwlro_rx_init()
2542 mtk_w32(eth, MTK_LRO_RING_RELINQUISH_REQ, MTK_PDMA_LRO_CTRL_DW0); in mtk_hwlro_rx_uninit()
2556 mtk_w32(eth, 0, MTK_LRO_CTRL_DW2_CFG(i)); in mtk_hwlro_rx_uninit()
2559 mtk_w32(eth, 0, MTK_PDMA_LRO_CTRL_DW0); in mtk_hwlro_rx_uninit()
2569 mtk_w32(eth, (reg_val & ~MTK_RING_MYIP_VLD), MTK_LRO_CTRL_DW2_CFG(idx)); in mtk_hwlro_val_ipaddr()
2571 mtk_w32(eth, ip, MTK_LRO_DIP_DW0_CFG(idx)); in mtk_hwlro_val_ipaddr()
2574 mtk_w32(eth, (reg_val | MTK_RING_MYIP_VLD), MTK_LRO_CTRL_DW2_CFG(idx)); in mtk_hwlro_val_ipaddr()
2584 mtk_w32(eth, (reg_val & ~MTK_RING_MYIP_VLD), MTK_LRO_CTRL_DW2_CFG(idx)); in mtk_hwlro_inval_ipaddr()
2586 mtk_w32(eth, 0, MTK_LRO_DIP_DW0_CFG(idx)); in mtk_hwlro_inval_ipaddr()
2808 mtk_w32(eth, FC_THRES_DROP_MODE | FC_THRES_DROP_EN | in mtk_dma_init()
2810 mtk_w32(eth, 0x0, eth->soc->reg_map->qdma.hred); in mtk_dma_init()
2938 mtk_w32(eth, val, reg_map->qdma.glo_cfg); in mtk_start_dma()
2940 mtk_w32(eth, in mtk_start_dma()
2945 mtk_w32(eth, MTK_TX_WB_DDONE | MTK_TX_DMA_EN | MTK_RX_DMA_EN | in mtk_start_dma()
2974 mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i)); in mtk_gdm_config()
2977 mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); in mtk_gdm_config()
2978 mtk_w32(eth, 0, MTK_RST_GL); in mtk_gdm_config()
3035 mtk_w32(eth, val & ~(MTK_TX_WB_DDONE | MTK_RX_DMA_EN | MTK_TX_DMA_EN), in mtk_stop_dma()
3192 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_rx()
3194 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_rx()
3223 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_tx()
3225 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_tx()
3288 mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC); in mtk_hw_init()
3307 mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); in mtk_hw_init()
3313 mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); in mtk_hw_init()
3316 mtk_w32(eth, 1, MTK_CDMP_EG_CTRL); in mtk_hw_init()
3327 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp); in mtk_hw_init()
3328 mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->pdma.int_grp + 4); in mtk_hw_init()
3329 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->qdma.int_grp); in mtk_hw_init()
3330 mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4); in mtk_hw_init()
3331 mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP); in mtk_hw_init()
3335 mtk_w32(eth, 0x00000300, PSE_DROP_CFG); in mtk_hw_init()
3338 mtk_w32(eth, 0x01fa01f4, PSE_FQFC_CFG2); in mtk_hw_init()
3341 mtk_w32(eth, 0x001a000e, PSE_IQ_REV(1)); in mtk_hw_init()
3342 mtk_w32(eth, 0x01ff001a, PSE_IQ_REV(2)); in mtk_hw_init()
3343 mtk_w32(eth, 0x000e01ff, PSE_IQ_REV(3)); in mtk_hw_init()
3344 mtk_w32(eth, 0x000e000e, PSE_IQ_REV(4)); in mtk_hw_init()
3345 mtk_w32(eth, 0x000e000e, PSE_IQ_REV(5)); in mtk_hw_init()
3346 mtk_w32(eth, 0x000e000e, PSE_IQ_REV(6)); in mtk_hw_init()
3347 mtk_w32(eth, 0x000e000e, PSE_IQ_REV(7)); in mtk_hw_init()
3348 mtk_w32(eth, 0x000e000e, PSE_IQ_REV(8)); in mtk_hw_init()
3351 mtk_w32(eth, 0x000f000a, PSE_OQ_TH(1)); in mtk_hw_init()
3352 mtk_w32(eth, 0x001a000f, PSE_OQ_TH(2)); in mtk_hw_init()
3353 mtk_w32(eth, 0x000f001a, PSE_OQ_TH(3)); in mtk_hw_init()
3354 mtk_w32(eth, 0x01ff000f, PSE_OQ_TH(4)); in mtk_hw_init()
3355 mtk_w32(eth, 0x000f000f, PSE_OQ_TH(5)); in mtk_hw_init()
3356 mtk_w32(eth, 0x0006000f, PSE_OQ_TH(6)); in mtk_hw_init()
3357 mtk_w32(eth, 0x00060006, PSE_OQ_TH(7)); in mtk_hw_init()
3358 mtk_w32(eth, 0x00060006, PSE_OQ_TH(8)); in mtk_hw_init()
3361 mtk_w32(eth, 0x00000004, MTK_GDM2_THRES); in mtk_hw_init()
3362 mtk_w32(eth, 0x00000004, MTK_CDMW0_THRES); in mtk_hw_init()
3363 mtk_w32(eth, 0x00000004, MTK_CDMW1_THRES); in mtk_hw_init()
3364 mtk_w32(eth, 0x00000004, MTK_CDME0_THRES); in mtk_hw_init()
3365 mtk_w32(eth, 0x00000004, MTK_CDME1_THRES); in mtk_hw_init()
3366 mtk_w32(eth, 0x00000004, MTK_CDMM_THRES); in mtk_hw_init()
3445 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_change_mtu()