Lines Matching full:pf
54 struct otx2_nic *pf = netdev_priv(netdev); in otx2_change_mtu() local
58 if (pf->xdp_prog && new_mtu > MAX_XDP_MTU) { in otx2_change_mtu()
76 static void otx2_disable_flr_me_intr(struct otx2_nic *pf) in otx2_disable_flr_me_intr() argument
78 int irq, vfs = pf->total_vfs; in otx2_disable_flr_me_intr()
81 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
82 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME0); in otx2_disable_flr_me_intr()
83 free_irq(irq, pf); in otx2_disable_flr_me_intr()
86 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
87 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR0); in otx2_disable_flr_me_intr()
88 free_irq(irq, pf); in otx2_disable_flr_me_intr()
93 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
94 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME1); in otx2_disable_flr_me_intr()
95 free_irq(irq, pf); in otx2_disable_flr_me_intr()
97 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
98 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR1); in otx2_disable_flr_me_intr()
99 free_irq(irq, pf); in otx2_disable_flr_me_intr()
102 static void otx2_flr_wq_destroy(struct otx2_nic *pf) in otx2_flr_wq_destroy() argument
104 if (!pf->flr_wq) in otx2_flr_wq_destroy()
106 destroy_workqueue(pf->flr_wq); in otx2_flr_wq_destroy()
107 pf->flr_wq = NULL; in otx2_flr_wq_destroy()
108 devm_kfree(pf->dev, pf->flr_wrk); in otx2_flr_wq_destroy()
114 struct otx2_nic *pf = flrwork->pf; in otx2_flr_handler() local
115 struct mbox *mbox = &pf->mbox; in otx2_flr_handler()
119 vf = flrwork - pf->flr_wrk; in otx2_flr_handler()
130 if (!otx2_sync_mbox_msg(&pf->mbox)) { in otx2_flr_handler()
136 otx2_write64(pf, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf)); in otx2_flr_handler()
137 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in otx2_flr_handler()
145 struct otx2_nic *pf = (struct otx2_nic *)pf_irq; in otx2_pf_flr_intr_handler() local
149 if (pf->total_vfs > 64) in otx2_pf_flr_intr_handler()
153 intr = otx2_read64(pf, RVU_PF_VFFLR_INTX(reg)); in otx2_pf_flr_intr_handler()
161 queue_work(pf->flr_wq, &pf->flr_wrk[dev].work); in otx2_pf_flr_intr_handler()
163 otx2_write64(pf, RVU_PF_VFFLR_INTX(reg), BIT_ULL(vf)); in otx2_pf_flr_intr_handler()
165 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(reg), in otx2_pf_flr_intr_handler()
174 struct otx2_nic *pf = (struct otx2_nic *)pf_irq; in otx2_pf_me_intr_handler() local
178 if (pf->total_vfs > 64) in otx2_pf_me_intr_handler()
182 intr = otx2_read64(pf, RVU_PF_VFME_INTX(reg)); in otx2_pf_me_intr_handler()
189 otx2_write64(pf, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf)); in otx2_pf_me_intr_handler()
191 otx2_write64(pf, RVU_PF_VFME_INTX(reg), BIT_ULL(vf)); in otx2_pf_me_intr_handler()
197 static int otx2_register_flr_me_intr(struct otx2_nic *pf, int numvfs) in otx2_register_flr_me_intr() argument
199 struct otx2_hw *hw = &pf->hw; in otx2_register_flr_me_intr()
205 snprintf(irq_name, NAME_SIZE, "RVUPF%d_ME0", rvu_get_pf(pf->pcifunc)); in otx2_register_flr_me_intr()
206 ret = request_irq(pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME0), in otx2_register_flr_me_intr()
207 otx2_pf_me_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
209 dev_err(pf->dev, in otx2_register_flr_me_intr()
215 snprintf(irq_name, NAME_SIZE, "RVUPF%d_FLR0", rvu_get_pf(pf->pcifunc)); in otx2_register_flr_me_intr()
216 ret = request_irq(pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR0), in otx2_register_flr_me_intr()
217 otx2_pf_flr_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
219 dev_err(pf->dev, in otx2_register_flr_me_intr()
227 rvu_get_pf(pf->pcifunc)); in otx2_register_flr_me_intr()
229 (pf->pdev, RVU_PF_INT_VEC_VFME1), in otx2_register_flr_me_intr()
230 otx2_pf_me_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
232 dev_err(pf->dev, in otx2_register_flr_me_intr()
237 rvu_get_pf(pf->pcifunc)); in otx2_register_flr_me_intr()
239 (pf->pdev, RVU_PF_INT_VEC_VFFLR1), in otx2_register_flr_me_intr()
240 otx2_pf_flr_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
242 dev_err(pf->dev, in otx2_register_flr_me_intr()
249 otx2_write64(pf, RVU_PF_VFME_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
250 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
253 otx2_write64(pf, RVU_PF_VFFLR_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
254 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
259 otx2_write64(pf, RVU_PF_VFME_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
260 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1SX(1), in otx2_register_flr_me_intr()
263 otx2_write64(pf, RVU_PF_VFFLR_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
264 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(1), in otx2_register_flr_me_intr()
270 static int otx2_pf_flr_init(struct otx2_nic *pf, int num_vfs) in otx2_pf_flr_init() argument
274 pf->flr_wq = alloc_workqueue("otx2_pf_flr_wq", in otx2_pf_flr_init()
276 if (!pf->flr_wq) in otx2_pf_flr_init()
279 pf->flr_wrk = devm_kcalloc(pf->dev, num_vfs, in otx2_pf_flr_init()
281 if (!pf->flr_wrk) { in otx2_pf_flr_init()
282 destroy_workqueue(pf->flr_wq); in otx2_pf_flr_init()
287 pf->flr_wrk[vf].pf = pf; in otx2_pf_flr_init()
288 INIT_WORK(&pf->flr_wrk[vf].work, otx2_flr_handler); in otx2_pf_flr_init()
315 * pf->mbox.num_msgs holds the data for use in pfaf_mbox_handler in otx2_queue_work()
316 * pf>mbox.up_num_msgs holds the data for use in in otx2_queue_work()
365 static int otx2_forward_vf_mbox_msgs(struct otx2_nic *pf, in otx2_forward_vf_mbox_msgs() argument
376 /* Set VF's mailbox memory as PF's bounce buffer memory, so in otx2_forward_vf_mbox_msgs()
377 * that explicit copying of VF's msgs to PF=>AF mbox region in otx2_forward_vf_mbox_msgs()
378 * and AF=>PF responses to VF's mbox region can be avoided. in otx2_forward_vf_mbox_msgs()
384 dst_mbox = &pf->mbox; in otx2_forward_vf_mbox_msgs()
393 mutex_lock(&pf->mbox.lock); in otx2_forward_vf_mbox_msgs()
404 dev_warn(pf->dev, in otx2_forward_vf_mbox_msgs()
406 /* restore PF mbase and exit */ in otx2_forward_vf_mbox_msgs()
407 dst_mdev->mbase = pf->mbox.bbuf_base; in otx2_forward_vf_mbox_msgs()
408 mutex_unlock(&pf->mbox.lock); in otx2_forward_vf_mbox_msgs()
419 otx2_forward_msg_pfvf(dst_mdev, &pf->mbox_pfvf[0].mbox, in otx2_forward_vf_mbox_msgs()
420 pf->mbox.bbuf_base, vf); in otx2_forward_vf_mbox_msgs()
421 mutex_unlock(&pf->mbox.lock); in otx2_forward_vf_mbox_msgs()
429 dst_mbox = &pf->mbox_pfvf[0]; in otx2_forward_vf_mbox_msgs()
442 dev_warn(pf->dev, in otx2_forward_vf_mbox_msgs()
450 otx2_forward_msg_pfvf(&pf->mbox_pfvf->mbox_up.dev[vf], in otx2_forward_vf_mbox_msgs()
451 &pf->mbox.mbox_up, in otx2_forward_vf_mbox_msgs()
452 pf->mbox_pfvf[vf].bbuf_base, in otx2_forward_vf_mbox_msgs()
467 struct otx2_nic *pf; in otx2_pfvf_mbox_handler() local
470 pf = vf_mbox->pfvf; in otx2_pfvf_mbox_handler()
471 vf_idx = vf_mbox - pf->mbox_pfvf; in otx2_pfvf_mbox_handler()
473 mbox = &pf->mbox_pfvf[0].mbox; in otx2_pfvf_mbox_handler()
491 err = otx2_forward_vf_mbox_msgs(pf, mbox, MBOX_DIR_PFAF, vf_idx, in otx2_pfvf_mbox_handler()
505 struct otx2_nic *pf = vf_mbox->pfvf; in otx2_pfvf_mbox_up_handler() local
512 vf_idx = vf_mbox - pf->mbox_pfvf; in otx2_pfvf_mbox_up_handler()
513 mbox = &pf->mbox_pfvf[0].mbox_up; in otx2_pfvf_mbox_up_handler()
523 dev_err(pf->dev, in otx2_pfvf_mbox_up_handler()
529 dev_err(pf->dev, in otx2_pfvf_mbox_up_handler()
540 dev_err(pf->dev, in otx2_pfvf_mbox_up_handler()
556 struct otx2_nic *pf = (struct otx2_nic *)(pf_irq); in otx2_pfvf_mbox_intr_handler() local
557 int vfs = pf->total_vfs; in otx2_pfvf_mbox_intr_handler()
561 mbox = pf->mbox_pfvf; in otx2_pfvf_mbox_intr_handler()
564 intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(1)); in otx2_pfvf_mbox_intr_handler()
565 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), intr); in otx2_pfvf_mbox_intr_handler()
566 otx2_queue_work(mbox, pf->mbox_pfvf_wq, 64, vfs, intr, in otx2_pfvf_mbox_intr_handler()
571 intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(0)); in otx2_pfvf_mbox_intr_handler()
572 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(0), intr); in otx2_pfvf_mbox_intr_handler()
574 otx2_queue_work(mbox, pf->mbox_pfvf_wq, 0, vfs, intr, TYPE_PFVF); in otx2_pfvf_mbox_intr_handler()
576 trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr); in otx2_pfvf_mbox_intr_handler()
581 static int otx2_pfvf_mbox_init(struct otx2_nic *pf, int numvfs) in otx2_pfvf_mbox_init() argument
591 pf->mbox_pfvf = devm_kcalloc(&pf->pdev->dev, numvfs, in otx2_pfvf_mbox_init()
593 if (!pf->mbox_pfvf) in otx2_pfvf_mbox_init()
596 pf->mbox_pfvf_wq = alloc_workqueue("otx2_pfvf_mailbox", in otx2_pfvf_mbox_init()
599 if (!pf->mbox_pfvf_wq) in otx2_pfvf_mbox_init()
602 /* On CN10K platform, PF <-> VF mailbox region follows after in otx2_pfvf_mbox_init()
603 * PF <-> AF mailbox region. in otx2_pfvf_mbox_init()
605 if (test_bit(CN10K_MBOX, &pf->hw.cap_flag)) in otx2_pfvf_mbox_init()
606 base = pci_resource_start(pf->pdev, PCI_MBOX_BAR_NUM) + in otx2_pfvf_mbox_init()
609 base = readq((void __iomem *)((u64)pf->reg_base + in otx2_pfvf_mbox_init()
612 hwbase = ioremap_wc(base, MBOX_SIZE * pf->total_vfs); in otx2_pfvf_mbox_init()
618 mbox = &pf->mbox_pfvf[0]; in otx2_pfvf_mbox_init()
619 err = otx2_mbox_init(&mbox->mbox, hwbase, pf->pdev, pf->reg_base, in otx2_pfvf_mbox_init()
624 err = otx2_mbox_init(&mbox->mbox_up, hwbase, pf->pdev, pf->reg_base, in otx2_pfvf_mbox_init()
630 mbox->pfvf = pf; in otx2_pfvf_mbox_init()
642 destroy_workqueue(pf->mbox_pfvf_wq); in otx2_pfvf_mbox_init()
646 static void otx2_pfvf_mbox_destroy(struct otx2_nic *pf) in otx2_pfvf_mbox_destroy() argument
648 struct mbox *mbox = &pf->mbox_pfvf[0]; in otx2_pfvf_mbox_destroy()
653 if (pf->mbox_pfvf_wq) { in otx2_pfvf_mbox_destroy()
654 destroy_workqueue(pf->mbox_pfvf_wq); in otx2_pfvf_mbox_destroy()
655 pf->mbox_pfvf_wq = NULL; in otx2_pfvf_mbox_destroy()
664 static void otx2_enable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs) in otx2_enable_pfvf_mbox_intr() argument
666 /* Clear PF <=> VF mailbox IRQ */ in otx2_enable_pfvf_mbox_intr()
667 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(0), ~0ull); in otx2_enable_pfvf_mbox_intr()
668 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), ~0ull); in otx2_enable_pfvf_mbox_intr()
670 /* Enable PF <=> VF mailbox IRQ */ in otx2_enable_pfvf_mbox_intr()
671 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_enable_pfvf_mbox_intr()
674 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(1), in otx2_enable_pfvf_mbox_intr()
679 static void otx2_disable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs) in otx2_disable_pfvf_mbox_intr() argument
683 /* Disable PF <=> VF mailbox IRQ */ in otx2_disable_pfvf_mbox_intr()
684 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), ~0ull); in otx2_disable_pfvf_mbox_intr()
685 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(1), ~0ull); in otx2_disable_pfvf_mbox_intr()
687 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(0), ~0ull); in otx2_disable_pfvf_mbox_intr()
688 vector = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFPF_MBOX0); in otx2_disable_pfvf_mbox_intr()
689 free_irq(vector, pf); in otx2_disable_pfvf_mbox_intr()
692 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), ~0ull); in otx2_disable_pfvf_mbox_intr()
693 vector = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFPF_MBOX1); in otx2_disable_pfvf_mbox_intr()
694 free_irq(vector, pf); in otx2_disable_pfvf_mbox_intr()
698 static int otx2_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs) in otx2_register_pfvf_mbox_intr() argument
700 struct otx2_hw *hw = &pf->hw; in otx2_register_pfvf_mbox_intr()
706 if (pf->pcifunc) in otx2_register_pfvf_mbox_intr()
708 "RVUPF%d_VF Mbox0", rvu_get_pf(pf->pcifunc)); in otx2_register_pfvf_mbox_intr()
711 err = request_irq(pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFPF_MBOX0), in otx2_register_pfvf_mbox_intr()
712 otx2_pfvf_mbox_intr_handler, 0, irq_name, pf); in otx2_register_pfvf_mbox_intr()
714 dev_err(pf->dev, in otx2_register_pfvf_mbox_intr()
722 if (pf->pcifunc) in otx2_register_pfvf_mbox_intr()
724 "RVUPF%d_VF Mbox1", rvu_get_pf(pf->pcifunc)); in otx2_register_pfvf_mbox_intr()
727 err = request_irq(pci_irq_vector(pf->pdev, in otx2_register_pfvf_mbox_intr()
730 0, irq_name, pf); in otx2_register_pfvf_mbox_intr()
732 dev_err(pf->dev, in otx2_register_pfvf_mbox_intr()
738 otx2_enable_pfvf_mbox_intr(pf, numvfs); in otx2_register_pfvf_mbox_intr()
743 static void otx2_process_pfaf_mbox_msg(struct otx2_nic *pf, in otx2_process_pfaf_mbox_msg() argument
749 dev_err(pf->dev, in otx2_process_pfaf_mbox_msg()
755 dev_err(pf->dev, in otx2_process_pfaf_mbox_msg()
764 struct otx2_vf_config *config = &pf->vf_configs[devid - 1]; in otx2_process_pfaf_mbox_msg()
783 pf->pcifunc = msg->pcifunc; in otx2_process_pfaf_mbox_msg()
786 mbox_handler_msix_offset(pf, (struct msix_offset_rsp *)msg); in otx2_process_pfaf_mbox_msg()
789 mbox_handler_npa_lf_alloc(pf, (struct npa_lf_alloc_rsp *)msg); in otx2_process_pfaf_mbox_msg()
792 mbox_handler_nix_lf_alloc(pf, (struct nix_lf_alloc_rsp *)msg); in otx2_process_pfaf_mbox_msg()
795 mbox_handler_nix_txsch_alloc(pf, in otx2_process_pfaf_mbox_msg()
799 mbox_handler_nix_bp_enable(pf, (struct nix_bp_cfg_rsp *)msg); in otx2_process_pfaf_mbox_msg()
802 mbox_handler_cgx_stats(pf, (struct cgx_stats_rsp *)msg); in otx2_process_pfaf_mbox_msg()
805 mbox_handler_cgx_fec_stats(pf, (struct cgx_fec_stats_rsp *)msg); in otx2_process_pfaf_mbox_msg()
809 dev_err(pf->dev, in otx2_process_pfaf_mbox_msg()
823 struct otx2_nic *pf; in otx2_pfaf_mbox_handler() local
832 pf = af_mbox->pfvf; in otx2_pfaf_mbox_handler()
836 otx2_process_pfaf_mbox_msg(pf, msg); in otx2_pfaf_mbox_handler()
845 static void otx2_handle_link_event(struct otx2_nic *pf) in otx2_handle_link_event() argument
847 struct cgx_link_user_info *linfo = &pf->linfo; in otx2_handle_link_event()
848 struct net_device *netdev = pf->netdev; in otx2_handle_link_event()
862 int otx2_mbox_up_handler_mcs_intr_notify(struct otx2_nic *pf, in otx2_mbox_up_handler_mcs_intr_notify() argument
866 cn10k_handle_mcs_event(pf, event); in otx2_mbox_up_handler_mcs_intr_notify()
871 int otx2_mbox_up_handler_cgx_link_event(struct otx2_nic *pf, in otx2_mbox_up_handler_cgx_link_event() argument
878 pf->linfo = msg->link_info; in otx2_mbox_up_handler_cgx_link_event()
881 for (i = 0; i < pci_num_vf(pf->pdev); i++) { in otx2_mbox_up_handler_cgx_link_event()
882 struct otx2_vf_config *config = &pf->vf_configs[i]; in otx2_mbox_up_handler_cgx_link_event()
892 if (pf->flags & OTX2_FLAG_INTF_DOWN) in otx2_mbox_up_handler_cgx_link_event()
895 otx2_handle_link_event(pf); in otx2_mbox_up_handler_cgx_link_event()
899 static int otx2_process_mbox_msg_up(struct otx2_nic *pf, in otx2_process_mbox_msg_up() argument
904 otx2_reply_invalid_msg(&pf->mbox.mbox_up, 0, 0, req->id); in otx2_process_mbox_msg_up()
915 &pf->mbox.mbox_up, 0, \ in otx2_process_mbox_msg_up()
926 pf, (struct _req_type *)req, rsp); \ in otx2_process_mbox_msg_up()
934 otx2_reply_invalid_msg(&pf->mbox.mbox_up, 0, 0, req->id); in otx2_process_mbox_msg_up()
945 struct otx2_nic *pf = af_mbox->pfvf; in otx2_pfaf_mbox_up_handler() local
960 otx2_process_mbox_msg_up(pf, msg); in otx2_pfaf_mbox_up_handler()
964 otx2_forward_vf_mbox_msgs(pf, &pf->mbox.mbox_up, in otx2_pfaf_mbox_up_handler()
975 struct otx2_nic *pf = (struct otx2_nic *)pf_irq; in otx2_pfaf_mbox_intr_handler() local
979 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0)); in otx2_pfaf_mbox_intr_handler()
981 mbox = &pf->mbox; in otx2_pfaf_mbox_intr_handler()
983 trace_otx2_msg_interrupt(mbox->mbox.pdev, "AF to PF", BIT_ULL(0)); in otx2_pfaf_mbox_intr_handler()
985 otx2_queue_work(mbox, pf->mbox_wq, 0, 1, 1, TYPE_PFAF); in otx2_pfaf_mbox_intr_handler()
990 static void otx2_disable_mbox_intr(struct otx2_nic *pf) in otx2_disable_mbox_intr() argument
992 int vector = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_AFPF_MBOX); in otx2_disable_mbox_intr()
994 /* Disable AF => PF mailbox IRQ */ in otx2_disable_mbox_intr()
995 otx2_write64(pf, RVU_PF_INT_ENA_W1C, BIT_ULL(0)); in otx2_disable_mbox_intr()
996 free_irq(vector, pf); in otx2_disable_mbox_intr()
999 static int otx2_register_mbox_intr(struct otx2_nic *pf, bool probe_af) in otx2_register_mbox_intr() argument
1001 struct otx2_hw *hw = &pf->hw; in otx2_register_mbox_intr()
1009 err = request_irq(pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_AFPF_MBOX), in otx2_register_mbox_intr()
1010 otx2_pfaf_mbox_intr_handler, 0, irq_name, pf); in otx2_register_mbox_intr()
1012 dev_err(pf->dev, in otx2_register_mbox_intr()
1020 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0)); in otx2_register_mbox_intr()
1021 otx2_write64(pf, RVU_PF_INT_ENA_W1S, BIT_ULL(0)); in otx2_register_mbox_intr()
1027 req = otx2_mbox_alloc_msg_ready(&pf->mbox); in otx2_register_mbox_intr()
1029 otx2_disable_mbox_intr(pf); in otx2_register_mbox_intr()
1032 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_register_mbox_intr()
1034 dev_warn(pf->dev, in otx2_register_mbox_intr()
1036 otx2_disable_mbox_intr(pf); in otx2_register_mbox_intr()
1043 static void otx2_pfaf_mbox_destroy(struct otx2_nic *pf) in otx2_pfaf_mbox_destroy() argument
1045 struct mbox *mbox = &pf->mbox; in otx2_pfaf_mbox_destroy()
1047 if (pf->mbox_wq) { in otx2_pfaf_mbox_destroy()
1048 destroy_workqueue(pf->mbox_wq); in otx2_pfaf_mbox_destroy()
1049 pf->mbox_wq = NULL; in otx2_pfaf_mbox_destroy()
1059 static int otx2_pfaf_mbox_init(struct otx2_nic *pf) in otx2_pfaf_mbox_init() argument
1061 struct mbox *mbox = &pf->mbox; in otx2_pfaf_mbox_init()
1065 mbox->pfvf = pf; in otx2_pfaf_mbox_init()
1066 pf->mbox_wq = alloc_workqueue("otx2_pfaf_mailbox", in otx2_pfaf_mbox_init()
1069 if (!pf->mbox_wq) in otx2_pfaf_mbox_init()
1073 * admin function (i.e AF) and this PF, shouldn't be mapped as in otx2_pfaf_mbox_init()
1076 hwbase = ioremap_wc(pci_resource_start(pf->pdev, PCI_MBOX_BAR_NUM), in otx2_pfaf_mbox_init()
1079 dev_err(pf->dev, "Unable to map PFAF mailbox region\n"); in otx2_pfaf_mbox_init()
1084 err = otx2_mbox_init(&mbox->mbox, hwbase, pf->pdev, pf->reg_base, in otx2_pfaf_mbox_init()
1089 err = otx2_mbox_init(&mbox->mbox_up, hwbase, pf->pdev, pf->reg_base, in otx2_pfaf_mbox_init()
1094 err = otx2_mbox_bbuf_init(mbox, pf->pdev); in otx2_pfaf_mbox_init()
1104 otx2_pfaf_mbox_destroy(pf); in otx2_pfaf_mbox_init()
1108 static int otx2_cgx_config_linkevents(struct otx2_nic *pf, bool enable) in otx2_cgx_config_linkevents() argument
1113 mutex_lock(&pf->mbox.lock); in otx2_cgx_config_linkevents()
1115 msg = otx2_mbox_alloc_msg_cgx_start_linkevents(&pf->mbox); in otx2_cgx_config_linkevents()
1117 msg = otx2_mbox_alloc_msg_cgx_stop_linkevents(&pf->mbox); in otx2_cgx_config_linkevents()
1120 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_linkevents()
1124 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_cgx_config_linkevents()
1125 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_linkevents()
1129 static int otx2_cgx_config_loopback(struct otx2_nic *pf, bool enable) in otx2_cgx_config_loopback() argument
1134 if (enable && !bitmap_empty(pf->flow_cfg->dmacflt_bmap, in otx2_cgx_config_loopback()
1135 pf->flow_cfg->dmacflt_max_flows)) in otx2_cgx_config_loopback()
1136 netdev_warn(pf->netdev, in otx2_cgx_config_loopback()
1139 mutex_lock(&pf->mbox.lock); in otx2_cgx_config_loopback()
1141 msg = otx2_mbox_alloc_msg_cgx_intlbk_enable(&pf->mbox); in otx2_cgx_config_loopback()
1143 msg = otx2_mbox_alloc_msg_cgx_intlbk_disable(&pf->mbox); in otx2_cgx_config_loopback()
1146 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_loopback()
1150 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_cgx_config_loopback()
1151 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_loopback()
1230 struct otx2_nic *pf = data; in otx2_q_intr_handler() local
1235 for (qidx = 0; qidx < pf->qset.cq_cnt; qidx++) { in otx2_q_intr_handler()
1236 ptr = otx2_get_regaddr(pf, NIX_LF_CQ_OP_INT); in otx2_q_intr_handler()
1239 otx2_write64(pf, NIX_LF_CQ_OP_INT, (qidx << 44) | in otx2_q_intr_handler()
1245 netdev_err(pf->netdev, "CQ%lld: error reading NIX_LF_CQ_OP_INT, NIX_LF_ERR_INT 0x%llx\n", in otx2_q_intr_handler()
1246 qidx, otx2_read64(pf, NIX_LF_ERR_INT)); in otx2_q_intr_handler()
1249 netdev_err(pf->netdev, "CQ%lld: Doorbell error", in otx2_q_intr_handler()
1252 netdev_err(pf->netdev, "CQ%lld: Memory fault on CQE write to LLC/DRAM", in otx2_q_intr_handler()
1256 schedule_work(&pf->reset_task); in otx2_q_intr_handler()
1260 for (qidx = 0; qidx < pf->hw.tot_tx_queues; qidx++) { in otx2_q_intr_handler()
1269 ptr = otx2_get_regaddr(pf, NIX_LF_SQ_OP_INT); in otx2_q_intr_handler()
1271 otx2_write64(pf, NIX_LF_SQ_OP_INT, (qidx << 44) | in otx2_q_intr_handler()
1275 netdev_err(pf->netdev, "SQ%lld: error reading NIX_LF_SQ_OP_INT, NIX_LF_ERR_INT 0x%llx\n", in otx2_q_intr_handler()
1276 qidx, otx2_read64(pf, NIX_LF_ERR_INT)); in otx2_q_intr_handler()
1280 sq_op_err_dbg = otx2_read64(pf, NIX_LF_SQ_OP_ERR_DBG); in otx2_q_intr_handler()
1285 netdev_err(pf->netdev, "SQ%lld: NIX_LF_SQ_OP_ERR_DBG(%llx) err=%s\n", in otx2_q_intr_handler()
1288 otx2_write64(pf, NIX_LF_SQ_OP_ERR_DBG, BIT_ULL(44)); in otx2_q_intr_handler()
1298 mnq_err_dbg = otx2_read64(pf, NIX_LF_MNQ_ERR_DBG); in otx2_q_intr_handler()
1303 netdev_err(pf->netdev, "SQ%lld: NIX_LF_MNQ_ERR_DBG(%llx) err=%s\n", in otx2_q_intr_handler()
1305 otx2_write64(pf, NIX_LF_MNQ_ERR_DBG, BIT_ULL(44)); in otx2_q_intr_handler()
1308 snd_err_dbg = otx2_read64(pf, NIX_LF_SEND_ERR_DBG); in otx2_q_intr_handler()
1311 netdev_err(pf->netdev, "SQ%lld: NIX_LF_SND_ERR_DBG:0x%llx err=%s\n", in otx2_q_intr_handler()
1313 otx2_write64(pf, NIX_LF_SEND_ERR_DBG, BIT_ULL(44)); in otx2_q_intr_handler()
1319 netdev_err(pf->netdev, "SQ%lld: SQB allocation failed", in otx2_q_intr_handler()
1322 schedule_work(&pf->reset_task); in otx2_q_intr_handler()
1331 struct otx2_nic *pf = (struct otx2_nic *)cq_poll->dev; in otx2_cq_intr_handler() local
1339 otx2_write64(pf, NIX_LF_CINTX_ENA_W1C(qidx), BIT_ULL(0)); in otx2_cq_intr_handler()
1342 pf->napi_events++; in otx2_cq_intr_handler()
1348 static void otx2_disable_napi(struct otx2_nic *pf) in otx2_disable_napi() argument
1350 struct otx2_qset *qset = &pf->qset; in otx2_disable_napi()
1354 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_disable_napi()
1362 static void otx2_free_cq_res(struct otx2_nic *pf) in otx2_free_cq_res() argument
1364 struct otx2_qset *qset = &pf->qset; in otx2_free_cq_res()
1369 otx2_ctx_disable(&pf->mbox, NIX_AQ_CTYPE_CQ, false); in otx2_free_cq_res()
1372 qmem_free(pf->dev, cq->cqe); in otx2_free_cq_res()
1376 static void otx2_free_sq_res(struct otx2_nic *pf) in otx2_free_sq_res() argument
1378 struct otx2_qset *qset = &pf->qset; in otx2_free_sq_res()
1383 otx2_ctx_disable(&pf->mbox, NIX_AQ_CTYPE_SQ, false); in otx2_free_sq_res()
1385 otx2_sq_free_sqbs(pf); in otx2_free_sq_res()
1386 for (qidx = 0; qidx < pf->hw.tot_tx_queues; qidx++) { in otx2_free_sq_res()
1388 qmem_free(pf->dev, sq->sqe); in otx2_free_sq_res()
1389 qmem_free(pf->dev, sq->tso_hdrs); in otx2_free_sq_res()
1395 static int otx2_get_rbuf_size(struct otx2_nic *pf, int mtu) in otx2_get_rbuf_size() argument
1401 if (pf->hw.rbuf_len) in otx2_get_rbuf_size()
1402 return ALIGN(pf->hw.rbuf_len, OTX2_ALIGN) + OTX2_HEAD_ROOM; in otx2_get_rbuf_size()
1423 static int otx2_init_hw_resources(struct otx2_nic *pf) in otx2_init_hw_resources() argument
1426 struct mbox *mbox = &pf->mbox; in otx2_init_hw_resources()
1427 struct otx2_hw *hw = &pf->hw; in otx2_init_hw_resources()
1440 pf->tx_max_pktlen = pf->netdev->max_mtu + OTX2_ETH_HLEN; in otx2_init_hw_resources()
1442 pf->rbsize = otx2_get_rbuf_size(pf, pf->netdev->mtu); in otx2_init_hw_resources()
1446 err = otx2_config_npa(pf); in otx2_init_hw_resources()
1451 err = otx2_config_nix(pf); in otx2_init_hw_resources()
1456 otx2_nix_config_bp(pf, true); in otx2_init_hw_resources()
1459 err = otx2_rq_aura_pool_init(pf); in otx2_init_hw_resources()
1465 err = otx2_sq_aura_pool_init(pf); in otx2_init_hw_resources()
1471 err = otx2_txsch_alloc(pf); in otx2_init_hw_resources()
1478 if (pf->pfc_en) { in otx2_init_hw_resources()
1479 err = otx2_pfc_txschq_alloc(pf); in otx2_init_hw_resources()
1487 err = otx2_config_nix_queues(pf); in otx2_init_hw_resources()
1494 err = otx2_txschq_config(pf, lvl, 0, false); in otx2_init_hw_resources()
1502 if (pf->pfc_en) { in otx2_init_hw_resources()
1503 err = otx2_pfc_txschq_config(pf); in otx2_init_hw_resources()
1515 otx2_free_sq_res(pf); in otx2_init_hw_resources()
1516 otx2_free_cq_res(pf); in otx2_init_hw_resources()
1519 if (otx2_txschq_stop(pf)) in otx2_init_hw_resources()
1520 dev_err(pf->dev, "%s failed to stop TX schedulers\n", __func__); in otx2_init_hw_resources()
1522 otx2_sq_free_sqbs(pf); in otx2_init_hw_resources()
1524 otx2_free_aura_ptr(pf, AURA_NIX_RQ); in otx2_init_hw_resources()
1527 otx2_aura_pool_free(pf); in otx2_init_hw_resources()
1534 dev_err(pf->dev, "%s failed to free nixlf\n", __func__); in otx2_init_hw_resources()
1541 dev_err(pf->dev, "%s failed to free npalf\n", __func__); in otx2_init_hw_resources()
1548 static void otx2_free_hw_resources(struct otx2_nic *pf) in otx2_free_hw_resources() argument
1550 struct otx2_qset *qset = &pf->qset; in otx2_free_hw_resources()
1552 struct mbox *mbox = &pf->mbox; in otx2_free_hw_resources()
1558 otx2_sqb_flush(pf); in otx2_free_hw_resources()
1561 err = otx2_txschq_stop(pf); in otx2_free_hw_resources()
1563 dev_err(pf->dev, "RVUPF: Failed to stop/free TX schedulers\n"); in otx2_free_hw_resources()
1566 if (pf->pfc_en) in otx2_free_hw_resources()
1567 otx2_pfc_txschq_stop(pf); in otx2_free_hw_resources()
1572 if (!(pf->pcifunc & RVU_PFVF_FUNC_MASK)) in otx2_free_hw_resources()
1573 otx2_nix_config_bp(pf, false); in otx2_free_hw_resources()
1583 otx2_cleanup_rx_cqes(pf, cq); in otx2_free_hw_resources()
1585 otx2_cleanup_tx_cqes(pf, cq); in otx2_free_hw_resources()
1588 otx2_free_sq_res(pf); in otx2_free_hw_resources()
1591 otx2_free_aura_ptr(pf, AURA_NIX_RQ); in otx2_free_hw_resources()
1593 otx2_free_cq_res(pf); in otx2_free_hw_resources()
1596 cn10k_free_all_ipolicers(pf); in otx2_free_hw_resources()
1603 if (!(pf->flags & OTX2_FLAG_PF_SHUTDOWN)) in otx2_free_hw_resources()
1606 dev_err(pf->dev, "%s failed to free nixlf\n", __func__); in otx2_free_hw_resources()
1613 otx2_aura_pool_free(pf); in otx2_free_hw_resources()
1620 dev_err(pf->dev, "%s failed to free npalf\n", __func__); in otx2_free_hw_resources()
1625 static void otx2_do_set_rx_mode(struct otx2_nic *pf) in otx2_do_set_rx_mode() argument
1627 struct net_device *netdev = pf->netdev; in otx2_do_set_rx_mode()
1643 mutex_lock(&pf->mbox.lock); in otx2_do_set_rx_mode()
1644 req = otx2_mbox_alloc_msg_nix_set_rx_mode(&pf->mbox); in otx2_do_set_rx_mode()
1646 mutex_unlock(&pf->mbox.lock); in otx2_do_set_rx_mode()
1659 otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_rx_mode()
1660 mutex_unlock(&pf->mbox.lock); in otx2_do_set_rx_mode()
1683 struct otx2_nic *pf = netdev_priv(netdev); in otx2_open() local
1685 struct otx2_qset *qset = &pf->qset; in otx2_open()
1691 pf->qset.cq_cnt = pf->hw.rx_queues + pf->hw.tot_tx_queues; in otx2_open()
1695 pf->hw.cint_cnt = max(pf->hw.rx_queues, pf->hw.tx_queues); in otx2_open()
1696 qset->napi = kcalloc(pf->hw.cint_cnt, sizeof(*cq_poll), GFP_KERNEL); in otx2_open()
1706 qset->cq = kcalloc(pf->qset.cq_cnt, in otx2_open()
1711 qset->sq = kcalloc(pf->hw.tot_tx_queues, in otx2_open()
1716 qset->rq = kcalloc(pf->hw.rx_queues, in otx2_open()
1721 err = otx2_init_hw_resources(pf); in otx2_open()
1726 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_open()
1735 (qidx < pf->hw.rx_queues) ? qidx : CINT_INVALID_CQ; in otx2_open()
1736 cq_poll->cq_ids[CQ_TX] = (qidx < pf->hw.tx_queues) ? in otx2_open()
1737 qidx + pf->hw.rx_queues : CINT_INVALID_CQ; in otx2_open()
1738 if (pf->xdp_prog) in otx2_open()
1739 cq_poll->cq_ids[CQ_XDP] = (qidx < pf->hw.xdp_queues) ? in otx2_open()
1740 (qidx + pf->hw.rx_queues + in otx2_open()
1741 pf->hw.tx_queues) : in otx2_open()
1746 cq_poll->dev = (void *)pf; in otx2_open()
1754 err = otx2_hw_set_mtu(pf, netdev->mtu); in otx2_open()
1759 otx2_setup_segmentation(pf); in otx2_open()
1762 err = otx2_rss_init(pf); in otx2_open()
1767 vec = pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START; in otx2_open()
1768 irq_name = &pf->hw.irq_name[vec * NAME_SIZE]; in otx2_open()
1770 snprintf(irq_name, NAME_SIZE, "%s-qerr", pf->netdev->name); in otx2_open()
1772 err = request_irq(pci_irq_vector(pf->pdev, vec), in otx2_open()
1773 otx2_q_intr_handler, 0, irq_name, pf); in otx2_open()
1775 dev_err(pf->dev, in otx2_open()
1777 rvu_get_pf(pf->pcifunc)); in otx2_open()
1782 otx2_write64(pf, NIX_LF_QINTX_ENA_W1S(0), BIT_ULL(0)); in otx2_open()
1785 vec = pf->hw.nix_msixoff + NIX_LF_CINT_VEC_START; in otx2_open()
1786 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_open()
1787 irq_name = &pf->hw.irq_name[vec * NAME_SIZE]; in otx2_open()
1789 snprintf(irq_name, NAME_SIZE, "%s-rxtx-%d", pf->netdev->name, in otx2_open()
1792 err = request_irq(pci_irq_vector(pf->pdev, vec), in otx2_open()
1796 dev_err(pf->dev, in otx2_open()
1798 rvu_get_pf(pf->pcifunc), qidx); in otx2_open()
1803 otx2_config_irq_coalescing(pf, qidx); in otx2_open()
1806 otx2_write64(pf, NIX_LF_CINTX_INT(qidx), BIT_ULL(0)); in otx2_open()
1807 otx2_write64(pf, NIX_LF_CINTX_ENA_W1S(qidx), BIT_ULL(0)); in otx2_open()
1810 otx2_set_cints_affinity(pf); in otx2_open()
1812 if (pf->flags & OTX2_FLAG_RX_VLAN_SUPPORT) in otx2_open()
1813 otx2_enable_rxvlan(pf, true); in otx2_open()
1816 if (pf->flags & OTX2_FLAG_TX_TSTAMP_ENABLED) { in otx2_open()
1817 pf->flags &= ~OTX2_FLAG_TX_TSTAMP_ENABLED; in otx2_open()
1818 otx2_config_hw_tx_tstamp(pf, true); in otx2_open()
1820 if (pf->flags & OTX2_FLAG_RX_TSTAMP_ENABLED) { in otx2_open()
1821 pf->flags &= ~OTX2_FLAG_RX_TSTAMP_ENABLED; in otx2_open()
1822 otx2_config_hw_rx_tstamp(pf, true); in otx2_open()
1825 pf->flags &= ~OTX2_FLAG_INTF_DOWN; in otx2_open()
1830 if (pf->linfo.link_up && !(pf->pcifunc & RVU_PFVF_FUNC_MASK)) in otx2_open()
1831 otx2_handle_link_event(pf); in otx2_open()
1834 if (pf->flags & OTX2_FLAG_DMACFLTR_SUPPORT) in otx2_open()
1835 otx2_dmacflt_reinstall_flows(pf); in otx2_open()
1837 err = otx2_rxtx_enable(pf, true); in otx2_open()
1841 otx2_do_set_rx_mode(pf); in otx2_open()
1848 pf->flags |= OTX2_FLAG_INTF_DOWN; in otx2_open()
1850 otx2_free_cints(pf, qidx); in otx2_open()
1851 vec = pci_irq_vector(pf->pdev, in otx2_open()
1852 pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START); in otx2_open()
1853 otx2_write64(pf, NIX_LF_QINTX_ENA_W1C(0), BIT_ULL(0)); in otx2_open()
1854 free_irq(vec, pf); in otx2_open()
1856 otx2_disable_napi(pf); in otx2_open()
1857 otx2_free_hw_resources(pf); in otx2_open()
1869 struct otx2_nic *pf = netdev_priv(netdev); in otx2_stop() local
1871 struct otx2_qset *qset = &pf->qset; in otx2_stop()
1876 if (pf->flags & OTX2_FLAG_INTF_DOWN) in otx2_stop()
1882 pf->flags |= OTX2_FLAG_INTF_DOWN; in otx2_stop()
1887 otx2_rxtx_enable(pf, false); in otx2_stop()
1890 rss = &pf->hw.rss_info; in otx2_stop()
1894 vec = pci_irq_vector(pf->pdev, in otx2_stop()
1895 pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START); in otx2_stop()
1896 otx2_write64(pf, NIX_LF_QINTX_ENA_W1C(0), BIT_ULL(0)); in otx2_stop()
1897 free_irq(vec, pf); in otx2_stop()
1900 vec = pf->hw.nix_msixoff + NIX_LF_CINT_VEC_START; in otx2_stop()
1901 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_stop()
1903 otx2_write64(pf, NIX_LF_CINTX_ENA_W1C(qidx), BIT_ULL(0)); in otx2_stop()
1905 synchronize_irq(pci_irq_vector(pf->pdev, vec)); in otx2_stop()
1914 otx2_free_hw_resources(pf); in otx2_stop()
1915 otx2_free_cints(pf, pf->hw.cint_cnt); in otx2_stop()
1916 otx2_disable_napi(pf); in otx2_stop()
1921 for (wrk = 0; wrk < pf->qset.cq_cnt; wrk++) in otx2_stop()
1922 cancel_delayed_work_sync(&pf->refill_wrk[wrk].pool_refill_work); in otx2_stop()
1923 devm_kfree(pf->dev, pf->refill_wrk); in otx2_stop()
1937 struct otx2_nic *pf = netdev_priv(netdev); in otx2_xmit() local
1944 (!skb_shinfo(skb)->gso_size && skb->len > pf->tx_max_pktlen)) { in otx2_xmit()
1949 sq = &pf->qset.sq[qidx]; in otx2_xmit()
1971 struct otx2_nic *pf = netdev_priv(netdev); in otx2_select_queue() local
1980 if ((vlan_prio > pf->hw.tx_queues - 1) || in otx2_select_queue()
1981 !pf->pfc_alloc_status[vlan_prio]) in otx2_select_queue()
2004 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_rx_mode() local
2006 queue_work(pf->otx2_wq, &pf->rx_mode_work); in otx2_set_rx_mode()
2011 struct otx2_nic *pf = container_of(work, struct otx2_nic, rx_mode_work); in otx2_rx_mode_wrk_handler() local
2013 otx2_do_set_rx_mode(pf); in otx2_rx_mode_wrk_handler()
2020 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_features() local
2023 return otx2_cgx_config_loopback(pf, in otx2_set_features()
2027 return otx2_enable_rxvlan(pf, in otx2_set_features()
2035 struct otx2_nic *pf = container_of(work, struct otx2_nic, reset_task); in otx2_reset_task() local
2037 if (!netif_running(pf->netdev)) in otx2_reset_task()
2041 otx2_stop(pf->netdev); in otx2_reset_task()
2042 pf->reset_count++; in otx2_reset_task()
2043 otx2_open(pf->netdev); in otx2_reset_task()
2044 netif_trans_update(pf->netdev); in otx2_reset_task()
2194 static int otx2_do_set_vf_mac(struct otx2_nic *pf, int vf, const u8 *mac) in otx2_do_set_vf_mac() argument
2199 mutex_lock(&pf->mbox.lock); in otx2_do_set_vf_mac()
2200 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox); in otx2_do_set_vf_mac()
2209 req->channel = pf->hw.rx_chan_base; in otx2_do_set_vf_mac()
2216 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_mac()
2218 mutex_unlock(&pf->mbox.lock); in otx2_do_set_vf_mac()
2224 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_vf_mac() local
2225 struct pci_dev *pdev = pf->pdev; in otx2_set_vf_mac()
2232 if (vf >= pf->total_vfs) in otx2_set_vf_mac()
2238 config = &pf->vf_configs[vf]; in otx2_set_vf_mac()
2241 ret = otx2_do_set_vf_mac(pf, vf, mac); in otx2_set_vf_mac()
2249 static int otx2_do_set_vf_vlan(struct otx2_nic *pf, int vf, u16 vlan, u8 qos, in otx2_do_set_vf_vlan() argument
2252 struct otx2_flow_config *flow_cfg = pf->flow_cfg; in otx2_do_set_vf_vlan()
2261 config = &pf->vf_configs[vf]; in otx2_do_set_vf_vlan()
2266 mutex_lock(&pf->mbox.lock); in otx2_do_set_vf_vlan()
2270 vtag_req = otx2_mbox_alloc_msg_nix_vtag_cfg(&pf->mbox); in otx2_do_set_vf_vlan()
2279 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2286 del_req = otx2_mbox_alloc_msg_npc_delete_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2294 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2299 del_req = otx2_mbox_alloc_msg_npc_delete_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2307 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2313 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2326 req->channel = pf->hw.rx_chan_base; in otx2_do_set_vf_vlan()
2334 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2339 vtag_req = otx2_mbox_alloc_msg_nix_vtag_cfg(&pf->mbox); in otx2_do_set_vf_vlan()
2351 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2356 (&pf->mbox.mbox, 0, &vtag_req->hdr); in otx2_do_set_vf_vlan()
2363 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2373 req->channel = pf->hw.tx_chan_base; in otx2_do_set_vf_vlan()
2381 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2384 mutex_unlock(&pf->mbox.lock); in otx2_do_set_vf_vlan()
2391 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_vf_vlan() local
2392 struct pci_dev *pdev = pf->pdev; in otx2_set_vf_vlan()
2407 if (!(pf->flags & OTX2_FLAG_VF_VLAN_SUPPORT)) in otx2_set_vf_vlan()
2410 return otx2_do_set_vf_vlan(pf, vf, vlan, qos, proto); in otx2_set_vf_vlan()
2416 struct otx2_nic *pf = netdev_priv(netdev); in otx2_get_vf_config() local
2417 struct pci_dev *pdev = pf->pdev; in otx2_get_vf_config()
2426 config = &pf->vf_configs[vf]; in otx2_get_vf_config()
2435 static int otx2_xdp_xmit_tx(struct otx2_nic *pf, struct xdp_frame *xdpf, in otx2_xdp_xmit_tx() argument
2442 dma_addr = otx2_dma_map_page(pf, virt_to_page(xdpf->data), in otx2_xdp_xmit_tx()
2445 if (dma_mapping_error(pf->dev, dma_addr)) in otx2_xdp_xmit_tx()
2448 err = otx2_xdp_sq_append_pkt(pf, dma_addr, xdpf->len, qidx); in otx2_xdp_xmit_tx()
2450 otx2_dma_unmap_page(pf, dma_addr, xdpf->len, DMA_TO_DEVICE); in otx2_xdp_xmit_tx()
2461 struct otx2_nic *pf = netdev_priv(netdev); in otx2_xdp_xmit() local
2469 qidx += pf->hw.tx_queues; in otx2_xdp_xmit()
2470 sq = pf->xdp_prog ? &pf->qset.sq[qidx] : NULL; in otx2_xdp_xmit()
2483 err = otx2_xdp_xmit_tx(pf, xdpf, qidx); in otx2_xdp_xmit()
2490 static int otx2_xdp_setup(struct otx2_nic *pf, struct bpf_prog *prog) in otx2_xdp_setup() argument
2492 struct net_device *dev = pf->netdev; in otx2_xdp_setup()
2493 bool if_up = netif_running(pf->netdev); in otx2_xdp_setup()
2502 otx2_stop(pf->netdev); in otx2_xdp_setup()
2504 old_prog = xchg(&pf->xdp_prog, prog); in otx2_xdp_setup()
2509 if (pf->xdp_prog) in otx2_xdp_setup()
2510 bpf_prog_add(pf->xdp_prog, pf->hw.rx_queues - 1); in otx2_xdp_setup()
2515 if (pf->xdp_prog) in otx2_xdp_setup()
2516 pf->hw.xdp_queues = pf->hw.rx_queues; in otx2_xdp_setup()
2518 pf->hw.xdp_queues = 0; in otx2_xdp_setup()
2520 pf->hw.tot_tx_queues += pf->hw.xdp_queues; in otx2_xdp_setup()
2523 otx2_open(pf->netdev); in otx2_xdp_setup()
2530 struct otx2_nic *pf = netdev_priv(netdev); in otx2_xdp() local
2534 return otx2_xdp_setup(pf, xdp->prog); in otx2_xdp()
2540 static int otx2_set_vf_permissions(struct otx2_nic *pf, int vf, in otx2_set_vf_permissions() argument
2546 mutex_lock(&pf->mbox.lock); in otx2_set_vf_permissions()
2547 req = otx2_mbox_alloc_msg_set_vf_perm(&pf->mbox); in otx2_set_vf_permissions()
2557 if (pf->vf_configs[vf].trusted) in otx2_set_vf_permissions()
2562 rc = otx2_sync_mbox_msg(&pf->mbox); in otx2_set_vf_permissions()
2564 mutex_unlock(&pf->mbox.lock); in otx2_set_vf_permissions()
2571 struct otx2_nic *pf = netdev_priv(netdev); in otx2_ndo_set_vf_trust() local
2572 struct pci_dev *pdev = pf->pdev; in otx2_ndo_set_vf_trust()
2578 if (pf->vf_configs[vf].trusted == enable) in otx2_ndo_set_vf_trust()
2581 pf->vf_configs[vf].trusted = enable; in otx2_ndo_set_vf_trust()
2582 rc = otx2_set_vf_permissions(pf, vf, OTX2_TRUSTED_VF); in otx2_ndo_set_vf_trust()
2585 pf->vf_configs[vf].trusted = !enable; in otx2_ndo_set_vf_trust()
2587 netdev_info(pf->netdev, "VF %d is %strusted\n", in otx2_ndo_set_vf_trust()
2614 static int otx2_wq_init(struct otx2_nic *pf) in otx2_wq_init() argument
2616 pf->otx2_wq = create_singlethread_workqueue("otx2_wq"); in otx2_wq_init()
2617 if (!pf->otx2_wq) in otx2_wq_init()
2620 INIT_WORK(&pf->rx_mode_work, otx2_rx_mode_wrk_handler); in otx2_wq_init()
2621 INIT_WORK(&pf->reset_task, otx2_reset_task); in otx2_wq_init()
2643 static int otx2_realloc_msix_vectors(struct otx2_nic *pf) in otx2_realloc_msix_vectors() argument
2645 struct otx2_hw *hw = &pf->hw; in otx2_realloc_msix_vectors()
2654 otx2_disable_mbox_intr(pf); in otx2_realloc_msix_vectors()
2658 dev_err(pf->dev, "%s: Failed to realloc %d IRQ vectors\n", in otx2_realloc_msix_vectors()
2663 return otx2_register_mbox_intr(pf, false); in otx2_realloc_msix_vectors()
2666 static int otx2_sriov_vfcfg_init(struct otx2_nic *pf) in otx2_sriov_vfcfg_init() argument
2670 pf->vf_configs = devm_kcalloc(pf->dev, pf->total_vfs, in otx2_sriov_vfcfg_init()
2673 if (!pf->vf_configs) in otx2_sriov_vfcfg_init()
2676 for (i = 0; i < pf->total_vfs; i++) { in otx2_sriov_vfcfg_init()
2677 pf->vf_configs[i].pf = pf; in otx2_sriov_vfcfg_init()
2678 pf->vf_configs[i].intf_down = true; in otx2_sriov_vfcfg_init()
2679 pf->vf_configs[i].trusted = false; in otx2_sriov_vfcfg_init()
2680 INIT_DELAYED_WORK(&pf->vf_configs[i].link_event_work, in otx2_sriov_vfcfg_init()
2687 static void otx2_sriov_vfcfg_cleanup(struct otx2_nic *pf) in otx2_sriov_vfcfg_cleanup() argument
2691 if (!pf->vf_configs) in otx2_sriov_vfcfg_cleanup()
2694 for (i = 0; i < pf->total_vfs; i++) { in otx2_sriov_vfcfg_cleanup()
2695 cancel_delayed_work_sync(&pf->vf_configs[i].link_event_work); in otx2_sriov_vfcfg_cleanup()
2696 otx2_set_vf_permissions(pf, i, OTX2_RESET_VF_PERM); in otx2_sriov_vfcfg_cleanup()
2704 struct otx2_nic *pf; in otx2_probe() local
2732 netdev = alloc_etherdev_mqs(sizeof(*pf), qcount, qcount); in otx2_probe()
2740 pf = netdev_priv(netdev); in otx2_probe()
2741 pf->netdev = netdev; in otx2_probe()
2742 pf->pdev = pdev; in otx2_probe()
2743 pf->dev = dev; in otx2_probe()
2744 pf->total_vfs = pci_sriov_get_totalvfs(pdev); in otx2_probe()
2745 pf->flags |= OTX2_FLAG_INTF_DOWN; in otx2_probe()
2747 hw = &pf->hw; in otx2_probe()
2773 pf->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); in otx2_probe()
2774 if (!pf->reg_base) { in otx2_probe()
2780 err = otx2_check_pf_usable(pf); in otx2_probe()
2792 otx2_setup_dev_hw_settings(pf); in otx2_probe()
2794 /* Init PF <=> AF mailbox stuff */ in otx2_probe()
2795 err = otx2_pfaf_mbox_init(pf); in otx2_probe()
2800 err = otx2_register_mbox_intr(pf, true); in otx2_probe()
2804 /* Request AF to attach NPA and NIX LFs to this PF. in otx2_probe()
2805 * NIX and NPA LFs are needed for this PF to function as a NIC. in otx2_probe()
2807 err = otx2_attach_npa_nix(pf); in otx2_probe()
2811 err = otx2_realloc_msix_vectors(pf); in otx2_probe()
2819 err = cn10k_lmtst_init(pf); in otx2_probe()
2827 otx2_ptp_init(pf); in otx2_probe()
2840 pf->iommu_domain = iommu_get_domain_for_dev(dev); in otx2_probe()
2848 err = otx2_mcam_flow_init(pf); in otx2_probe()
2852 err = cn10k_mcs_init(pf); in otx2_probe()
2856 if (pf->flags & OTX2_FLAG_NTUPLE_SUPPORT) in otx2_probe()
2859 if (pf->flags & OTX2_FLAG_UCAST_FLTR_SUPPORT) in otx2_probe()
2866 if (pf->flags & OTX2_FLAG_RX_VLAN_SUPPORT) in otx2_probe()
2872 if (pf->flags & OTX2_FLAG_TC_FLOWER_SUPPORT) in otx2_probe()
2883 netdev->max_mtu = otx2_get_max_mtu(pf); in otx2_probe()
2891 err = otx2_wq_init(pf); in otx2_probe()
2897 err = otx2_init_tc(pf); in otx2_probe()
2901 err = otx2_register_dl(pf); in otx2_probe()
2906 err = otx2_sriov_vfcfg_init(pf); in otx2_probe()
2911 otx2_cgx_config_linkevents(pf, true); in otx2_probe()
2922 otx2_shutdown_tc(pf); in otx2_probe()
2924 otx2_mcam_flow_del(pf); in otx2_probe()
2928 cn10k_mcs_free(pf); in otx2_probe()
2930 otx2_mcam_flow_del(pf); in otx2_probe()
2932 otx2_ptp_destroy(pf); in otx2_probe()
2934 if (pf->hw.lmt_info) in otx2_probe()
2935 free_percpu(pf->hw.lmt_info); in otx2_probe()
2936 if (test_bit(CN10K_LMTST, &pf->hw.cap_flag)) in otx2_probe()
2937 qmem_free(pf->dev, pf->dync_lmt); in otx2_probe()
2938 otx2_detach_resources(&pf->mbox); in otx2_probe()
2940 otx2_disable_mbox_intr(pf); in otx2_probe()
2942 otx2_pfaf_mbox_destroy(pf); in otx2_probe()
2958 struct otx2_nic *pf; in otx2_vf_link_event_task() local
2963 vf_idx = config - config->pf->vf_configs; in otx2_vf_link_event_task()
2964 pf = config->pf; in otx2_vf_link_event_task()
2966 msghdr = otx2_mbox_alloc_msg_rsp(&pf->mbox_pfvf[0].mbox_up, vf_idx, in otx2_vf_link_event_task()
2969 dev_err(pf->dev, "Failed to create VF%d link event\n", vf_idx); in otx2_vf_link_event_task()
2976 memcpy(&req->link_info, &pf->linfo, sizeof(req->link_info)); in otx2_vf_link_event_task()
2978 otx2_sync_mbox_up_msg(&pf->mbox_pfvf[0], vf_idx); in otx2_vf_link_event_task()
2984 struct otx2_nic *pf = netdev_priv(netdev); in otx2_sriov_enable() local
2987 /* Init PF <=> VF mailbox stuff */ in otx2_sriov_enable()
2988 ret = otx2_pfvf_mbox_init(pf, numvfs); in otx2_sriov_enable()
2992 ret = otx2_register_pfvf_mbox_intr(pf, numvfs); in otx2_sriov_enable()
2996 ret = otx2_pf_flr_init(pf, numvfs); in otx2_sriov_enable()
3000 ret = otx2_register_flr_me_intr(pf, numvfs); in otx2_sriov_enable()
3010 otx2_disable_flr_me_intr(pf); in otx2_sriov_enable()
3012 otx2_flr_wq_destroy(pf); in otx2_sriov_enable()
3014 otx2_disable_pfvf_mbox_intr(pf, numvfs); in otx2_sriov_enable()
3016 otx2_pfvf_mbox_destroy(pf); in otx2_sriov_enable()
3023 struct otx2_nic *pf = netdev_priv(netdev); in otx2_sriov_disable() local
3031 otx2_disable_flr_me_intr(pf); in otx2_sriov_disable()
3032 otx2_flr_wq_destroy(pf); in otx2_sriov_disable()
3033 otx2_disable_pfvf_mbox_intr(pf, numvfs); in otx2_sriov_disable()
3034 otx2_pfvf_mbox_destroy(pf); in otx2_sriov_disable()
3050 struct otx2_nic *pf; in otx2_remove() local
3055 pf = netdev_priv(netdev); in otx2_remove()
3057 pf->flags |= OTX2_FLAG_PF_SHUTDOWN; in otx2_remove()
3059 if (pf->flags & OTX2_FLAG_TX_TSTAMP_ENABLED) in otx2_remove()
3060 otx2_config_hw_tx_tstamp(pf, false); in otx2_remove()
3061 if (pf->flags & OTX2_FLAG_RX_TSTAMP_ENABLED) in otx2_remove()
3062 otx2_config_hw_rx_tstamp(pf, false); in otx2_remove()
3065 if (pf->flags & OTX2_FLAG_RX_PAUSE_ENABLED || in otx2_remove()
3066 (pf->flags & OTX2_FLAG_TX_PAUSE_ENABLED)) { in otx2_remove()
3067 pf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED; in otx2_remove()
3068 pf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED; in otx2_remove()
3069 otx2_config_pause_frm(pf); in otx2_remove()
3072 cn10k_mcs_free(pf); in otx2_remove()
3076 if (pf->pfc_en) { in otx2_remove()
3077 pf->pfc_en = 0; in otx2_remove()
3078 otx2_config_priority_flow_ctrl(pf); in otx2_remove()
3081 cancel_work_sync(&pf->reset_task); in otx2_remove()
3083 otx2_cgx_config_linkevents(pf, false); in otx2_remove()
3085 otx2_unregister_dl(pf); in otx2_remove()
3087 otx2_sriov_disable(pf->pdev); in otx2_remove()
3088 otx2_sriov_vfcfg_cleanup(pf); in otx2_remove()
3089 if (pf->otx2_wq) in otx2_remove()
3090 destroy_workqueue(pf->otx2_wq); in otx2_remove()
3092 otx2_ptp_destroy(pf); in otx2_remove()
3093 otx2_mcam_flow_del(pf); in otx2_remove()
3094 otx2_shutdown_tc(pf); in otx2_remove()
3095 otx2_detach_resources(&pf->mbox); in otx2_remove()
3096 if (pf->hw.lmt_info) in otx2_remove()
3097 free_percpu(pf->hw.lmt_info); in otx2_remove()
3098 if (test_bit(CN10K_LMTST, &pf->hw.cap_flag)) in otx2_remove()
3099 qmem_free(pf->dev, pf->dync_lmt); in otx2_remove()
3100 otx2_disable_mbox_intr(pf); in otx2_remove()
3101 otx2_pfaf_mbox_destroy(pf); in otx2_remove()
3102 pci_free_irq_vectors(pf->pdev); in otx2_remove()