Lines Matching refs:BLKADDR_RVUM

306 		cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16));  in rvu_get_blkaddr()
314 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
322 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
330 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
400 rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum << 16), num_lfs); in rvu_update_rsrc_map()
413 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_pf_numvfs()
429 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_hwvf()
457 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in is_pf_func_valid()
469 if (blkaddr < BLKADDR_RVUM || blkaddr >= BLK_COUNT) in is_block_implemented()
494 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_rvum_blk_revid()
501 rvu_write64(rvu, BLKADDR_RVUM, in rvu_clear_rvum_blk_revid()
615 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_setup_msix_resources()
624 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_MSIX_CFG(pf)); in rvu_setup_msix_resources()
649 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(pf)); in rvu_setup_msix_resources()
653 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
660 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
680 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
685 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
695 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST); in rvu_setup_msix_resources()
700 phy_addr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE); in rvu_setup_msix_resources()
709 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, (u64)iova); in rvu_setup_msix_resources()
719 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, in rvu_reset_msix()
755 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST); in rvu_free_hw_resources()
933 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST); in rvu_setup_hw_resources()
1332 for (blkaddr = BLKADDR_RVUM; blkaddr < BLK_COUNT; blkaddr++) { in rvu_get_blkaddr_from_slot()
1992 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_mbox_handler_vf_flr()
2290 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions()
2311 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions()
2314 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions()
2490 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT); in rvu_mbox_intr_handler()
2492 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT, intr); in rvu_mbox_intr_handler()
2525 rvu_write64(rvu, BLKADDR_RVUM, in rvu_enable_mbox_intr()
2529 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1S, in rvu_enable_mbox_intr()
2628 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_flr_handler()
2638 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND, BIT_ULL(pf)); in rvu_flr_handler()
2641 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, BIT_ULL(pf)); in rvu_flr_handler()
2674 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT); in rvu_flr_intr_handler()
2681 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT, in rvu_flr_intr_handler()
2684 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C, in rvu_flr_intr_handler()
2723 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT); in rvu_me_vf_intr_handler()
2741 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT); in rvu_me_pf_intr_handler()
2749 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND, in rvu_me_pf_intr_handler()
2752 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT, in rvu_me_pf_intr_handler()
2767 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1C, in rvu_unregister_interrupts()
2771 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C, in rvu_unregister_interrupts()
2775 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1C, in rvu_unregister_interrupts()
2795 offset = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(0)) & 0x3ff; in rvu_afvf_msix_vectors_num_ok()
2862 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
2865 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, in rvu_register_interrupts()
2882 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
2885 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
2888 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1S, in rvu_register_interrupts()
2895 pf_vec_start = rvu_read64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
3003 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_flr_init()
3004 rvu_write64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf), in rvu_flr_init()