2487 	int vfs = rvu->vfs;  in rvu_mbox_intr_handler()  local
2502 	if (vfs > 64) {  in rvu_mbox_intr_handler()
2506 		rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);  in rvu_mbox_intr_handler()
2507 		vfs -= 64;  in rvu_mbox_intr_handler()
2515 	rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);  in rvu_mbox_intr_handler()
2693 	if (rvu->vfs > 64)  in rvu_flr_intr_handler()
2694 		rvu_afvf_queue_flr_work(rvu, 64, rvu->vfs - 64);  in rvu_flr_intr_handler()
3034 	int vfs = rvu->vfs;  in rvu_disable_afvf_intr()  local
3036 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3037 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3038 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3039 	if (vfs <= 64)  in rvu_disable_afvf_intr()
3043 		      INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3044 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3045 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3050 	int vfs = rvu->vfs;  in rvu_enable_afvf_intr()  local
3056 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3057 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3060 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3061 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3062 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3065 	if (vfs <= 64)  in rvu_enable_afvf_intr()
3068 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3070 		      INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3072 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3073 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3074 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3104 	int err, chans, vfs;  in rvu_enable_sriov()  local
3116 	vfs = pci_sriov_get_totalvfs(pdev);  in rvu_enable_sriov()
3119 	if (vfs > chans)  in rvu_enable_sriov()
3120 		vfs = chans;  in rvu_enable_sriov()
3122 	if (!vfs)  in rvu_enable_sriov()
3128 	if (vfs > 62)  in rvu_enable_sriov()
3129 		vfs = 62;  in rvu_enable_sriov()
3135 	rvu->vfs = vfs;  in rvu_enable_sriov()
3137 	err = rvu_mbox_init(rvu, &rvu->afvf_wq_info, TYPE_AFVF, vfs,  in rvu_enable_sriov()
3146 	err = pci_enable_sriov(pdev, vfs);  in rvu_enable_sriov()