Lines Matching +full:eee +full:- +full:broken +full:- +full:100 +full:tx
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
156 #define MVNETA_TX_INTR_MASK(nr_txqs) (((1 << nr_txqs) - 1) << 0)
158 #define MVNETA_RX_INTR_MASK(nr_rxqs) (((1 << nr_rxqs) - 1) << 8)
270 * to cover all rate-limit values from 10Kbps up to 5Gbps
274 #define MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS 100
296 (((index) < (q)->last_desc) ? ((index) + 1) : 0)
303 #define MVNETA_RX_COAL_USEC 100
339 /* Max number of Tx descriptors */
343 #define MVNETA_MAX_TSO_SEGS 100
365 #define MVNETA_MAX_RX_BUF_SIZE (PAGE_SIZE - MVNETA_SKB_PAD)
368 ((addr >= txq->tso_hdrs_phys) && \
369 (addr < txq->tso_hdrs_phys + txq->size * TSO_HEADER_SIZE))
372 (((rxd)->status & MVNETA_RXD_BM_POOL_MASK) >> MVNETA_RXD_BM_POOL_SHIFT)
481 /* Pointer to the CPU-local NAPI struct */
594 u32 reserved2; /* hw_cmd - (for future use, PMT) */
595 u32 reserved3[4]; /* Reserved - (for future use) */
600 u16 reserved1; /* pnc_info - (for future use, PnC) */
608 u16 reserved4; /* csum_l4 - (for future use, PnC) */
618 u32 reserved2; /* hw_cmd - (for future use, PMT) */
620 u32 reserved3[4]; /* Reserved - (for future use) */
625 u16 reserved1; /* pnc_info - (for future use, PnC) */
631 u16 reserved4; /* csum_l4 - (for future use, PnC) */
655 /* Number of this TX queue, in the range 0-7 */
658 /* Number of TX DMA descriptors in the descriptor ring */
661 /* Number of currently used TX DMA descriptor in the
672 /* Index of last TX DMA descriptor that was inserted */
675 /* Index of the TX DMA descriptor to be cleaned up */
680 /* Virtual address of the TX DMA descriptors array */
683 /* DMA address of the TX DMA descriptors array */
686 /* Index of the last TX DMA descriptor */
689 /* Index of the next TX DMA descriptor to process */
703 /* rx queue number, in the range 0-7 */
758 writel(data, pp->base + offset); in mvreg_write()
764 return readl(pp->base + offset); in mvreg_read()
770 txq->txq_get_index++; in mvneta_txq_inc_get()
771 if (txq->txq_get_index == txq->size) in mvneta_txq_inc_get()
772 txq->txq_get_index = 0; in mvneta_txq_inc_get()
778 txq->txq_put_index++; in mvneta_txq_inc_put()
779 if (txq->txq_put_index == txq->size) in mvneta_txq_inc_put()
780 txq->txq_put_index = 0; in mvneta_txq_inc_put()
814 cpu_stats = per_cpu_ptr(pp->stats, cpu); in mvneta_get_stats64()
816 start = u64_stats_fetch_begin_irq(&cpu_stats->syncp); in mvneta_get_stats64()
817 rx_packets = cpu_stats->es.ps.rx_packets; in mvneta_get_stats64()
818 rx_bytes = cpu_stats->es.ps.rx_bytes; in mvneta_get_stats64()
819 rx_dropped = cpu_stats->rx_dropped; in mvneta_get_stats64()
820 rx_errors = cpu_stats->rx_errors; in mvneta_get_stats64()
821 tx_packets = cpu_stats->es.ps.tx_packets; in mvneta_get_stats64()
822 tx_bytes = cpu_stats->es.ps.tx_bytes; in mvneta_get_stats64()
823 } while (u64_stats_fetch_retry_irq(&cpu_stats->syncp, start)); in mvneta_get_stats64()
825 stats->rx_packets += rx_packets; in mvneta_get_stats64()
826 stats->rx_bytes += rx_bytes; in mvneta_get_stats64()
827 stats->rx_dropped += rx_dropped; in mvneta_get_stats64()
828 stats->rx_errors += rx_errors; in mvneta_get_stats64()
829 stats->tx_packets += tx_packets; in mvneta_get_stats64()
830 stats->tx_bytes += tx_bytes; in mvneta_get_stats64()
833 stats->tx_dropped = dev->stats.tx_dropped; in mvneta_get_stats64()
858 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), in mvneta_rxq_non_occup_desc_add()
861 ndescs -= MVNETA_RXQ_ADD_NON_OCCUPIED_MAX; in mvneta_rxq_non_occup_desc_add()
864 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), in mvneta_rxq_non_occup_desc_add()
874 val = mvreg_read(pp, MVNETA_RXQ_STATUS_REG(rxq->id)); in mvneta_rxq_busy_desc_num_get()
890 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), val); in mvneta_rxq_desc_num_update()
901 rx_done -= 0xff; in mvneta_rxq_desc_num_update()
908 rx_filled -= 0xff; in mvneta_rxq_desc_num_update()
910 mvreg_write(pp, MVNETA_RXQ_STATUS_UPDATE_REG(rxq->id), val); in mvneta_rxq_desc_num_update()
918 int rx_desc = rxq->next_desc_to_proc; in mvneta_rxq_next_desc_get()
920 rxq->next_desc_to_proc = MVNETA_QUEUE_NEXT_DESC(rxq, rx_desc); in mvneta_rxq_next_desc_get()
921 prefetch(rxq->descs + rxq->next_desc_to_proc); in mvneta_rxq_next_desc_get()
922 return rxq->descs + rx_desc; in mvneta_rxq_next_desc_get()
932 val |= ((max_rx_size - MVNETA_MH_SIZE) / 2) << in mvneta_max_rx_size_set()
945 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_offset_set()
950 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_offset_set()
954 /* Tx descriptors helper methods */
956 /* Update HW with number of TX descriptors to be sent */
963 pend_desc += txq->pending; in mvneta_txq_pend_desc_add()
965 /* Only 255 Tx descriptors can be added at once */ in mvneta_txq_pend_desc_add()
968 mvreg_write(pp, MVNETA_TXQ_UPDATE_REG(txq->id), val); in mvneta_txq_pend_desc_add()
969 pend_desc -= val; in mvneta_txq_pend_desc_add()
971 txq->pending = 0; in mvneta_txq_pend_desc_add()
974 /* Get pointer to next TX descriptor to be processed (send) by HW */
978 int tx_desc = txq->next_desc_to_proc; in mvneta_txq_next_desc_get()
980 txq->next_desc_to_proc = MVNETA_QUEUE_NEXT_DESC(txq, tx_desc); in mvneta_txq_next_desc_get()
981 return txq->descs + tx_desc; in mvneta_txq_next_desc_get()
984 /* Release the last allocated TX descriptor. Useful to handle DMA
985 * mapping failures in the TX path.
989 if (txq->next_desc_to_proc == 0) in mvneta_txq_desc_put()
990 txq->next_desc_to_proc = txq->last_desc - 1; in mvneta_txq_desc_put()
992 txq->next_desc_to_proc--; in mvneta_txq_desc_put()
1002 val = mvreg_read(pp, MVNETA_RXQ_SIZE_REG(rxq->id)); in mvneta_rxq_buf_size_set()
1007 mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), val); in mvneta_rxq_buf_size_set()
1016 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_bm_disable()
1018 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_bm_disable()
1027 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_bm_enable()
1029 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_bm_enable()
1038 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_long_pool_set()
1040 val |= (pp->pool_long->id << MVNETA_RXQ_LONG_POOL_ID_SHIFT); in mvneta_rxq_long_pool_set()
1042 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_long_pool_set()
1051 val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); in mvneta_rxq_short_pool_set()
1053 val |= (pp->pool_short->id << MVNETA_RXQ_SHORT_POOL_ID_SHIFT); in mvneta_rxq_short_pool_set()
1055 mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); in mvneta_rxq_short_pool_set()
1066 dev_warn(pp->dev->dev.parent, in mvneta_bm_pool_bufsize_set()
1086 if (pp->bm_win_id < 0) { in mvneta_mbus_io_win_set()
1090 pp->bm_win_id = i; in mvneta_mbus_io_win_set()
1095 return -ENOMEM; in mvneta_mbus_io_win_set()
1097 i = pp->bm_win_id; in mvneta_mbus_io_win_set()
1109 mvreg_write(pp, MVNETA_WIN_SIZE(i), (wsize - 1) & 0xffff0000); in mvneta_mbus_io_win_set()
1128 err = mvebu_mbus_get_io_win_info(pp->bm_priv->bppi_phys_addr, &wsize, in mvneta_bm_port_mbus_init()
1133 pp->bm_win_id = -1; in mvneta_bm_port_mbus_init()
1135 /* Open NETA -> BM window */ in mvneta_bm_port_mbus_init()
1136 err = mvneta_mbus_io_win_set(pp, pp->bm_priv->bppi_phys_addr, wsize, in mvneta_bm_port_mbus_init()
1139 netdev_info(pp->dev, "fail to configure mbus window to BM\n"); in mvneta_bm_port_mbus_init()
1151 struct device_node *dn = pdev->dev.of_node; in mvneta_bm_port_init()
1154 if (!pp->neta_armada3700) { in mvneta_bm_port_init()
1162 if (of_property_read_u32(dn, "bm,pool-long", &long_pool_id)) { in mvneta_bm_port_init()
1163 netdev_info(pp->dev, "missing long pool id\n"); in mvneta_bm_port_init()
1164 return -EINVAL; in mvneta_bm_port_init()
1168 pp->pool_long = mvneta_bm_pool_use(pp->bm_priv, long_pool_id, in mvneta_bm_port_init()
1169 MVNETA_BM_LONG, pp->id, in mvneta_bm_port_init()
1170 MVNETA_RX_PKT_SIZE(pp->dev->mtu)); in mvneta_bm_port_init()
1171 if (!pp->pool_long) { in mvneta_bm_port_init()
1172 netdev_info(pp->dev, "fail to obtain long pool for port\n"); in mvneta_bm_port_init()
1173 return -ENOMEM; in mvneta_bm_port_init()
1176 pp->pool_long->port_map |= 1 << pp->id; in mvneta_bm_port_init()
1178 mvneta_bm_pool_bufsize_set(pp, pp->pool_long->buf_size, in mvneta_bm_port_init()
1179 pp->pool_long->id); in mvneta_bm_port_init()
1182 if (of_property_read_u32(dn, "bm,pool-short", &short_pool_id)) in mvneta_bm_port_init()
1186 pp->pool_short = mvneta_bm_pool_use(pp->bm_priv, short_pool_id, in mvneta_bm_port_init()
1187 MVNETA_BM_SHORT, pp->id, in mvneta_bm_port_init()
1189 if (!pp->pool_short) { in mvneta_bm_port_init()
1190 netdev_info(pp->dev, "fail to obtain short pool for port\n"); in mvneta_bm_port_init()
1191 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_bm_port_init()
1192 return -ENOMEM; in mvneta_bm_port_init()
1196 pp->pool_short->port_map |= 1 << pp->id; in mvneta_bm_port_init()
1197 mvneta_bm_pool_bufsize_set(pp, pp->pool_short->buf_size, in mvneta_bm_port_init()
1198 pp->pool_short->id); in mvneta_bm_port_init()
1207 struct mvneta_bm_pool *bm_pool = pp->pool_long; in mvneta_bm_update_mtu()
1208 struct hwbm_pool *hwbm_pool = &bm_pool->hwbm_pool; in mvneta_bm_update_mtu()
1212 mvneta_bm_bufs_free(pp->bm_priv, bm_pool, 1 << pp->id); in mvneta_bm_update_mtu()
1213 if (hwbm_pool->buf_num) { in mvneta_bm_update_mtu()
1215 bm_pool->id); in mvneta_bm_update_mtu()
1219 bm_pool->pkt_size = MVNETA_RX_PKT_SIZE(mtu); in mvneta_bm_update_mtu()
1220 bm_pool->buf_size = MVNETA_RX_BUF_SIZE(bm_pool->pkt_size); in mvneta_bm_update_mtu()
1221 hwbm_pool->frag_size = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + in mvneta_bm_update_mtu()
1222 SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(bm_pool->pkt_size)); in mvneta_bm_update_mtu()
1225 num = hwbm_pool_add(hwbm_pool, hwbm_pool->size); in mvneta_bm_update_mtu()
1226 if (num != hwbm_pool->size) { in mvneta_bm_update_mtu()
1228 bm_pool->id, num, hwbm_pool->size); in mvneta_bm_update_mtu()
1231 mvneta_bm_pool_bufsize_set(pp, bm_pool->buf_size, bm_pool->id); in mvneta_bm_update_mtu()
1236 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_bm_update_mtu()
1237 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, 1 << pp->id); in mvneta_bm_update_mtu()
1239 pp->bm_priv = NULL; in mvneta_bm_update_mtu()
1240 pp->rx_offset_correction = MVNETA_SKB_HEADROOM; in mvneta_bm_update_mtu()
1242 netdev_info(pp->dev, "fail to update MTU, fall back to software BM\n"); in mvneta_bm_update_mtu()
1245 /* Start the Ethernet port RX and TX activity */
1254 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_port_up()
1255 if (txq->descs) in mvneta_port_up()
1263 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_port_up()
1265 if (rxq->descs) in mvneta_port_up()
1289 netdev_warn(pp->dev, in mvneta_port_down()
1299 /* Stop Tx port activity. Check port Tx activity. Issue stop in mvneta_port_down()
1308 /* Wait for all Tx activity to terminate. */ in mvneta_port_down()
1312 netdev_warn(pp->dev, in mvneta_port_down()
1313 "TIMEOUT for TX stopped status=0x%08x\n", in mvneta_port_down()
1319 /* Check TX Command reg that all Txqs are stopped */ in mvneta_port_down()
1324 /* Double check to verify that TX FIFO is empty */ in mvneta_port_down()
1328 netdev_warn(pp->dev, in mvneta_port_down()
1329 "TX FIFO empty timeout status=0x%08x\n", in mvneta_port_down()
1368 /* Set all entries in Unicast MAC Table; queue==-1 means reject all */
1374 if (queue == -1) { in mvneta_set_ucast_table()
1385 /* Set all entries in Special Multicast MAC Table; queue==-1 means reject all */
1391 if (queue == -1) { in mvneta_set_special_mcast_table()
1403 /* Set all entries in Other Multicast MAC Table. queue==-1 means reject all */
1409 if (queue == -1) { in mvneta_set_other_mcast_table()
1410 memset(pp->mcast_count, 0, sizeof(pp->mcast_count)); in mvneta_set_other_mcast_table()
1413 memset(pp->mcast_count, 1, sizeof(pp->mcast_count)); in mvneta_set_other_mcast_table()
1463 * Resets RX and TX descriptor rings.
1486 * TX queues modulo their number. If there is only one TX in mvneta_defaults_set()
1493 if (!pp->neta_armada3700) { in mvneta_defaults_set()
1502 /* With only one TX queue we configure a special case in mvneta_defaults_set()
1507 txq_map = (cpu == pp->rxq_def) ? in mvneta_defaults_set()
1518 /* Reset RX and TX DMAs */ in mvneta_defaults_set()
1533 if (pp->bm_priv) in mvneta_defaults_set()
1541 if (pp->bm_priv) in mvneta_defaults_set()
1542 mvreg_write(pp, MVNETA_BM_ADDRESS, pp->bm_priv->bppi_phys_addr); in mvneta_defaults_set()
1545 val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def); in mvneta_defaults_set()
1574 mvneta_set_ucast_table(pp, -1); in mvneta_defaults_set()
1575 mvneta_set_special_mcast_table(pp, -1); in mvneta_defaults_set()
1576 mvneta_set_other_mcast_table(pp, -1); in mvneta_defaults_set()
1578 /* Set port interrupt enable register - default enable all */ in mvneta_defaults_set()
1586 /* Set max sizes for tx queues */
1603 /* TX token size and all TXQs token size must be larger that MTU */ in mvneta_txq_max_tx_size_set()
1645 if (queue == -1) { in mvneta_set_ucast_addr()
1663 if (queue != -1) { in mvneta_mac_addr_set()
1682 mvreg_write(pp, MVNETA_RXQ_THRESHOLD_REG(rxq->id), in mvneta_rx_pkts_coal_set()
1695 clk_rate = clk_get_rate(pp->clk); in mvneta_rx_time_coal_set()
1698 mvreg_write(pp, MVNETA_RXQ_TIME_COAL_REG(rxq->id), val); in mvneta_rx_time_coal_set()
1707 val = mvreg_read(pp, MVNETA_TXQ_SIZE_REG(txq->id)); in mvneta_tx_done_pkts_coal_set()
1712 mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), val); in mvneta_tx_done_pkts_coal_set()
1722 rx_desc->buf_phys_addr = phys_addr; in mvneta_rx_desc_fill()
1723 i = rx_desc - rxq->descs; in mvneta_rx_desc_fill()
1724 rxq->buf_virt_addr[i] = virt_addr; in mvneta_rx_desc_fill()
1734 /* Only 255 TX descriptors can be updated at once */ in mvneta_txq_sent_desc_dec()
1737 mvreg_write(pp, MVNETA_TXQ_UPDATE_REG(txq->id), val); in mvneta_txq_sent_desc_dec()
1738 sent_desc = sent_desc - 0xff; in mvneta_txq_sent_desc_dec()
1742 mvreg_write(pp, MVNETA_TXQ_UPDATE_REG(txq->id), val); in mvneta_txq_sent_desc_dec()
1745 /* Get number of TX descriptors already sent by HW */
1752 val = mvreg_read(pp, MVNETA_TXQ_STATUS_REG(txq->id)); in mvneta_txq_sent_desc_num_get()
1810 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_rx_error()
1811 u32 status = rx_desc->status; in mvneta_rx_error()
1813 /* update per-cpu counter */ in mvneta_rx_error()
1814 u64_stats_update_begin(&stats->syncp); in mvneta_rx_error()
1815 stats->rx_errors++; in mvneta_rx_error()
1816 u64_stats_update_end(&stats->syncp); in mvneta_rx_error()
1820 netdev_err(pp->dev, "bad rx status %08x (crc error), size=%d\n", in mvneta_rx_error()
1821 status, rx_desc->data_size); in mvneta_rx_error()
1824 netdev_err(pp->dev, "bad rx status %08x (overrun error), size=%d\n", in mvneta_rx_error()
1825 status, rx_desc->data_size); in mvneta_rx_error()
1828 netdev_err(pp->dev, "bad rx status %08x (max frame length error), size=%d\n", in mvneta_rx_error()
1829 status, rx_desc->data_size); in mvneta_rx_error()
1832 netdev_err(pp->dev, "bad rx status %08x (resource error), size=%d\n", in mvneta_rx_error()
1833 status, rx_desc->data_size); in mvneta_rx_error()
1841 if ((pp->dev->features & NETIF_F_RXCSUM) && in mvneta_rx_csum()
1849 /* Return tx queue pointer (find last set bit) according to <cause> returned
1856 int queue = fls(cause) - 1; in mvneta_tx_done_policy()
1858 return &pp->txqs[queue]; in mvneta_tx_done_policy()
1861 /* Free tx queue skbuffs */
1875 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_get_index]; in mvneta_txq_bufs_free()
1876 struct mvneta_tx_desc *tx_desc = txq->descs + in mvneta_txq_bufs_free()
1877 txq->txq_get_index; in mvneta_txq_bufs_free()
1881 if (!IS_TSO_HEADER(txq, tx_desc->buf_phys_addr) && in mvneta_txq_bufs_free()
1882 buf->type != MVNETA_TYPE_XDP_TX) in mvneta_txq_bufs_free()
1883 dma_unmap_single(pp->dev->dev.parent, in mvneta_txq_bufs_free()
1884 tx_desc->buf_phys_addr, in mvneta_txq_bufs_free()
1885 tx_desc->data_size, DMA_TO_DEVICE); in mvneta_txq_bufs_free()
1886 if (buf->type == MVNETA_TYPE_SKB && buf->skb) { in mvneta_txq_bufs_free()
1887 bytes_compl += buf->skb->len; in mvneta_txq_bufs_free()
1889 dev_kfree_skb_any(buf->skb); in mvneta_txq_bufs_free()
1890 } else if ((buf->type == MVNETA_TYPE_XDP_TX || in mvneta_txq_bufs_free()
1891 buf->type == MVNETA_TYPE_XDP_NDO) && buf->xdpf) { in mvneta_txq_bufs_free()
1892 if (napi && buf->type == MVNETA_TYPE_XDP_TX) in mvneta_txq_bufs_free()
1893 xdp_return_frame_rx_napi(buf->xdpf); in mvneta_txq_bufs_free()
1895 xdp_return_frame_bulk(buf->xdpf, &bq); in mvneta_txq_bufs_free()
1909 struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_txq_done()
1918 txq->count -= tx_done; in mvneta_txq_done()
1921 if (txq->count <= txq->tx_wake_threshold) in mvneta_txq_done()
1936 page = page_pool_alloc_pages(rxq->page_pool, in mvneta_rx_refill()
1939 return -ENOMEM; in mvneta_rx_refill()
1941 phys_addr = page_pool_get_dma_addr(page) + pp->rx_offset_correction; in mvneta_rx_refill()
1947 /* Handle tx checksum */
1950 if (skb->ip_summed == CHECKSUM_PARTIAL) { in mvneta_skb_tx_csum()
1959 ip_hdr_len = ip4h->ihl; in mvneta_skb_tx_csum()
1960 l4_proto = ip4h->protocol; in mvneta_skb_tx_csum()
1967 l4_proto = ip6h->nexthdr; in mvneta_skb_tx_csum()
1988 if (pp->bm_priv) { in mvneta_rxq_drop_pkts()
1995 bm_pool = &pp->bm_priv->bm_pools[pool_id]; in mvneta_rxq_drop_pkts()
1997 mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, in mvneta_rxq_drop_pkts()
1998 rx_desc->buf_phys_addr); in mvneta_rxq_drop_pkts()
2003 for (i = 0; i < rxq->size; i++) { in mvneta_rxq_drop_pkts()
2004 struct mvneta_rx_desc *rx_desc = rxq->descs + i; in mvneta_rxq_drop_pkts()
2005 void *data = rxq->buf_virt_addr[i]; in mvneta_rxq_drop_pkts()
2006 if (!data || !(rx_desc->buf_phys_addr)) in mvneta_rxq_drop_pkts()
2009 page_pool_put_full_page(rxq->page_pool, data, false); in mvneta_rxq_drop_pkts()
2011 if (xdp_rxq_info_is_reg(&rxq->xdp_rxq)) in mvneta_rxq_drop_pkts()
2012 xdp_rxq_info_unreg(&rxq->xdp_rxq); in mvneta_rxq_drop_pkts()
2013 page_pool_destroy(rxq->page_pool); in mvneta_rxq_drop_pkts()
2014 rxq->page_pool = NULL; in mvneta_rxq_drop_pkts()
2021 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_update_stats()
2023 u64_stats_update_begin(&stats->syncp); in mvneta_update_stats()
2024 stats->es.ps.rx_packets += ps->rx_packets; in mvneta_update_stats()
2025 stats->es.ps.rx_bytes += ps->rx_bytes; in mvneta_update_stats()
2027 stats->es.ps.xdp_redirect += ps->xdp_redirect; in mvneta_update_stats()
2028 stats->es.ps.xdp_pass += ps->xdp_pass; in mvneta_update_stats()
2029 stats->es.ps.xdp_drop += ps->xdp_drop; in mvneta_update_stats()
2030 u64_stats_update_end(&stats->syncp); in mvneta_update_stats()
2037 int curr_desc = rxq->first_to_refill; in mvneta_rx_refill_queue()
2040 for (i = 0; (i < rxq->refill_num) && (i < 64); i++) { in mvneta_rx_refill_queue()
2041 rx_desc = rxq->descs + curr_desc; in mvneta_rx_refill_queue()
2042 if (!(rx_desc->buf_phys_addr)) { in mvneta_rx_refill_queue()
2047 rxq->id, i, rxq->refill_num); in mvneta_rx_refill_queue()
2049 stats = this_cpu_ptr(pp->stats); in mvneta_rx_refill_queue()
2050 u64_stats_update_begin(&stats->syncp); in mvneta_rx_refill_queue()
2051 stats->es.refill_error++; in mvneta_rx_refill_queue()
2052 u64_stats_update_end(&stats->syncp); in mvneta_rx_refill_queue()
2058 rxq->refill_num -= i; in mvneta_rx_refill_queue()
2059 rxq->first_to_refill = curr_desc; in mvneta_rx_refill_queue()
2074 for (i = 0; i < sinfo->nr_frags; i++) in mvneta_xdp_put_buff()
2075 page_pool_put_full_page(rxq->page_pool, in mvneta_xdp_put_buff()
2076 skb_frag_page(&sinfo->frags[i]), true); in mvneta_xdp_put_buff()
2079 page_pool_put_page(rxq->page_pool, virt_to_head_page(xdp->data), in mvneta_xdp_put_buff()
2088 struct device *dev = pp->dev->dev.parent; in mvneta_xdp_submit_frame()
2094 num_frames += sinfo->nr_frags; in mvneta_xdp_submit_frame()
2096 if (txq->count + num_frames >= txq->size) in mvneta_xdp_submit_frame()
2100 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_xdp_submit_frame()
2102 int len = xdpf->len; in mvneta_xdp_submit_frame()
2106 frag = &sinfo->frags[i - 1]; in mvneta_xdp_submit_frame()
2116 : xdpf->data; in mvneta_xdp_submit_frame()
2124 buf->type = MVNETA_TYPE_XDP_NDO; in mvneta_xdp_submit_frame()
2127 : virt_to_page(xdpf->data); in mvneta_xdp_submit_frame()
2132 dma_addr += sizeof(*xdpf) + xdpf->headroom; in mvneta_xdp_submit_frame()
2135 buf->type = MVNETA_TYPE_XDP_TX; in mvneta_xdp_submit_frame()
2137 buf->xdpf = unlikely(i) ? NULL : xdpf; in mvneta_xdp_submit_frame()
2139 tx_desc->command = unlikely(i) ? 0 : MVNETA_TXD_F_DESC; in mvneta_xdp_submit_frame()
2140 tx_desc->buf_phys_addr = dma_addr; in mvneta_xdp_submit_frame()
2141 tx_desc->data_size = len; in mvneta_xdp_submit_frame()
2147 tx_desc->command |= MVNETA_TXD_L_DESC | MVNETA_TXD_Z_PAD; in mvneta_xdp_submit_frame()
2149 txq->pending += num_frames; in mvneta_xdp_submit_frame()
2150 txq->count += num_frames; in mvneta_xdp_submit_frame()
2155 for (i--; i >= 0; i--) { in mvneta_xdp_submit_frame()
2157 tx_desc = txq->descs + txq->next_desc_to_proc; in mvneta_xdp_submit_frame()
2158 dma_unmap_single(dev, tx_desc->buf_phys_addr, in mvneta_xdp_submit_frame()
2159 tx_desc->data_size, in mvneta_xdp_submit_frame()
2169 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_xdp_xmit_back()
2181 txq = &pp->txqs[cpu % txq_number]; in mvneta_xdp_xmit_back()
2182 nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_xdp_xmit_back()
2187 u64_stats_update_begin(&stats->syncp); in mvneta_xdp_xmit_back()
2188 stats->es.ps.tx_bytes += nxmit_byte; in mvneta_xdp_xmit_back()
2189 stats->es.ps.tx_packets++; in mvneta_xdp_xmit_back()
2190 stats->es.ps.xdp_tx++; in mvneta_xdp_xmit_back()
2191 u64_stats_update_end(&stats->syncp); in mvneta_xdp_xmit_back()
2195 u64_stats_update_begin(&stats->syncp); in mvneta_xdp_xmit_back()
2196 stats->es.ps.xdp_tx_err++; in mvneta_xdp_xmit_back()
2197 u64_stats_update_end(&stats->syncp); in mvneta_xdp_xmit_back()
2209 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_xdp_xmit()
2216 if (unlikely(test_bit(__MVNETA_DOWN, &pp->state))) in mvneta_xdp_xmit()
2217 return -ENETDOWN; in mvneta_xdp_xmit()
2220 return -EINVAL; in mvneta_xdp_xmit()
2222 txq = &pp->txqs[cpu % txq_number]; in mvneta_xdp_xmit()
2223 nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_xdp_xmit()
2239 u64_stats_update_begin(&stats->syncp); in mvneta_xdp_xmit()
2240 stats->es.ps.tx_bytes += nxmit_byte; in mvneta_xdp_xmit()
2241 stats->es.ps.tx_packets += nxmit; in mvneta_xdp_xmit()
2242 stats->es.ps.xdp_xmit += nxmit; in mvneta_xdp_xmit()
2243 stats->es.ps.xdp_xmit_err += num_frame - nxmit; in mvneta_xdp_xmit()
2244 u64_stats_update_end(&stats->syncp); in mvneta_xdp_xmit()
2257 len = xdp->data_end - xdp->data_hard_start - pp->rx_offset_correction; in mvneta_run_xdp()
2258 data_len = xdp->data_end - xdp->data; in mvneta_run_xdp()
2262 sync = xdp->data_end - xdp->data_hard_start - pp->rx_offset_correction; in mvneta_run_xdp()
2267 stats->xdp_pass++; in mvneta_run_xdp()
2272 err = xdp_do_redirect(pp->dev, xdp, prog); in mvneta_run_xdp()
2278 stats->xdp_redirect++; in mvneta_run_xdp()
2288 bpf_warn_invalid_xdp_action(pp->dev, prog, act); in mvneta_run_xdp()
2291 trace_xdp_exception(pp->dev, prog, act); in mvneta_run_xdp()
2296 stats->xdp_drop++; in mvneta_run_xdp()
2300 stats->rx_bytes += frame_sz + xdp->data_end - xdp->data - data_len; in mvneta_run_xdp()
2301 stats->rx_packets++; in mvneta_run_xdp()
2314 int data_len = -MVNETA_MH_SIZE, len; in mvneta_swbm_rx_frame()
2315 struct net_device *dev = pp->dev; in mvneta_swbm_rx_frame()
2323 data_len += len - ETH_FCS_LEN; in mvneta_swbm_rx_frame()
2325 *size = *size - len; in mvneta_swbm_rx_frame()
2327 dma_dir = page_pool_get_dma_dir(rxq->page_pool); in mvneta_swbm_rx_frame()
2328 dma_sync_single_for_cpu(dev->dev.parent, in mvneta_swbm_rx_frame()
2329 rx_desc->buf_phys_addr, in mvneta_swbm_rx_frame()
2332 rx_desc->buf_phys_addr = 0; in mvneta_swbm_rx_frame()
2337 xdp_prepare_buff(xdp, data, pp->rx_offset_correction + MVNETA_MH_SIZE, in mvneta_swbm_rx_frame()
2349 struct net_device *dev = pp->dev; in mvneta_swbm_add_rx_fragment()
2358 data_len = len - ETH_FCS_LEN; in mvneta_swbm_add_rx_fragment()
2360 dma_dir = page_pool_get_dma_dir(rxq->page_pool); in mvneta_swbm_add_rx_fragment()
2361 dma_sync_single_for_cpu(dev->dev.parent, in mvneta_swbm_add_rx_fragment()
2362 rx_desc->buf_phys_addr, in mvneta_swbm_add_rx_fragment()
2364 rx_desc->buf_phys_addr = 0; in mvneta_swbm_add_rx_fragment()
2367 sinfo->nr_frags = 0; in mvneta_swbm_add_rx_fragment()
2369 if (data_len > 0 && sinfo->nr_frags < MAX_SKB_FRAGS) { in mvneta_swbm_add_rx_fragment()
2370 skb_frag_t *frag = &sinfo->frags[sinfo->nr_frags++]; in mvneta_swbm_add_rx_fragment()
2372 skb_frag_off_set(frag, pp->rx_offset_correction); in mvneta_swbm_add_rx_fragment()
2377 sinfo->xdp_frags_size = *size; in mvneta_swbm_add_rx_fragment()
2383 page_pool_put_full_page(rxq->page_pool, page, true); in mvneta_swbm_add_rx_fragment()
2385 *size -= len; in mvneta_swbm_add_rx_fragment()
2397 num_frags = sinfo->nr_frags; in mvneta_swbm_build_skb()
2399 skb = build_skb(xdp->data_hard_start, PAGE_SIZE); in mvneta_swbm_build_skb()
2401 return ERR_PTR(-ENOMEM); in mvneta_swbm_build_skb()
2405 skb_reserve(skb, xdp->data - xdp->data_hard_start); in mvneta_swbm_build_skb()
2406 skb_put(skb, xdp->data_end - xdp->data); in mvneta_swbm_build_skb()
2407 skb->ip_summed = mvneta_rx_csum(pp, desc_status); in mvneta_swbm_build_skb()
2411 sinfo->xdp_frags_size, in mvneta_swbm_build_skb()
2412 num_frags * xdp->frame_sz, in mvneta_swbm_build_skb()
2424 struct net_device *dev = pp->dev; in mvneta_rx_swbm()
2430 xdp_init_buff(&xdp_buf, PAGE_SIZE, &rxq->xdp_rxq); in mvneta_rx_swbm()
2436 xdp_prog = READ_ONCE(pp->xdp_prog); in mvneta_rx_swbm()
2445 index = rx_desc - rxq->descs; in mvneta_rx_swbm()
2446 page = (struct page *)rxq->buf_virt_addr[index]; in mvneta_rx_swbm()
2448 rx_status = rx_desc->status; in mvneta_rx_swbm()
2450 rxq->refill_num++; in mvneta_rx_swbm()
2459 size = rx_desc->data_size; in mvneta_rx_swbm()
2460 frame_sz = size - ETH_FCS_LEN; in mvneta_rx_swbm()
2467 rx_desc->buf_phys_addr = 0; in mvneta_rx_swbm()
2468 page_pool_put_full_page(rxq->page_pool, page, in mvneta_rx_swbm()
2482 mvneta_xdp_put_buff(pp, rxq, &xdp_buf, -1); in mvneta_rx_swbm()
2490 skb = mvneta_swbm_build_skb(pp, rxq->page_pool, &xdp_buf, desc_status); in mvneta_rx_swbm()
2492 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_rx_swbm()
2494 mvneta_xdp_put_buff(pp, rxq, &xdp_buf, -1); in mvneta_rx_swbm()
2496 u64_stats_update_begin(&stats->syncp); in mvneta_rx_swbm()
2497 stats->es.skb_alloc_error++; in mvneta_rx_swbm()
2498 stats->rx_dropped++; in mvneta_rx_swbm()
2499 u64_stats_update_end(&stats->syncp); in mvneta_rx_swbm()
2504 ps.rx_bytes += skb->len; in mvneta_rx_swbm()
2507 skb->protocol = eth_type_trans(skb, dev); in mvneta_rx_swbm()
2514 mvneta_xdp_put_buff(pp, rxq, &xdp_buf, -1); in mvneta_rx_swbm()
2536 struct net_device *dev = pp->dev; in mvneta_rx_hwbm()
2561 rx_status = rx_desc->status; in mvneta_rx_hwbm()
2562 rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); in mvneta_rx_hwbm()
2563 data = (u8 *)(uintptr_t)rx_desc->buf_cookie; in mvneta_rx_hwbm()
2564 phys_addr = rx_desc->buf_phys_addr; in mvneta_rx_hwbm()
2566 bm_pool = &pp->bm_priv->bm_pools[pool_id]; in mvneta_rx_hwbm()
2572 mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, in mvneta_rx_hwbm()
2573 rx_desc->buf_phys_addr); in mvneta_rx_hwbm()
2586 dma_sync_single_range_for_cpu(&pp->bm_priv->pdev->dev, in mvneta_rx_hwbm()
2587 rx_desc->buf_phys_addr, in mvneta_rx_hwbm()
2594 skb->protocol = eth_type_trans(skb, dev); in mvneta_rx_hwbm()
2595 skb->ip_summed = mvneta_rx_csum(pp, rx_status); in mvneta_rx_hwbm()
2602 mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, in mvneta_rx_hwbm()
2603 rx_desc->buf_phys_addr); in mvneta_rx_hwbm()
2610 err = hwbm_pool_refill(&bm_pool->hwbm_pool, GFP_ATOMIC); in mvneta_rx_hwbm()
2614 netdev_err(dev, "Linux processing - Can't refill\n"); in mvneta_rx_hwbm()
2616 stats = this_cpu_ptr(pp->stats); in mvneta_rx_hwbm()
2617 u64_stats_update_begin(&stats->syncp); in mvneta_rx_hwbm()
2618 stats->es.refill_error++; in mvneta_rx_hwbm()
2619 u64_stats_update_end(&stats->syncp); in mvneta_rx_hwbm()
2624 frag_size = bm_pool->hwbm_pool.frag_size; in mvneta_rx_hwbm()
2631 dma_unmap_single(&pp->bm_priv->pdev->dev, phys_addr, in mvneta_rx_hwbm()
2632 bm_pool->buf_size, DMA_FROM_DEVICE); in mvneta_rx_hwbm()
2643 skb->protocol = eth_type_trans(skb, dev); in mvneta_rx_hwbm()
2644 skb->ip_summed = mvneta_rx_csum(pp, rx_status); in mvneta_rx_hwbm()
2650 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_rx_hwbm()
2652 u64_stats_update_begin(&stats->syncp); in mvneta_rx_hwbm()
2653 stats->es.ps.rx_packets += rcvd_pkts; in mvneta_rx_hwbm()
2654 stats->es.ps.rx_bytes += rcvd_bytes; in mvneta_rx_hwbm()
2655 u64_stats_update_end(&stats->syncp); in mvneta_rx_hwbm()
2667 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tso_put_hdr()
2672 tx_desc->data_size = hdr_len; in mvneta_tso_put_hdr()
2673 tx_desc->command = mvneta_skb_tx_csum(skb); in mvneta_tso_put_hdr()
2674 tx_desc->command |= MVNETA_TXD_F_DESC; in mvneta_tso_put_hdr()
2675 tx_desc->buf_phys_addr = txq->tso_hdrs_phys + in mvneta_tso_put_hdr()
2676 txq->txq_put_index * TSO_HEADER_SIZE; in mvneta_tso_put_hdr()
2677 buf->type = MVNETA_TYPE_SKB; in mvneta_tso_put_hdr()
2678 buf->skb = NULL; in mvneta_tso_put_hdr()
2688 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tso_put_data()
2692 tx_desc->data_size = size; in mvneta_tso_put_data()
2693 tx_desc->buf_phys_addr = dma_map_single(dev->dev.parent, data, in mvneta_tso_put_data()
2695 if (unlikely(dma_mapping_error(dev->dev.parent, in mvneta_tso_put_data()
2696 tx_desc->buf_phys_addr))) { in mvneta_tso_put_data()
2698 return -ENOMEM; in mvneta_tso_put_data()
2701 tx_desc->command = 0; in mvneta_tso_put_data()
2702 buf->type = MVNETA_TYPE_SKB; in mvneta_tso_put_data()
2703 buf->skb = NULL; in mvneta_tso_put_data()
2707 tx_desc->command = MVNETA_TXD_L_DESC; in mvneta_tso_put_data()
2711 buf->skb = skb; in mvneta_tso_put_data()
2727 if ((txq->count + tso_count_descs(skb)) >= txq->size) in mvneta_tx_tso()
2738 total_len = skb->len - hdr_len; in mvneta_tx_tso()
2742 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len); in mvneta_tx_tso()
2743 total_len -= data_left; in mvneta_tx_tso()
2747 hdr = txq->tso_hdrs + txq->txq_put_index * TSO_HEADER_SIZE; in mvneta_tx_tso()
2763 data_left -= size; in mvneta_tx_tso()
2773 * be DMA-unmapped. in mvneta_tx_tso()
2775 for (i = desc_count - 1; i >= 0; i--) { in mvneta_tx_tso()
2776 struct mvneta_tx_desc *tx_desc = txq->descs + i; in mvneta_tx_tso()
2777 if (!IS_TSO_HEADER(txq, tx_desc->buf_phys_addr)) in mvneta_tx_tso()
2778 dma_unmap_single(pp->dev->dev.parent, in mvneta_tx_tso()
2779 tx_desc->buf_phys_addr, in mvneta_tx_tso()
2780 tx_desc->data_size, in mvneta_tx_tso()
2787 /* Handle tx fragmentation processing */
2792 int i, nr_frags = skb_shinfo(skb)->nr_frags; in mvneta_tx_frag_process()
2795 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tx_frag_process()
2796 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in mvneta_tx_frag_process()
2800 tx_desc->data_size = skb_frag_size(frag); in mvneta_tx_frag_process()
2802 tx_desc->buf_phys_addr = in mvneta_tx_frag_process()
2803 dma_map_single(pp->dev->dev.parent, addr, in mvneta_tx_frag_process()
2804 tx_desc->data_size, DMA_TO_DEVICE); in mvneta_tx_frag_process()
2806 if (dma_mapping_error(pp->dev->dev.parent, in mvneta_tx_frag_process()
2807 tx_desc->buf_phys_addr)) { in mvneta_tx_frag_process()
2812 if (i == nr_frags - 1) { in mvneta_tx_frag_process()
2814 tx_desc->command = MVNETA_TXD_L_DESC | MVNETA_TXD_Z_PAD; in mvneta_tx_frag_process()
2815 buf->skb = skb; in mvneta_tx_frag_process()
2818 tx_desc->command = 0; in mvneta_tx_frag_process()
2819 buf->skb = NULL; in mvneta_tx_frag_process()
2821 buf->type = MVNETA_TYPE_SKB; in mvneta_tx_frag_process()
2831 for (i = i - 1; i >= 0; i--) { in mvneta_tx_frag_process()
2832 tx_desc = txq->descs + i; in mvneta_tx_frag_process()
2833 dma_unmap_single(pp->dev->dev.parent, in mvneta_tx_frag_process()
2834 tx_desc->buf_phys_addr, in mvneta_tx_frag_process()
2835 tx_desc->data_size, in mvneta_tx_frag_process()
2840 return -ENOMEM; in mvneta_tx_frag_process()
2843 /* Main tx processing */
2848 struct mvneta_tx_queue *txq = &pp->txqs[txq_id]; in mvneta_tx()
2849 struct mvneta_tx_buf *buf = &txq->buf[txq->txq_put_index]; in mvneta_tx()
2851 int len = skb->len; in mvneta_tx()
2863 frags = skb_shinfo(skb)->nr_frags + 1; in mvneta_tx()
2870 tx_desc->data_size = skb_headlen(skb); in mvneta_tx()
2872 tx_desc->buf_phys_addr = dma_map_single(dev->dev.parent, skb->data, in mvneta_tx()
2873 tx_desc->data_size, in mvneta_tx()
2875 if (unlikely(dma_mapping_error(dev->dev.parent, in mvneta_tx()
2876 tx_desc->buf_phys_addr))) { in mvneta_tx()
2882 buf->type = MVNETA_TYPE_SKB; in mvneta_tx()
2886 tx_desc->command = tx_cmd; in mvneta_tx()
2887 buf->skb = skb; in mvneta_tx()
2892 buf->skb = NULL; in mvneta_tx()
2894 tx_desc->command = tx_cmd; in mvneta_tx()
2897 dma_unmap_single(dev->dev.parent, in mvneta_tx()
2898 tx_desc->buf_phys_addr, in mvneta_tx()
2899 tx_desc->data_size, in mvneta_tx()
2910 struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); in mvneta_tx()
2914 txq->count += frags; in mvneta_tx()
2915 if (txq->count >= txq->tx_stop_threshold) in mvneta_tx()
2919 txq->pending + frags > MVNETA_TXQ_DEC_SENT_MASK) in mvneta_tx()
2922 txq->pending += frags; in mvneta_tx()
2924 u64_stats_update_begin(&stats->syncp); in mvneta_tx()
2925 stats->es.ps.tx_bytes += len; in mvneta_tx()
2926 stats->es.ps.tx_packets++; in mvneta_tx()
2927 u64_stats_update_end(&stats->syncp); in mvneta_tx()
2929 dev->stats.tx_dropped++; in mvneta_tx()
2937 /* Free tx resources, when resetting a port */
2942 struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_txq_done_force()
2943 int tx_done = txq->count; in mvneta_txq_done_force()
2948 txq->count = 0; in mvneta_txq_done_force()
2949 txq->txq_put_index = 0; in mvneta_txq_done_force()
2950 txq->txq_get_index = 0; in mvneta_txq_done_force()
2953 /* Handle tx done - called in softirq context. The <cause_tx_done> argument
2965 nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_tx_done_gbe()
2968 if (txq->count) in mvneta_tx_done_gbe()
2972 cause_tx_done &= ~((1 << txq->id)); in mvneta_tx_done_gbe()
2988 for (j = 7; j >= 0; j--) { in mvneta_addr_crc()
2999 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF).
3001 * Table entries in the DA-Filter table. This method set the Special
3020 if (queue == -1) in mvneta_set_special_mcast_addr()
3033 * A CRC-8 is used as an index to the Other Multicast Table entries
3034 * in the DA-Filter table.
3035 * The method gets the CRC-8 value from the calling routine and
3037 * specified CRC-8 .
3052 if (queue == -1) { in mvneta_set_other_mcast_addr()
3065 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0xFF).
3067 * Table entries in the DA-Filter table.
3068 * 2) Other Multicast Table for multicast of another type. A CRC-8 value
3070 * DA-Filter table.
3083 if (queue == -1) { in mvneta_mcast_addr_set()
3084 if (pp->mcast_count[crc_result] == 0) { in mvneta_mcast_addr_set()
3085 netdev_info(pp->dev, "No valid Mcast for crc8=0x%02x\n", in mvneta_mcast_addr_set()
3087 return -EINVAL; in mvneta_mcast_addr_set()
3090 pp->mcast_count[crc_result]--; in mvneta_mcast_addr_set()
3091 if (pp->mcast_count[crc_result] != 0) { in mvneta_mcast_addr_set()
3092 netdev_info(pp->dev, in mvneta_mcast_addr_set()
3094 pp->mcast_count[crc_result], crc_result); in mvneta_mcast_addr_set()
3095 return -EINVAL; in mvneta_mcast_addr_set()
3098 pp->mcast_count[crc_result]++; in mvneta_mcast_addr_set()
3138 if (dev->flags & IFF_PROMISC) { in mvneta_set_rx_mode()
3141 mvneta_set_ucast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3142 mvneta_set_special_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3143 mvneta_set_other_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3147 mvneta_set_ucast_table(pp, -1); in mvneta_set_rx_mode()
3148 mvneta_mac_addr_set(pp, dev->dev_addr, pp->rxq_def); in mvneta_set_rx_mode()
3150 if (dev->flags & IFF_ALLMULTI) { in mvneta_set_rx_mode()
3152 mvneta_set_special_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3153 mvneta_set_other_mcast_table(pp, pp->rxq_def); in mvneta_set_rx_mode()
3156 mvneta_set_special_mcast_table(pp, -1); in mvneta_set_rx_mode()
3157 mvneta_set_other_mcast_table(pp, -1); in mvneta_set_rx_mode()
3161 mvneta_mcast_addr_set(pp, ha->addr, in mvneta_set_rx_mode()
3162 pp->rxq_def); in mvneta_set_rx_mode()
3169 /* Interrupt handling - the callback for request_irq() */
3175 napi_schedule(&pp->napi); in mvneta_isr()
3180 /* Interrupt handling - the callback for request_percpu_irq() */
3185 disable_percpu_irq(port->pp->dev->irq); in mvneta_percpu_isr()
3186 napi_schedule(&port->napi); in mvneta_percpu_isr()
3195 phylink_mac_change(pp->phylink, !!(gmac_stat & MVNETA_GMAC_LINK_UP)); in mvneta_link_change()
3199 * Bits 0 - 7 of the causeRxTx register indicate that are transmitted
3200 * packets on the corresponding TXQ (Bit 0 is for TX queue 1).
3201 * Bits 8 -15 of the cause Rx Tx register indicate that are received
3210 struct mvneta_port *pp = netdev_priv(napi->dev); in mvneta_poll()
3211 struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports); in mvneta_poll()
3213 if (!netif_running(pp->dev)) { in mvneta_poll()
3230 /* Release Tx descriptors */ in mvneta_poll()
3239 cause_rx_tx |= pp->neta_armada3700 ? pp->cause_rx_tx : in mvneta_poll()
3240 port->cause_rx_tx; in mvneta_poll()
3244 rx_queue = rx_queue - 1; in mvneta_poll()
3245 if (pp->bm_priv) in mvneta_poll()
3247 &pp->rxqs[rx_queue]); in mvneta_poll()
3250 &pp->rxqs[rx_queue]); in mvneta_poll()
3257 if (pp->neta_armada3700) { in mvneta_poll()
3267 enable_percpu_irq(pp->dev->irq, 0); in mvneta_poll()
3271 if (pp->neta_armada3700) in mvneta_poll()
3272 pp->cause_rx_tx = cause_rx_tx; in mvneta_poll()
3274 port->cause_rx_tx = cause_rx_tx; in mvneta_poll()
3282 struct bpf_prog *xdp_prog = READ_ONCE(pp->xdp_prog); in mvneta_create_page_pool()
3288 .dev = pp->dev->dev.parent, in mvneta_create_page_pool()
3290 .offset = pp->rx_offset_correction, in mvneta_create_page_pool()
3295 rxq->page_pool = page_pool_create(&pp_params); in mvneta_create_page_pool()
3296 if (IS_ERR(rxq->page_pool)) { in mvneta_create_page_pool()
3297 err = PTR_ERR(rxq->page_pool); in mvneta_create_page_pool()
3298 rxq->page_pool = NULL; in mvneta_create_page_pool()
3302 err = __xdp_rxq_info_reg(&rxq->xdp_rxq, pp->dev, rxq->id, 0, in mvneta_create_page_pool()
3307 err = xdp_rxq_info_reg_mem_model(&rxq->xdp_rxq, MEM_TYPE_PAGE_POOL, in mvneta_create_page_pool()
3308 rxq->page_pool); in mvneta_create_page_pool()
3315 xdp_rxq_info_unreg(&rxq->xdp_rxq); in mvneta_create_page_pool()
3317 page_pool_destroy(rxq->page_pool); in mvneta_create_page_pool()
3318 rxq->page_pool = NULL; in mvneta_create_page_pool()
3333 memset(rxq->descs + i, 0, sizeof(struct mvneta_rx_desc)); in mvneta_rxq_fill()
3334 if (mvneta_rx_refill(pp, rxq->descs + i, rxq, in mvneta_rxq_fill()
3336 netdev_err(pp->dev, in mvneta_rxq_fill()
3338 __func__, rxq->id, i, num); in mvneta_rxq_fill()
3351 /* Free all packets pending transmit from all TXQs and reset TX port */
3356 /* free the skb's in the tx ring */ in mvneta_tx_reset()
3358 mvneta_txq_done_force(pp, &pp->txqs[queue]); in mvneta_tx_reset()
3370 /* Rx/Tx queue initialization/cleanup methods */
3375 rxq->size = pp->rx_ring_size; in mvneta_rxq_sw_init()
3378 rxq->descs = dma_alloc_coherent(pp->dev->dev.parent, in mvneta_rxq_sw_init()
3379 rxq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_rxq_sw_init()
3380 &rxq->descs_phys, GFP_KERNEL); in mvneta_rxq_sw_init()
3381 if (!rxq->descs) in mvneta_rxq_sw_init()
3382 return -ENOMEM; in mvneta_rxq_sw_init()
3384 rxq->last_desc = rxq->size - 1; in mvneta_rxq_sw_init()
3393 mvreg_write(pp, MVNETA_RXQ_BASE_ADDR_REG(rxq->id), rxq->descs_phys); in mvneta_rxq_hw_init()
3394 mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), rxq->size); in mvneta_rxq_hw_init()
3397 mvneta_rx_pkts_coal_set(pp, rxq, rxq->pkts_coal); in mvneta_rxq_hw_init()
3398 mvneta_rx_time_coal_set(pp, rxq, rxq->time_coal); in mvneta_rxq_hw_init()
3400 if (!pp->bm_priv) { in mvneta_rxq_hw_init()
3405 MVNETA_RX_BUF_SIZE(pp->pkt_size)); in mvneta_rxq_hw_init()
3407 mvneta_rxq_fill(pp, rxq, rxq->size); in mvneta_rxq_hw_init()
3411 NET_SKB_PAD - pp->rx_offset_correction); in mvneta_rxq_hw_init()
3417 mvneta_rxq_non_occup_desc_add(pp, rxq, rxq->size); in mvneta_rxq_hw_init()
3443 if (rxq->descs) in mvneta_rxq_deinit()
3444 dma_free_coherent(pp->dev->dev.parent, in mvneta_rxq_deinit()
3445 rxq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_rxq_deinit()
3446 rxq->descs, in mvneta_rxq_deinit()
3447 rxq->descs_phys); in mvneta_rxq_deinit()
3449 rxq->descs = NULL; in mvneta_rxq_deinit()
3450 rxq->last_desc = 0; in mvneta_rxq_deinit()
3451 rxq->next_desc_to_proc = 0; in mvneta_rxq_deinit()
3452 rxq->descs_phys = 0; in mvneta_rxq_deinit()
3453 rxq->first_to_refill = 0; in mvneta_rxq_deinit()
3454 rxq->refill_num = 0; in mvneta_rxq_deinit()
3462 txq->size = pp->tx_ring_size; in mvneta_txq_sw_init()
3468 txq->tx_stop_threshold = txq->size - MVNETA_MAX_SKB_DESCS; in mvneta_txq_sw_init()
3469 txq->tx_wake_threshold = txq->tx_stop_threshold / 2; in mvneta_txq_sw_init()
3471 /* Allocate memory for TX descriptors */ in mvneta_txq_sw_init()
3472 txq->descs = dma_alloc_coherent(pp->dev->dev.parent, in mvneta_txq_sw_init()
3473 txq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_txq_sw_init()
3474 &txq->descs_phys, GFP_KERNEL); in mvneta_txq_sw_init()
3475 if (!txq->descs) in mvneta_txq_sw_init()
3476 return -ENOMEM; in mvneta_txq_sw_init()
3478 txq->last_desc = txq->size - 1; in mvneta_txq_sw_init()
3480 txq->buf = kmalloc_array(txq->size, sizeof(*txq->buf), GFP_KERNEL); in mvneta_txq_sw_init()
3481 if (!txq->buf) in mvneta_txq_sw_init()
3482 return -ENOMEM; in mvneta_txq_sw_init()
3485 txq->tso_hdrs = dma_alloc_coherent(pp->dev->dev.parent, in mvneta_txq_sw_init()
3486 txq->size * TSO_HEADER_SIZE, in mvneta_txq_sw_init()
3487 &txq->tso_hdrs_phys, GFP_KERNEL); in mvneta_txq_sw_init()
3488 if (!txq->tso_hdrs) in mvneta_txq_sw_init()
3489 return -ENOMEM; in mvneta_txq_sw_init()
3492 if (pp->neta_armada3700) in mvneta_txq_sw_init()
3495 cpu = txq->id % num_present_cpus(); in mvneta_txq_sw_init()
3497 cpu = pp->rxq_def % num_present_cpus(); in mvneta_txq_sw_init()
3498 cpumask_set_cpu(cpu, &txq->affinity_mask); in mvneta_txq_sw_init()
3499 netif_set_xps_queue(pp->dev, &txq->affinity_mask, txq->id); in mvneta_txq_sw_init()
3508 mvreg_write(pp, MVETH_TXQ_TOKEN_CFG_REG(txq->id), 0x03ffffff); in mvneta_txq_hw_init()
3509 mvreg_write(pp, MVETH_TXQ_TOKEN_COUNT_REG(txq->id), 0x3fffffff); in mvneta_txq_hw_init()
3511 /* Set Tx descriptors queue starting address */ in mvneta_txq_hw_init()
3512 mvreg_write(pp, MVNETA_TXQ_BASE_ADDR_REG(txq->id), txq->descs_phys); in mvneta_txq_hw_init()
3513 mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), txq->size); in mvneta_txq_hw_init()
3515 mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal); in mvneta_txq_hw_init()
3518 /* Create and initialize a tx queue */
3537 struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); in mvneta_txq_sw_deinit()
3539 kfree(txq->buf); in mvneta_txq_sw_deinit()
3541 if (txq->tso_hdrs) in mvneta_txq_sw_deinit()
3542 dma_free_coherent(pp->dev->dev.parent, in mvneta_txq_sw_deinit()
3543 txq->size * TSO_HEADER_SIZE, in mvneta_txq_sw_deinit()
3544 txq->tso_hdrs, txq->tso_hdrs_phys); in mvneta_txq_sw_deinit()
3545 if (txq->descs) in mvneta_txq_sw_deinit()
3546 dma_free_coherent(pp->dev->dev.parent, in mvneta_txq_sw_deinit()
3547 txq->size * MVNETA_DESC_ALIGNED_SIZE, in mvneta_txq_sw_deinit()
3548 txq->descs, txq->descs_phys); in mvneta_txq_sw_deinit()
3552 txq->descs = NULL; in mvneta_txq_sw_deinit()
3553 txq->last_desc = 0; in mvneta_txq_sw_deinit()
3554 txq->next_desc_to_proc = 0; in mvneta_txq_sw_deinit()
3555 txq->descs_phys = 0; in mvneta_txq_sw_deinit()
3562 mvreg_write(pp, MVETH_TXQ_TOKEN_CFG_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3563 mvreg_write(pp, MVETH_TXQ_TOKEN_COUNT_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3565 /* Set Tx descriptors queue starting address and size */ in mvneta_txq_hw_deinit()
3566 mvreg_write(pp, MVNETA_TXQ_BASE_ADDR_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3567 mvreg_write(pp, MVNETA_TXQ_SIZE_REG(txq->id), 0); in mvneta_txq_hw_deinit()
3577 /* Cleanup all Tx queues */
3583 mvneta_txq_deinit(pp, &pp->txqs[queue]); in mvneta_cleanup_txqs()
3592 mvneta_rxq_deinit(pp, &pp->rxqs[queue]); in mvneta_cleanup_rxqs()
3602 int err = mvneta_rxq_init(pp, &pp->rxqs[queue]); in mvneta_setup_rxqs()
3605 netdev_err(pp->dev, "%s: can't create rxq=%d\n", in mvneta_setup_rxqs()
3615 /* Init all tx queues */
3621 int err = mvneta_txq_init(pp, &pp->txqs[queue]); in mvneta_setup_txqs()
3623 netdev_err(pp->dev, "%s: can't create txq=%d\n", in mvneta_setup_txqs()
3637 ret = phy_set_mode_ext(pp->comphy, PHY_MODE_ETHERNET, interface); in mvneta_comphy_init()
3641 return phy_power_on(pp->comphy); in mvneta_comphy_init()
3649 if (pp->comphy) { in mvneta_config_interface()
3677 pp->phy_interface = interface; in mvneta_config_interface()
3686 WARN_ON(mvneta_config_interface(pp, pp->phy_interface)); in mvneta_start_dev()
3688 mvneta_max_rx_size_set(pp, pp->pkt_size); in mvneta_start_dev()
3689 mvneta_txq_max_tx_size_set(pp, pp->pkt_size); in mvneta_start_dev()
3691 /* start the Rx/Tx activity */ in mvneta_start_dev()
3694 if (!pp->neta_armada3700) { in mvneta_start_dev()
3698 per_cpu_ptr(pp->ports, cpu); in mvneta_start_dev()
3700 napi_enable(&port->napi); in mvneta_start_dev()
3703 napi_enable(&pp->napi); in mvneta_start_dev()
3713 phylink_start(pp->phylink); in mvneta_start_dev()
3716 phylink_speed_up(pp->phylink); in mvneta_start_dev()
3718 netif_tx_start_all_queues(pp->dev); in mvneta_start_dev()
3720 clear_bit(__MVNETA_DOWN, &pp->state); in mvneta_start_dev()
3727 set_bit(__MVNETA_DOWN, &pp->state); in mvneta_stop_dev()
3729 if (device_may_wakeup(&pp->dev->dev)) in mvneta_stop_dev()
3730 phylink_speed_down(pp->phylink, false); in mvneta_stop_dev()
3732 phylink_stop(pp->phylink); in mvneta_stop_dev()
3734 if (!pp->neta_armada3700) { in mvneta_stop_dev()
3737 per_cpu_ptr(pp->ports, cpu); in mvneta_stop_dev()
3739 napi_disable(&port->napi); in mvneta_stop_dev()
3742 napi_disable(&pp->napi); in mvneta_stop_dev()
3745 netif_carrier_off(pp->dev); in mvneta_stop_dev()
3748 netif_tx_stop_all_queues(pp->dev); in mvneta_stop_dev()
3762 WARN_ON(phy_power_off(pp->comphy)); in mvneta_stop_dev()
3769 enable_percpu_irq(pp->dev->irq, IRQ_TYPE_NONE); in mvneta_percpu_enable()
3776 disable_percpu_irq(pp->dev->irq); in mvneta_percpu_disable()
3783 struct bpf_prog *prog = pp->xdp_prog; in mvneta_change_mtu()
3792 if (prog && !prog->aux->xdp_has_frags && in mvneta_change_mtu()
3797 return -EINVAL; in mvneta_change_mtu()
3800 dev->mtu = mtu; in mvneta_change_mtu()
3803 if (pp->bm_priv) in mvneta_change_mtu()
3819 if (pp->bm_priv) in mvneta_change_mtu()
3822 pp->pkt_size = MVNETA_RX_PKT_SIZE(dev->mtu); in mvneta_change_mtu()
3849 if (pp->tx_csum_limit && dev->mtu > pp->tx_csum_limit) { in mvneta_fix_features()
3853 pp->tx_csum_limit); in mvneta_fix_features()
3885 mvneta_mac_addr_set(pp, dev->dev_addr, -1); in mvneta_set_mac_addr()
3888 mvneta_mac_addr_set(pp, sockaddr->sa_data, pp->rxq_def); in mvneta_set_mac_addr()
3905 * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ... in mvneta_pcs_validate()
3906 * When <PortType> = 1 (1000BASE-X) this field must be set to 1." in mvneta_pcs_validate()
3908 if (phy_interface_mode_is_8023z(state->interface) && in mvneta_pcs_validate()
3909 !phylink_test(state->advertising, Autoneg)) in mvneta_pcs_validate()
3910 return -EINVAL; in mvneta_pcs_validate()
3924 state->speed = in mvneta_pcs_get_state()
3925 state->interface == PHY_INTERFACE_MODE_2500BASEX ? in mvneta_pcs_get_state()
3928 state->speed = SPEED_100; in mvneta_pcs_get_state()
3930 state->speed = SPEED_10; in mvneta_pcs_get_state()
3932 state->an_complete = !!(gmac_stat & MVNETA_GMAC_AN_COMPLETE); in mvneta_pcs_get_state()
3933 state->link = !!(gmac_stat & MVNETA_GMAC_LINK_UP); in mvneta_pcs_get_state()
3934 state->duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX); in mvneta_pcs_get_state()
3937 state->pause |= MLO_PAUSE_RX; in mvneta_pcs_get_state()
3939 state->pause |= MLO_PAUSE_TX; in mvneta_pcs_get_state()
3984 /* Phy or fixed speed - disable in-band AN modes */ in mvneta_pcs_config()
4019 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_select_pcs()
4022 return &pp->phylink_pcs; in mvneta_mac_select_pcs()
4028 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_prepare()
4032 if (pp->phy_interface != interface || in mvneta_mac_prepare()
4035 * in-band mode. According to Armada 370 documentation, we in mvneta_mac_prepare()
4036 * can only change the port mode and in-band enable when the in mvneta_mac_prepare()
4045 if (pp->phy_interface != interface) in mvneta_mac_prepare()
4046 WARN_ON(phy_power_off(pp->comphy)); in mvneta_mac_prepare()
4050 unsigned long rate = clk_get_rate(pp->clk); in mvneta_mac_prepare()
4062 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_config()
4078 if (state->interface == PHY_INTERFACE_MODE_QSGMII || in mvneta_mac_config()
4079 state->interface == PHY_INTERFACE_MODE_SGMII || in mvneta_mac_config()
4080 phy_interface_mode_is_8023z(state->interface)) in mvneta_mac_config()
4084 /* Phy or fixed speed - nothing to do, leave the in mvneta_mac_config()
4085 * configured speed, duplex and flow control as-is. in mvneta_mac_config()
4087 } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { in mvneta_mac_config()
4091 /* 802.3z negotiation - only 1000base-X */ in mvneta_mac_config()
4098 if (state->interface == PHY_INTERFACE_MODE_2500BASEX) in mvneta_mac_config()
4118 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_finish()
4122 /* Disable 1ms clock if not in in-band mode */ in mvneta_mac_finish()
4129 if (pp->phy_interface != interface) in mvneta_mac_finish()
4133 /* Allow the link to come up if in in-band mode, otherwise the in mvneta_mac_finish()
4160 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_link_down()
4173 pp->eee_active = false; in mvneta_mac_link_down()
4183 struct net_device *ndev = to_net_dev(config->dev); in mvneta_mac_link_up()
4224 if (phy && pp->eee_enabled) { in mvneta_mac_link_up()
4225 pp->eee_active = phy_init_eee(phy, false) >= 0; in mvneta_mac_link_up()
4226 mvneta_set_eee(pp, pp->eee_active && pp->tx_lpi_enabled); in mvneta_mac_link_up()
4243 int err = phylink_of_phy_connect(pp->phylink, pp->dn, 0); in mvneta_mdio_probe()
4246 netdev_err(pp->dev, "could not attach PHY: %d\n", err); in mvneta_mdio_probe()
4248 phylink_ethtool_get_wol(pp->phylink, &wol); in mvneta_mdio_probe()
4249 device_set_wakeup_capable(&pp->dev->dev, !!wol.supported); in mvneta_mdio_probe()
4253 device_set_wakeup_enable(&pp->dev->dev, !!wol.wolopts); in mvneta_mdio_probe()
4260 phylink_disconnect_phy(pp->phylink); in mvneta_mdio_remove()
4274 if (pp->rxq_def < nr_cpu_ids && cpu_online(pp->rxq_def)) in mvneta_percpu_elect()
4275 elected_cpu = pp->rxq_def; in mvneta_percpu_elect()
4289 rxq_map |= MVNETA_CPU_RXQ_ACCESS(pp->rxq_def); in mvneta_percpu_elect()
4291 /* We update the TX queue map only if we have one in mvneta_percpu_elect()
4292 * queue. In this case we associate the TX queue to in mvneta_percpu_elect()
4319 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); in mvneta_cpu_online()
4321 /* Armada 3700's per-cpu interrupt for mvneta is broken, all interrupts in mvneta_cpu_online()
4322 * are routed to CPU 0, so we don't need all the cpu-hotplug support in mvneta_cpu_online()
4324 if (pp->neta_armada3700) in mvneta_cpu_online()
4327 spin_lock(&pp->lock); in mvneta_cpu_online()
4332 if (pp->is_stopped) { in mvneta_cpu_online()
4333 spin_unlock(&pp->lock); in mvneta_cpu_online()
4336 netif_tx_stop_all_queues(pp->dev); in mvneta_cpu_online()
4345 per_cpu_ptr(pp->ports, other_cpu); in mvneta_cpu_online()
4347 napi_synchronize(&other_port->napi); in mvneta_cpu_online()
4353 napi_enable(&port->napi); in mvneta_cpu_online()
4356 * Enable per-CPU interrupts on the CPU that is in mvneta_cpu_online()
4362 * Enable per-CPU interrupt on the one CPU we care in mvneta_cpu_online()
4372 netif_tx_start_all_queues(pp->dev); in mvneta_cpu_online()
4373 spin_unlock(&pp->lock); in mvneta_cpu_online()
4381 struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); in mvneta_cpu_down_prepare()
4387 spin_lock(&pp->lock); in mvneta_cpu_down_prepare()
4390 spin_unlock(&pp->lock); in mvneta_cpu_down_prepare()
4392 napi_synchronize(&port->napi); in mvneta_cpu_down_prepare()
4393 napi_disable(&port->napi); in mvneta_cpu_down_prepare()
4394 /* Disable per-CPU interrupts on the CPU that is brought down. */ in mvneta_cpu_down_prepare()
4405 spin_lock(&pp->lock); in mvneta_cpu_dead()
4407 spin_unlock(&pp->lock); in mvneta_cpu_dead()
4413 netif_tx_start_all_queues(pp->dev); in mvneta_cpu_dead()
4422 pp->pkt_size = MVNETA_RX_PKT_SIZE(pp->dev->mtu); in mvneta_open()
4433 if (pp->neta_armada3700) in mvneta_open()
4434 ret = request_irq(pp->dev->irq, mvneta_isr, 0, in mvneta_open()
4435 dev->name, pp); in mvneta_open()
4437 ret = request_percpu_irq(pp->dev->irq, mvneta_percpu_isr, in mvneta_open()
4438 dev->name, pp->ports); in mvneta_open()
4440 netdev_err(pp->dev, "cannot request irq %d\n", pp->dev->irq); in mvneta_open()
4444 if (!pp->neta_armada3700) { in mvneta_open()
4445 /* Enable per-CPU interrupt on all the CPU to handle our RX in mvneta_open()
4450 pp->is_stopped = false; in mvneta_open()
4455 &pp->node_online); in mvneta_open()
4460 &pp->node_dead); in mvneta_open()
4476 if (!pp->neta_armada3700) in mvneta_open()
4478 &pp->node_dead); in mvneta_open()
4480 if (!pp->neta_armada3700) in mvneta_open()
4482 &pp->node_online); in mvneta_open()
4484 if (pp->neta_armada3700) { in mvneta_open()
4485 free_irq(pp->dev->irq, pp); in mvneta_open()
4488 free_percpu_irq(pp->dev->irq, pp->ports); in mvneta_open()
4502 if (!pp->neta_armada3700) { in mvneta_stop()
4508 spin_lock(&pp->lock); in mvneta_stop()
4509 pp->is_stopped = true; in mvneta_stop()
4510 spin_unlock(&pp->lock); in mvneta_stop()
4516 &pp->node_online); in mvneta_stop()
4518 &pp->node_dead); in mvneta_stop()
4520 free_percpu_irq(dev->irq, pp->ports); in mvneta_stop()
4524 free_irq(dev->irq, pp); in mvneta_stop()
4537 return phylink_mii_ioctl(pp->phylink, ifr, cmd); in mvneta_ioctl()
4547 if (prog && !prog->aux->xdp_has_frags && in mvneta_xdp_setup()
4548 dev->mtu > MVNETA_MAX_RX_BUF_SIZE) { in mvneta_xdp_setup()
4550 return -EOPNOTSUPP; in mvneta_xdp_setup()
4553 if (pp->bm_priv) { in mvneta_xdp_setup()
4556 return -EOPNOTSUPP; in mvneta_xdp_setup()
4559 need_update = !!pp->xdp_prog != !!prog; in mvneta_xdp_setup()
4563 old_prog = xchg(&pp->xdp_prog, prog); in mvneta_xdp_setup()
4575 switch (xdp->command) { in mvneta_xdp()
4577 return mvneta_xdp_setup(dev, xdp->prog, xdp->extack); in mvneta_xdp()
4579 return -EINVAL; in mvneta_xdp()
4592 return phylink_ethtool_ksettings_set(pp->phylink, cmd); in mvneta_ethtool_set_link_ksettings()
4602 return phylink_ethtool_ksettings_get(pp->phylink, cmd); in mvneta_ethtool_get_link_ksettings()
4609 return phylink_ethtool_nway_reset(pp->phylink); in mvneta_ethtool_nway_reset()
4623 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_ethtool_set_coalesce()
4624 rxq->time_coal = c->rx_coalesce_usecs; in mvneta_ethtool_set_coalesce()
4625 rxq->pkts_coal = c->rx_max_coalesced_frames; in mvneta_ethtool_set_coalesce()
4626 mvneta_rx_pkts_coal_set(pp, rxq, rxq->pkts_coal); in mvneta_ethtool_set_coalesce()
4627 mvneta_rx_time_coal_set(pp, rxq, rxq->time_coal); in mvneta_ethtool_set_coalesce()
4631 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_ethtool_set_coalesce()
4632 txq->done_pkts_coal = c->tx_max_coalesced_frames; in mvneta_ethtool_set_coalesce()
4633 mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal); in mvneta_ethtool_set_coalesce()
4648 c->rx_coalesce_usecs = pp->rxqs[0].time_coal; in mvneta_ethtool_get_coalesce()
4649 c->rx_max_coalesced_frames = pp->rxqs[0].pkts_coal; in mvneta_ethtool_get_coalesce()
4651 c->tx_max_coalesced_frames = pp->txqs[0].done_pkts_coal; in mvneta_ethtool_get_coalesce()
4659 strscpy(drvinfo->driver, MVNETA_DRIVER_NAME, in mvneta_ethtool_get_drvinfo()
4660 sizeof(drvinfo->driver)); in mvneta_ethtool_get_drvinfo()
4661 strscpy(drvinfo->version, MVNETA_DRIVER_VERSION, in mvneta_ethtool_get_drvinfo()
4662 sizeof(drvinfo->version)); in mvneta_ethtool_get_drvinfo()
4663 strscpy(drvinfo->bus_info, dev_name(&dev->dev), in mvneta_ethtool_get_drvinfo()
4664 sizeof(drvinfo->bus_info)); in mvneta_ethtool_get_drvinfo()
4676 ring->rx_max_pending = MVNETA_MAX_RXD; in mvneta_ethtool_get_ringparam()
4677 ring->tx_max_pending = MVNETA_MAX_TXD; in mvneta_ethtool_get_ringparam()
4678 ring->rx_pending = pp->rx_ring_size; in mvneta_ethtool_get_ringparam()
4679 ring->tx_pending = pp->tx_ring_size; in mvneta_ethtool_get_ringparam()
4690 if ((ring->rx_pending == 0) || (ring->tx_pending == 0)) in mvneta_ethtool_set_ringparam()
4691 return -EINVAL; in mvneta_ethtool_set_ringparam()
4692 pp->rx_ring_size = ring->rx_pending < MVNETA_MAX_RXD ? in mvneta_ethtool_set_ringparam()
4693 ring->rx_pending : MVNETA_MAX_RXD; in mvneta_ethtool_set_ringparam()
4695 pp->tx_ring_size = clamp_t(u16, ring->tx_pending, in mvneta_ethtool_set_ringparam()
4697 if (pp->tx_ring_size != ring->tx_pending) in mvneta_ethtool_set_ringparam()
4698 netdev_warn(dev, "TX queue size set to %u (requested %u)\n", in mvneta_ethtool_set_ringparam()
4699 pp->tx_ring_size, ring->tx_pending); in mvneta_ethtool_set_ringparam()
4706 return -ENOMEM; in mvneta_ethtool_set_ringparam()
4718 phylink_ethtool_get_pauseparam(pp->phylink, pause); in mvneta_ethtool_get_pauseparam()
4726 return phylink_ethtool_set_pauseparam(pp->phylink, pause); in mvneta_ethtool_set_pauseparam()
4763 stats = per_cpu_ptr(pp->stats, cpu); in mvneta_ethtool_update_pcpu_stats()
4765 start = u64_stats_fetch_begin_irq(&stats->syncp); in mvneta_ethtool_update_pcpu_stats()
4766 skb_alloc_error = stats->es.skb_alloc_error; in mvneta_ethtool_update_pcpu_stats()
4767 refill_error = stats->es.refill_error; in mvneta_ethtool_update_pcpu_stats()
4768 xdp_redirect = stats->es.ps.xdp_redirect; in mvneta_ethtool_update_pcpu_stats()
4769 xdp_pass = stats->es.ps.xdp_pass; in mvneta_ethtool_update_pcpu_stats()
4770 xdp_drop = stats->es.ps.xdp_drop; in mvneta_ethtool_update_pcpu_stats()
4771 xdp_xmit = stats->es.ps.xdp_xmit; in mvneta_ethtool_update_pcpu_stats()
4772 xdp_xmit_err = stats->es.ps.xdp_xmit_err; in mvneta_ethtool_update_pcpu_stats()
4773 xdp_tx = stats->es.ps.xdp_tx; in mvneta_ethtool_update_pcpu_stats()
4774 xdp_tx_err = stats->es.ps.xdp_tx_err; in mvneta_ethtool_update_pcpu_stats()
4775 } while (u64_stats_fetch_retry_irq(&stats->syncp, start)); in mvneta_ethtool_update_pcpu_stats()
4777 es->skb_alloc_error += skb_alloc_error; in mvneta_ethtool_update_pcpu_stats()
4778 es->refill_error += refill_error; in mvneta_ethtool_update_pcpu_stats()
4779 es->ps.xdp_redirect += xdp_redirect; in mvneta_ethtool_update_pcpu_stats()
4780 es->ps.xdp_pass += xdp_pass; in mvneta_ethtool_update_pcpu_stats()
4781 es->ps.xdp_drop += xdp_drop; in mvneta_ethtool_update_pcpu_stats()
4782 es->ps.xdp_xmit += xdp_xmit; in mvneta_ethtool_update_pcpu_stats()
4783 es->ps.xdp_xmit_err += xdp_xmit_err; in mvneta_ethtool_update_pcpu_stats()
4784 es->ps.xdp_tx += xdp_tx; in mvneta_ethtool_update_pcpu_stats()
4785 es->ps.xdp_tx_err += xdp_tx_err; in mvneta_ethtool_update_pcpu_stats()
4793 void __iomem *base = pp->base; in mvneta_ethtool_update_stats()
4802 switch (s->type) { in mvneta_ethtool_update_stats()
4804 val = readl_relaxed(base + s->offset); in mvneta_ethtool_update_stats()
4805 pp->ethtool_stats[i] += val; in mvneta_ethtool_update_stats()
4808 /* Docs say to read low 32-bit then high */ in mvneta_ethtool_update_stats()
4809 low = readl_relaxed(base + s->offset); in mvneta_ethtool_update_stats()
4810 high = readl_relaxed(base + s->offset + 4); in mvneta_ethtool_update_stats()
4812 pp->ethtool_stats[i] += val; in mvneta_ethtool_update_stats()
4815 switch (s->offset) { in mvneta_ethtool_update_stats()
4817 val = phylink_get_eee_err(pp->phylink); in mvneta_ethtool_update_stats()
4818 pp->ethtool_stats[i] += val; in mvneta_ethtool_update_stats()
4821 pp->ethtool_stats[i] = stats.skb_alloc_error; in mvneta_ethtool_update_stats()
4824 pp->ethtool_stats[i] = stats.refill_error; in mvneta_ethtool_update_stats()
4827 pp->ethtool_stats[i] = stats.ps.xdp_redirect; in mvneta_ethtool_update_stats()
4830 pp->ethtool_stats[i] = stats.ps.xdp_pass; in mvneta_ethtool_update_stats()
4833 pp->ethtool_stats[i] = stats.ps.xdp_drop; in mvneta_ethtool_update_stats()
4836 pp->ethtool_stats[i] = stats.ps.xdp_tx; in mvneta_ethtool_update_stats()
4839 pp->ethtool_stats[i] = stats.ps.xdp_tx_err; in mvneta_ethtool_update_stats()
4842 pp->ethtool_stats[i] = stats.ps.xdp_xmit; in mvneta_ethtool_update_stats()
4845 pp->ethtool_stats[i] = stats.ps.xdp_xmit_err; in mvneta_ethtool_update_stats()
4859 page_pool_get_stats(pp->rxqs[i].page_pool, &stats); in mvneta_ethtool_pp_stats()
4873 *data++ = pp->ethtool_stats[i]; in mvneta_ethtool_get_stats()
4884 return -EOPNOTSUPP; in mvneta_ethtool_get_sset_count()
4896 switch (info->cmd) { in mvneta_ethtool_get_rxnfc()
4898 info->data = rxq_number; in mvneta_ethtool_get_rxnfc()
4901 return -EOPNOTSUPP; in mvneta_ethtool_get_rxnfc()
4903 return -EOPNOTSUPP; in mvneta_ethtool_get_rxnfc()
4912 netif_tx_stop_all_queues(pp->dev); in mvneta_config_rss()
4916 if (!pp->neta_armada3700) { in mvneta_config_rss()
4920 per_cpu_ptr(pp->ports, cpu); in mvneta_config_rss()
4922 napi_synchronize(&pcpu_port->napi); in mvneta_config_rss()
4923 napi_disable(&pcpu_port->napi); in mvneta_config_rss()
4926 napi_synchronize(&pp->napi); in mvneta_config_rss()
4927 napi_disable(&pp->napi); in mvneta_config_rss()
4930 pp->rxq_def = pp->indir[0]; in mvneta_config_rss()
4933 mvneta_set_rx_mode(pp->dev); in mvneta_config_rss()
4936 val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def); in mvneta_config_rss()
4940 spin_lock(&pp->lock); in mvneta_config_rss()
4942 spin_unlock(&pp->lock); in mvneta_config_rss()
4944 if (!pp->neta_armada3700) { in mvneta_config_rss()
4948 per_cpu_ptr(pp->ports, cpu); in mvneta_config_rss()
4950 napi_enable(&pcpu_port->napi); in mvneta_config_rss()
4953 napi_enable(&pp->napi); in mvneta_config_rss()
4956 netif_tx_start_all_queues(pp->dev); in mvneta_config_rss()
4967 if (pp->neta_armada3700) in mvneta_ethtool_set_rxfh()
4968 return -EOPNOTSUPP; in mvneta_ethtool_set_rxfh()
4975 return -EOPNOTSUPP; in mvneta_ethtool_set_rxfh()
4980 memcpy(pp->indir, indir, MVNETA_RSS_LU_TABLE_SIZE); in mvneta_ethtool_set_rxfh()
4991 if (pp->neta_armada3700) in mvneta_ethtool_get_rxfh()
4992 return -EOPNOTSUPP; in mvneta_ethtool_get_rxfh()
5000 memcpy(indir, pp->indir, MVNETA_RSS_LU_TABLE_SIZE); in mvneta_ethtool_get_rxfh()
5010 phylink_ethtool_get_wol(pp->phylink, wol); in mvneta_ethtool_get_wol()
5019 ret = phylink_ethtool_set_wol(pp->phylink, wol); in mvneta_ethtool_set_wol()
5021 device_set_wakeup_enable(&dev->dev, !!wol->wolopts); in mvneta_ethtool_set_wol()
5027 struct ethtool_eee *eee) in mvneta_ethtool_get_eee() argument
5034 eee->eee_enabled = pp->eee_enabled; in mvneta_ethtool_get_eee()
5035 eee->eee_active = pp->eee_active; in mvneta_ethtool_get_eee()
5036 eee->tx_lpi_enabled = pp->tx_lpi_enabled; in mvneta_ethtool_get_eee()
5037 eee->tx_lpi_timer = (lpi_ctl0) >> 8; // * scale; in mvneta_ethtool_get_eee()
5039 return phylink_ethtool_get_eee(pp->phylink, eee); in mvneta_ethtool_get_eee()
5043 struct ethtool_eee *eee) in mvneta_ethtool_set_eee() argument
5049 * it being an 8-bit register. in mvneta_ethtool_set_eee()
5051 if (eee->tx_lpi_enabled && eee->tx_lpi_timer > 255) in mvneta_ethtool_set_eee()
5052 return -EINVAL; in mvneta_ethtool_set_eee()
5056 lpi_ctl0 |= eee->tx_lpi_timer << 8; in mvneta_ethtool_set_eee()
5059 pp->eee_enabled = eee->eee_enabled; in mvneta_ethtool_set_eee()
5060 pp->tx_lpi_enabled = eee->tx_lpi_enabled; in mvneta_ethtool_set_eee()
5062 mvneta_set_eee(pp, eee->tx_lpi_enabled && eee->eee_enabled); in mvneta_ethtool_set_eee()
5064 return phylink_ethtool_set_eee(pp->phylink, eee); in mvneta_ethtool_set_eee()
5088 core_clk_rate = clk_get_rate(pp->clk); in mvneta_enable_per_queue_rate_limit()
5090 return -EINVAL; in mvneta_enable_per_queue_rate_limit()
5096 return -EINVAL; in mvneta_enable_per_queue_rate_limit()
5127 return -EINVAL; in mvneta_setup_queue_rates()
5134 return -EINVAL; in mvneta_setup_queue_rates()
5152 if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) in mvneta_setup_mqprio()
5155 num_tc = mqprio->qopt.num_tc; in mvneta_setup_mqprio()
5158 return -EINVAL; in mvneta_setup_mqprio()
5168 netdev_set_num_tc(dev, mqprio->qopt.num_tc); in mvneta_setup_mqprio()
5170 for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { in mvneta_setup_mqprio()
5171 netdev_set_tc_queue(dev, tc, mqprio->qopt.count[tc], in mvneta_setup_mqprio()
5172 mqprio->qopt.offset[tc]); in mvneta_setup_mqprio()
5174 for (rxq = mqprio->qopt.offset[tc]; in mvneta_setup_mqprio()
5175 rxq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; in mvneta_setup_mqprio()
5178 return -EINVAL; in mvneta_setup_mqprio()
5184 if (mqprio->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in mvneta_setup_mqprio()
5189 if (mqprio->qopt.num_tc > txq_number) in mvneta_setup_mqprio()
5190 return -EINVAL; in mvneta_setup_mqprio()
5196 for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { in mvneta_setup_mqprio()
5197 for (txq = mqprio->qopt.offset[tc]; in mvneta_setup_mqprio()
5198 txq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; in mvneta_setup_mqprio()
5201 return -EINVAL; in mvneta_setup_mqprio()
5204 mqprio->min_rate[tc], in mvneta_setup_mqprio()
5205 mqprio->max_rate[tc]); in mvneta_setup_mqprio()
5221 return -EOPNOTSUPP; in mvneta_setup_tc()
5278 pp->txqs = devm_kcalloc(dev, txq_number, sizeof(*pp->txqs), GFP_KERNEL); in mvneta_init()
5279 if (!pp->txqs) in mvneta_init()
5280 return -ENOMEM; in mvneta_init()
5282 /* Initialize TX descriptor rings */ in mvneta_init()
5284 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_init()
5285 txq->id = queue; in mvneta_init()
5286 txq->size = pp->tx_ring_size; in mvneta_init()
5287 txq->done_pkts_coal = MVNETA_TXDONE_COAL_PKTS; in mvneta_init()
5290 pp->rxqs = devm_kcalloc(dev, rxq_number, sizeof(*pp->rxqs), GFP_KERNEL); in mvneta_init()
5291 if (!pp->rxqs) in mvneta_init()
5292 return -ENOMEM; in mvneta_init()
5296 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_init()
5297 rxq->id = queue; in mvneta_init()
5298 rxq->size = pp->rx_ring_size; in mvneta_init()
5299 rxq->pkts_coal = MVNETA_RX_COAL_PKTS; in mvneta_init()
5300 rxq->time_coal = MVNETA_RX_COAL_USEC; in mvneta_init()
5301 rxq->buf_virt_addr in mvneta_init()
5302 = devm_kmalloc_array(pp->dev->dev.parent, in mvneta_init()
5303 rxq->size, in mvneta_init()
5304 sizeof(*rxq->buf_virt_addr), in mvneta_init()
5306 if (!rxq->buf_virt_addr) in mvneta_init()
5307 return -ENOMEM; in mvneta_init()
5333 for (i = 0; i < dram->num_cs; i++) { in mvneta_conf_mbus_windows()
5334 const struct mbus_dram_window *cs = dram->cs + i; in mvneta_conf_mbus_windows()
5337 (cs->base & 0xffff0000) | in mvneta_conf_mbus_windows()
5338 (cs->mbus_attr << 8) | in mvneta_conf_mbus_windows()
5339 dram->mbus_dram_target_id); in mvneta_conf_mbus_windows()
5342 (cs->size - 1) & 0xffff0000); in mvneta_conf_mbus_windows()
5348 if (pp->neta_ac5) in mvneta_conf_mbus_windows()
5375 return -EINVAL; in mvneta_port_power_up()
5383 struct device_node *dn = pdev->dev.of_node; in mvneta_probe()
5396 dev = devm_alloc_etherdev_mqs(&pdev->dev, sizeof(struct mvneta_port), in mvneta_probe()
5399 return -ENOMEM; in mvneta_probe()
5401 dev->tx_queue_len = MVNETA_MAX_TXD; in mvneta_probe()
5402 dev->watchdog_timeo = 5 * HZ; in mvneta_probe()
5403 dev->netdev_ops = &mvneta_netdev_ops; in mvneta_probe()
5404 dev->ethtool_ops = &mvneta_eth_tool_ops; in mvneta_probe()
5407 spin_lock_init(&pp->lock); in mvneta_probe()
5408 pp->dn = dn; in mvneta_probe()
5410 pp->rxq_def = rxq_def; in mvneta_probe()
5411 pp->indir[0] = rxq_def; in mvneta_probe()
5415 dev_err(&pdev->dev, "incorrect phy-mode\n"); in mvneta_probe()
5419 pp->phy_interface = phy_mode; in mvneta_probe()
5421 comphy = devm_of_phy_get(&pdev->dev, dn, NULL); in mvneta_probe()
5422 if (comphy == ERR_PTR(-EPROBE_DEFER)) in mvneta_probe()
5423 return -EPROBE_DEFER; in mvneta_probe()
5428 pp->comphy = comphy; in mvneta_probe()
5430 pp->base = devm_platform_ioremap_resource(pdev, 0); in mvneta_probe()
5431 if (IS_ERR(pp->base)) in mvneta_probe()
5432 return PTR_ERR(pp->base); in mvneta_probe()
5435 if (of_device_is_compatible(dn, "marvell,armada-3700-neta")) in mvneta_probe()
5436 pp->neta_armada3700 = true; in mvneta_probe()
5437 if (of_device_is_compatible(dn, "marvell,armada-ac5-neta")) { in mvneta_probe()
5438 pp->neta_armada3700 = true; in mvneta_probe()
5439 pp->neta_ac5 = true; in mvneta_probe()
5442 dev->irq = irq_of_parse_and_map(dn, 0); in mvneta_probe()
5443 if (dev->irq == 0) in mvneta_probe()
5444 return -EINVAL; in mvneta_probe()
5446 pp->clk = devm_clk_get(&pdev->dev, "core"); in mvneta_probe()
5447 if (IS_ERR(pp->clk)) in mvneta_probe()
5448 pp->clk = devm_clk_get(&pdev->dev, NULL); in mvneta_probe()
5449 if (IS_ERR(pp->clk)) { in mvneta_probe()
5450 err = PTR_ERR(pp->clk); in mvneta_probe()
5454 clk_prepare_enable(pp->clk); in mvneta_probe()
5456 pp->clk_bus = devm_clk_get(&pdev->dev, "bus"); in mvneta_probe()
5457 if (!IS_ERR(pp->clk_bus)) in mvneta_probe()
5458 clk_prepare_enable(pp->clk_bus); in mvneta_probe()
5460 pp->phylink_pcs.ops = &mvneta_phylink_pcs_ops; in mvneta_probe()
5462 pp->phylink_config.dev = &dev->dev; in mvneta_probe()
5463 pp->phylink_config.type = PHYLINK_NETDEV; in mvneta_probe()
5464 pp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 | in mvneta_probe()
5467 phy_interface_set_rgmii(pp->phylink_config.supported_interfaces); in mvneta_probe()
5469 pp->phylink_config.supported_interfaces); in mvneta_probe()
5475 pp->phylink_config.supported_interfaces); in mvneta_probe()
5477 pp->phylink_config.supported_interfaces); in mvneta_probe()
5479 pp->phylink_config.supported_interfaces); in mvneta_probe()
5481 /* No COMPHY, with only 2500BASE-X mode supported */ in mvneta_probe()
5483 pp->phylink_config.supported_interfaces); in mvneta_probe()
5486 /* No COMPHY, we can switch between 1000BASE-X and SGMII */ in mvneta_probe()
5488 pp->phylink_config.supported_interfaces); in mvneta_probe()
5490 pp->phylink_config.supported_interfaces); in mvneta_probe()
5493 phylink = phylink_create(&pp->phylink_config, pdev->dev.fwnode, in mvneta_probe()
5500 pp->phylink = phylink; in mvneta_probe()
5502 /* Alloc per-cpu port structure */ in mvneta_probe()
5503 pp->ports = alloc_percpu(struct mvneta_pcpu_port); in mvneta_probe()
5504 if (!pp->ports) { in mvneta_probe()
5505 err = -ENOMEM; in mvneta_probe()
5509 /* Alloc per-cpu stats */ in mvneta_probe()
5510 pp->stats = netdev_alloc_pcpu_stats(struct mvneta_pcpu_stats); in mvneta_probe()
5511 if (!pp->stats) { in mvneta_probe()
5512 err = -ENOMEM; in mvneta_probe()
5530 if (!of_property_read_u32(dn, "tx-csum-limit", &tx_csum_limit)) { in mvneta_probe()
5534 dev_info(&pdev->dev, in mvneta_probe()
5535 "Wrong TX csum limit in DT, set to %dB\n", in mvneta_probe()
5538 } else if (of_device_is_compatible(dn, "marvell,armada-370-neta")) { in mvneta_probe()
5544 pp->tx_csum_limit = tx_csum_limit; in mvneta_probe()
5546 pp->dram_target_info = mv_mbus_dram_info(); in mvneta_probe()
5551 if (pp->dram_target_info || pp->neta_armada3700) in mvneta_probe()
5552 mvneta_conf_mbus_windows(pp, pp->dram_target_info); in mvneta_probe()
5554 pp->tx_ring_size = MVNETA_MAX_TXD; in mvneta_probe()
5555 pp->rx_ring_size = MVNETA_MAX_RXD; in mvneta_probe()
5557 pp->dev = dev; in mvneta_probe()
5558 SET_NETDEV_DEV(dev, &pdev->dev); in mvneta_probe()
5560 pp->id = global_port_id++; in mvneta_probe()
5563 bm_node = of_parse_phandle(dn, "buffer-manager", 0); in mvneta_probe()
5565 pp->bm_priv = mvneta_bm_get(bm_node); in mvneta_probe()
5566 if (pp->bm_priv) { in mvneta_probe()
5569 dev_info(&pdev->dev, in mvneta_probe()
5571 mvneta_bm_put(pp->bm_priv); in mvneta_probe()
5572 pp->bm_priv = NULL; in mvneta_probe()
5576 * NET_SKB_PAD, exceeds 64B. It should be 64B for 64-bit in mvneta_probe()
5577 * platforms and 0B for 32-bit ones. in mvneta_probe()
5579 pp->rx_offset_correction = max(0, in mvneta_probe()
5580 NET_SKB_PAD - in mvneta_probe()
5586 if (!pp->bm_priv) in mvneta_probe()
5587 pp->rx_offset_correction = MVNETA_SKB_HEADROOM; in mvneta_probe()
5589 err = mvneta_init(&pdev->dev, pp); in mvneta_probe()
5593 err = mvneta_port_power_up(pp, pp->phy_interface); in mvneta_probe()
5595 dev_err(&pdev->dev, "can't power up port\n"); in mvneta_probe()
5599 /* Armada3700 network controller does not support per-cpu in mvneta_probe()
5602 if (pp->neta_armada3700) { in mvneta_probe()
5603 netif_napi_add(dev, &pp->napi, mvneta_poll); in mvneta_probe()
5607 per_cpu_ptr(pp->ports, cpu); in mvneta_probe()
5609 netif_napi_add(dev, &port->napi, mvneta_poll); in mvneta_probe()
5610 port->pp = pp; in mvneta_probe()
5614 dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | in mvneta_probe()
5616 dev->hw_features |= dev->features; in mvneta_probe()
5617 dev->vlan_features |= dev->features; in mvneta_probe()
5618 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in mvneta_probe()
5621 /* MTU range: 68 - 9676 */ in mvneta_probe()
5622 dev->min_mtu = ETH_MIN_MTU; in mvneta_probe()
5623 /* 9676 == 9700 - 20 and rounding to 8 */ in mvneta_probe()
5624 dev->max_mtu = 9676; in mvneta_probe()
5628 dev_err(&pdev->dev, "failed to register\n"); in mvneta_probe()
5633 dev->dev_addr); in mvneta_probe()
5635 platform_set_drvdata(pdev, pp->dev); in mvneta_probe()
5640 if (pp->bm_priv) { in mvneta_probe()
5641 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_probe()
5642 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, in mvneta_probe()
5643 1 << pp->id); in mvneta_probe()
5644 mvneta_bm_put(pp->bm_priv); in mvneta_probe()
5646 free_percpu(pp->stats); in mvneta_probe()
5648 free_percpu(pp->ports); in mvneta_probe()
5650 if (pp->phylink) in mvneta_probe()
5651 phylink_destroy(pp->phylink); in mvneta_probe()
5653 clk_disable_unprepare(pp->clk_bus); in mvneta_probe()
5654 clk_disable_unprepare(pp->clk); in mvneta_probe()
5656 irq_dispose_mapping(dev->irq); in mvneta_probe()
5667 clk_disable_unprepare(pp->clk_bus); in mvneta_remove()
5668 clk_disable_unprepare(pp->clk); in mvneta_remove()
5669 free_percpu(pp->ports); in mvneta_remove()
5670 free_percpu(pp->stats); in mvneta_remove()
5671 irq_dispose_mapping(dev->irq); in mvneta_remove()
5672 phylink_destroy(pp->phylink); in mvneta_remove()
5674 if (pp->bm_priv) { in mvneta_remove()
5675 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); in mvneta_remove()
5676 mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, in mvneta_remove()
5677 1 << pp->id); in mvneta_remove()
5678 mvneta_bm_put(pp->bm_priv); in mvneta_remove()
5694 if (!pp->neta_armada3700) { in mvneta_suspend()
5695 spin_lock(&pp->lock); in mvneta_suspend()
5696 pp->is_stopped = true; in mvneta_suspend()
5697 spin_unlock(&pp->lock); in mvneta_suspend()
5700 &pp->node_online); in mvneta_suspend()
5702 &pp->node_dead); in mvneta_suspend()
5710 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_suspend()
5716 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_suspend()
5723 clk_disable_unprepare(pp->clk_bus); in mvneta_suspend()
5724 clk_disable_unprepare(pp->clk); in mvneta_suspend()
5736 clk_prepare_enable(pp->clk); in mvneta_resume()
5737 if (!IS_ERR(pp->clk_bus)) in mvneta_resume()
5738 clk_prepare_enable(pp->clk_bus); in mvneta_resume()
5739 if (pp->dram_target_info || pp->neta_armada3700) in mvneta_resume()
5740 mvneta_conf_mbus_windows(pp, pp->dram_target_info); in mvneta_resume()
5741 if (pp->bm_priv) { in mvneta_resume()
5744 dev_info(&pdev->dev, "use SW buffer management\n"); in mvneta_resume()
5745 pp->rx_offset_correction = MVNETA_SKB_HEADROOM; in mvneta_resume()
5746 pp->bm_priv = NULL; in mvneta_resume()
5750 err = mvneta_port_power_up(pp, pp->phy_interface); in mvneta_resume()
5762 struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; in mvneta_resume()
5764 rxq->next_desc_to_proc = 0; in mvneta_resume()
5769 struct mvneta_tx_queue *txq = &pp->txqs[queue]; in mvneta_resume()
5771 txq->next_desc_to_proc = 0; in mvneta_resume()
5775 if (!pp->neta_armada3700) { in mvneta_resume()
5776 spin_lock(&pp->lock); in mvneta_resume()
5777 pp->is_stopped = false; in mvneta_resume()
5778 spin_unlock(&pp->lock); in mvneta_resume()
5780 &pp->node_online); in mvneta_resume()
5782 &pp->node_dead); in mvneta_resume()
5797 { .compatible = "marvell,armada-370-neta" },
5798 { .compatible = "marvell,armada-xp-neta" },
5799 { .compatible = "marvell,armada-3700-neta" },
5800 { .compatible = "marvell,armada-ac5-neta" },
5852 MODULE_DESCRIPTION("Marvell NETA Ethernet Driver - www.marvell.com");
5853 MODULE_AUTHOR("Rami Rosen <rosenr@marvell.com>, Thomas Petazzoni <thomas.petazzoni@free-electrons.c…