Lines Matching full:hw
12 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
13 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
14 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
15 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
16 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
17 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
18 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
19 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
20 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
21 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
22 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
23 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
25 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
26 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw);
30 * @hw: pointer to the hardware structure
35 static s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte) in ixgbe_out_i2c_byte_ack() argument
39 status = ixgbe_clock_out_i2c_byte(hw, byte); in ixgbe_out_i2c_byte_ack()
42 return ixgbe_get_i2c_ack(hw); in ixgbe_out_i2c_byte_ack()
47 * @hw: pointer to the hardware structure
52 static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte) in ixgbe_in_i2c_byte_ack() argument
56 status = ixgbe_clock_in_i2c_byte(hw, byte); in ixgbe_in_i2c_byte_ack()
60 return ixgbe_clock_out_i2c_bit(hw, false); in ixgbe_in_i2c_byte_ack()
80 * @hw: pointer to the hardware structure
88 s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_read_i2c_combined_generic_int() argument
91 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
104 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic_int()
106 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
108 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_read_i2c_combined_generic_int()
111 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_read_i2c_combined_generic_int()
114 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_read_i2c_combined_generic_int()
117 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_read_i2c_combined_generic_int()
120 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
122 if (ixgbe_out_i2c_byte_ack(hw, addr | 1)) in ixgbe_read_i2c_combined_generic_int()
125 if (ixgbe_in_i2c_byte_ack(hw, &high_bits)) in ixgbe_read_i2c_combined_generic_int()
128 if (ixgbe_in_i2c_byte_ack(hw, &low_bits)) in ixgbe_read_i2c_combined_generic_int()
131 if (ixgbe_clock_in_i2c_byte(hw, &csum_byte)) in ixgbe_read_i2c_combined_generic_int()
134 if (ixgbe_clock_out_i2c_bit(hw, false)) in ixgbe_read_i2c_combined_generic_int()
136 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_combined_generic_int()
138 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
143 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_combined_generic_int()
145 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
148 hw_dbg(hw, "I2C byte read combined error - Retry.\n"); in ixgbe_read_i2c_combined_generic_int()
150 hw_dbg(hw, "I2C byte read combined error.\n"); in ixgbe_read_i2c_combined_generic_int()
158 * @hw: pointer to the hardware structure
166 s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_write_i2c_combined_generic_int() argument
169 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_combined_generic_int()
181 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_combined_generic_int()
183 ixgbe_i2c_start(hw); in ixgbe_write_i2c_combined_generic_int()
185 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_write_i2c_combined_generic_int()
188 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_write_i2c_combined_generic_int()
191 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
194 if (ixgbe_out_i2c_byte_ack(hw, val >> 8)) in ixgbe_write_i2c_combined_generic_int()
197 if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
200 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_write_i2c_combined_generic_int()
202 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_combined_generic_int()
204 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
208 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_combined_generic_int()
210 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
213 hw_dbg(hw, "I2C byte write combined error - Retry.\n"); in ixgbe_write_i2c_combined_generic_int()
215 hw_dbg(hw, "I2C byte write combined error.\n"); in ixgbe_write_i2c_combined_generic_int()
223 * @hw: pointer to hardware structure
228 static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr) in ixgbe_probe_phy() argument
232 hw->phy.mdio.prtad = phy_addr; in ixgbe_probe_phy()
233 if (mdio45_probe(&hw->phy.mdio, phy_addr) != 0) in ixgbe_probe_phy()
236 if (ixgbe_get_phy_id(hw)) in ixgbe_probe_phy()
239 hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_probe_phy()
241 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_probe_phy()
242 hw->phy.ops.read_reg(hw, in ixgbe_probe_phy()
249 hw->phy.type = ixgbe_phy_cu_unknown; in ixgbe_probe_phy()
251 hw->phy.type = ixgbe_phy_generic; in ixgbe_probe_phy()
259 * @hw: pointer to hardware structure
263 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw) in ixgbe_identify_phy_generic() argument
268 if (!hw->phy.phy_semaphore_mask) { in ixgbe_identify_phy_generic()
269 if (hw->bus.lan_id) in ixgbe_identify_phy_generic()
270 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_generic()
272 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_generic()
275 if (hw->phy.type != ixgbe_phy_unknown) in ixgbe_identify_phy_generic()
278 if (hw->phy.nw_mng_if_sel) { in ixgbe_identify_phy_generic()
279 phy_addr = (hw->phy.nw_mng_if_sel & in ixgbe_identify_phy_generic()
282 if (ixgbe_probe_phy(hw, phy_addr)) in ixgbe_identify_phy_generic()
289 if (ixgbe_probe_phy(hw, phy_addr)) { in ixgbe_identify_phy_generic()
300 hw->phy.mdio.prtad = MDIO_PRTAD_NONE; in ixgbe_identify_phy_generic()
307 * @hw: pointer to the hardware structure
314 bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw) in ixgbe_check_reset_blocked() argument
319 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_check_reset_blocked()
322 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked()
324 hw_dbg(hw, "MNG_VETO bit detected.\n"); in ixgbe_check_reset_blocked()
333 * @hw: pointer to hardware structure
336 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw) in ixgbe_get_phy_id() argument
342 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
346 hw->phy.id = (u32)(phy_id_high << 16); in ixgbe_get_phy_id()
347 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
349 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
350 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
396 * @hw: pointer to hardware structure
398 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) in ixgbe_reset_phy_generic() argument
404 if (hw->phy.type == ixgbe_phy_unknown) in ixgbe_reset_phy_generic()
405 status = ixgbe_identify_phy_generic(hw); in ixgbe_reset_phy_generic()
407 if (status != 0 || hw->phy.type == ixgbe_phy_none) in ixgbe_reset_phy_generic()
411 if (!hw->phy.reset_if_overtemp && in ixgbe_reset_phy_generic()
412 (IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw))) in ixgbe_reset_phy_generic()
416 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_generic()
423 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
434 if (hw->phy.type == ixgbe_phy_x550em_ext_t) { in ixgbe_reset_phy_generic()
435 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
446 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
459 hw_dbg(hw, "PHY reset polling failed to complete.\n"); in ixgbe_reset_phy_generic()
468 * @hw: pointer to hardware structure
475 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
483 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
486 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
495 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
502 hw_dbg(hw, "PHY address command did not complete.\n"); in ixgbe_read_phy_reg_mdi()
511 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
514 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
523 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
529 hw_dbg(hw, "PHY read command didn't complete\n"); in ixgbe_read_phy_reg_mdi()
536 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi()
546 * @hw: pointer to hardware structure
551 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
555 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_read_phy_reg_generic()
557 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_read_phy_reg_generic()
558 status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_read_phy_reg_generic()
560 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_phy_reg_generic()
571 * @hw: pointer to hardware structure
576 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
582 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
587 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
590 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
600 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
606 hw_dbg(hw, "PHY address cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
616 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
619 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
628 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
634 hw_dbg(hw, "PHY write cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
644 * @hw: pointer to hardware structure
649 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
653 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_write_phy_reg_generic()
655 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_write_phy_reg_generic()
656 status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
658 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_write_phy_reg_generic()
666 #define IXGBE_HW_READ_REG(addr) IXGBE_READ_REG(hw, addr)
670 * @hw: pointer to hardware structure
673 static s32 ixgbe_msca_cmd(struct ixgbe_hw *hw, u32 cmd) in ixgbe_msca_cmd() argument
675 IXGBE_WRITE_REG(hw, IXGBE_MSCA, cmd); in ixgbe_msca_cmd()
684 * @hw: pointer to hardware structure
689 static s32 ixgbe_mii_bus_read_generic(struct ixgbe_hw *hw, int addr, in ixgbe_mii_bus_read_generic() argument
695 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_read_generic()
708 data = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_read_generic()
719 data = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_read_generic()
724 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_mii_bus_read_generic()
728 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_read_generic()
734 * @hw: pointer to hardware structure
740 static s32 ixgbe_mii_bus_write_generic(struct ixgbe_hw *hw, int addr, in ixgbe_mii_bus_write_generic() argument
746 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_write_generic()
749 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)val); in ixgbe_mii_bus_write_generic()
764 err = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_write_generic()
769 err = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_write_generic()
772 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_write_generic()
785 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_read() local
786 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_read()
788 return ixgbe_mii_bus_read_generic(hw, addr, regnum, gssr); in ixgbe_mii_bus_read()
802 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_write() local
803 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_write()
805 return ixgbe_mii_bus_write_generic(hw, addr, regnum, val, gssr); in ixgbe_mii_bus_write()
818 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_read() local
819 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_read()
822 return ixgbe_mii_bus_read_generic(hw, addr, regnum, gssr); in ixgbe_x550em_a_mii_bus_read()
836 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_write() local
837 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_write()
840 return ixgbe_mii_bus_write_generic(hw, addr, regnum, val, gssr); in ixgbe_x550em_a_mii_bus_write()
866 * @hw: pointer to hardware structure
868 * Returns true if hw points to lowest numbered PCI B:D.F x550_em_a device in
872 static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw) in ixgbe_x550em_a_has_mii() argument
874 struct ixgbe_adapter *adapter = hw->back; in ixgbe_x550em_a_has_mii()
900 * @hw: pointer to hardware structure
906 s32 ixgbe_mii_bus_init(struct ixgbe_hw *hw) in ixgbe_mii_bus_init() argument
910 struct ixgbe_adapter *adapter = hw->back; in ixgbe_mii_bus_init()
915 switch (hw->device_id) { in ixgbe_mii_bus_init()
926 if (!ixgbe_x550em_a_has_mii(hw)) in ixgbe_mii_bus_init()
957 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22; in ixgbe_mii_bus_init()
965 * @hw: pointer to hardware structure
969 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_generic() argument
976 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_generic()
979 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
982 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) && in ixgbe_setup_phy_link_generic()
986 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
988 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
991 if (hw->mac.type == ixgbe_mac_X550) { in ixgbe_setup_phy_link_generic()
994 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) && in ixgbe_setup_phy_link_generic()
1000 if ((hw->phy.autoneg_advertised & in ixgbe_setup_phy_link_generic()
1008 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) && in ixgbe_setup_phy_link_generic()
1012 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
1016 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
1019 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) && in ixgbe_setup_phy_link_generic()
1023 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
1026 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_generic()
1030 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1035 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1043 * @hw: pointer to hardware structure
1047 s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, in ixgbe_setup_phy_link_speed_generic() argument
1054 hw->phy.autoneg_advertised = 0; in ixgbe_setup_phy_link_speed_generic()
1057 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1060 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1063 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1066 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1069 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_phy_link_speed_generic()
1072 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL; in ixgbe_setup_phy_link_speed_generic()
1075 if (hw->phy.ops.setup_link) in ixgbe_setup_phy_link_speed_generic()
1076 hw->phy.ops.setup_link(hw); in ixgbe_setup_phy_link_speed_generic()
1083 * @hw: pointer to hardware structure
1088 static s32 ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw) in ixgbe_get_copper_speeds_supported() argument
1093 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_speeds_supported()
1099 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_get_copper_speeds_supported()
1101 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_get_copper_speeds_supported()
1103 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1105 switch (hw->mac.type) { in ixgbe_get_copper_speeds_supported()
1107 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1108 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1112 hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1123 * @hw: pointer to hardware structure
1127 s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, in ixgbe_get_copper_link_capabilities_generic() argument
1134 if (!hw->phy.speeds_supported) in ixgbe_get_copper_link_capabilities_generic()
1135 status = ixgbe_get_copper_speeds_supported(hw); in ixgbe_get_copper_link_capabilities_generic()
1137 *speed = hw->phy.speeds_supported; in ixgbe_get_copper_link_capabilities_generic()
1143 * @hw: pointer to hardware structure
1150 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed, in ixgbe_check_phy_link_tnx() argument
1171 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
1193 * @hw: pointer to hardware structure
1200 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_tnx() argument
1206 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_tnx()
1210 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1215 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_tnx()
1218 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1225 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1230 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_tnx()
1233 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1240 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1246 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_tnx()
1249 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1255 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_tnx()
1259 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1264 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1271 * @hw: pointer to hardware structure
1273 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw) in ixgbe_reset_phy_nl() argument
1283 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_nl()
1286 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data); in ixgbe_reset_phy_nl()
1289 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1293 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1301 hw_dbg(hw, "PHY reset did not complete.\n"); in ixgbe_reset_phy_nl()
1306 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, in ixgbe_reset_phy_nl()
1311 ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); in ixgbe_reset_phy_nl()
1317 ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); in ixgbe_reset_phy_nl()
1326 hw_dbg(hw, "DELAY: %d MS\n", edata); in ixgbe_reset_phy_nl()
1330 hw_dbg(hw, "DATA:\n"); in ixgbe_reset_phy_nl()
1332 ret_val = hw->eeprom.ops.read(hw, data_offset++, in ixgbe_reset_phy_nl()
1337 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1341 hw->phy.ops.write_reg(hw, phy_offset, in ixgbe_reset_phy_nl()
1343 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, in ixgbe_reset_phy_nl()
1351 hw_dbg(hw, "CONTROL:\n"); in ixgbe_reset_phy_nl()
1353 hw_dbg(hw, "EOL\n"); in ixgbe_reset_phy_nl()
1356 hw_dbg(hw, "SOL\n"); in ixgbe_reset_phy_nl()
1358 hw_dbg(hw, "Bad control value\n"); in ixgbe_reset_phy_nl()
1363 hw_dbg(hw, "Bad control type\n"); in ixgbe_reset_phy_nl()
1371 hw_err(hw, "eeprom read at offset %d failed\n", data_offset); in ixgbe_reset_phy_nl()
1377 * @hw: pointer to hardware structure
1379 * Determines HW type and calls appropriate function.
1381 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_module_generic() argument
1383 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_identify_module_generic()
1385 return ixgbe_identify_sfp_module_generic(hw); in ixgbe_identify_module_generic()
1387 return ixgbe_identify_qsfp_module_generic(hw); in ixgbe_identify_module_generic()
1389 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_generic()
1398 * @hw: pointer to hardware structure
1402 s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_sfp_module_generic() argument
1404 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_sfp_module_generic()
1407 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_sfp_module_generic()
1416 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { in ixgbe_identify_sfp_module_generic()
1417 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1422 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1424 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1432 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1435 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1442 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1448 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1471 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1473 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_sfp_module_generic()
1475 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_sfp_module_generic()
1477 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_sfp_module_generic()
1479 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1482 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1483 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1486 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1489 hw->phy.ops.read_i2c_eeprom( in ixgbe_identify_sfp_module_generic()
1490 hw, IXGBE_SFF_CABLE_SPEC_COMP, in ixgbe_identify_sfp_module_generic()
1494 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1495 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1498 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1501 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1507 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1508 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1511 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1514 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1515 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1518 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1521 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1522 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1525 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1528 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1529 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1532 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1535 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1539 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_sfp_module_generic()
1540 hw->phy.sfp_setup_needed = true; in ixgbe_identify_sfp_module_generic()
1543 hw->phy.multispeed_fiber = false; in ixgbe_identify_sfp_module_generic()
1548 hw->phy.multispeed_fiber = true; in ixgbe_identify_sfp_module_generic()
1551 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1552 hw->phy.id = identifier; in ixgbe_identify_sfp_module_generic()
1553 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1560 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1567 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1582 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1587 hw->phy.type = ixgbe_phy_sfp_ftl_active; in ixgbe_identify_sfp_module_generic()
1589 hw->phy.type = ixgbe_phy_sfp_ftl; in ixgbe_identify_sfp_module_generic()
1592 hw->phy.type = ixgbe_phy_sfp_avago; in ixgbe_identify_sfp_module_generic()
1595 hw->phy.type = ixgbe_phy_sfp_intel; in ixgbe_identify_sfp_module_generic()
1599 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1602 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1605 hw->phy.type = ixgbe_phy_sfp_unknown; in ixgbe_identify_sfp_module_generic()
1617 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1618 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1619 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1620 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1621 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1622 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1623 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1628 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_identify_sfp_module_generic()
1631 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_sfp_module_generic()
1633 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1634 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1635 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1636 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1637 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1638 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1640 if (hw->phy.type == ixgbe_phy_sfp_intel) in ixgbe_identify_sfp_module_generic()
1642 if (hw->allow_unsupported_sfp) { in ixgbe_identify_sfp_module_generic()
1646 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_identify_sfp_module_generic()
1647 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1653 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1654 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1655 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1656 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_sfp_module_generic()
1663 * @hw: pointer to hardware structure
1667 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_qsfp_module_generic() argument
1669 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_qsfp_module_generic()
1672 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_qsfp_module_generic()
1683 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { in ixgbe_identify_qsfp_module_generic()
1684 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1689 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1691 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, in ixgbe_identify_qsfp_module_generic()
1698 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1702 hw->phy.id = identifier; in ixgbe_identify_qsfp_module_generic()
1704 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1710 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1717 hw->phy.type = ixgbe_phy_qsfp_passive_unknown; in ixgbe_identify_qsfp_module_generic()
1718 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1719 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; in ixgbe_identify_qsfp_module_generic()
1721 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; in ixgbe_identify_qsfp_module_generic()
1724 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1725 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; in ixgbe_identify_qsfp_module_generic()
1727 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; in ixgbe_identify_qsfp_module_generic()
1736 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1740 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1744 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1757 hw->phy.type = ixgbe_phy_qsfp_active_unknown; in ixgbe_identify_qsfp_module_generic()
1758 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1759 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1762 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1766 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1771 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_qsfp_module_generic()
1772 hw->phy.sfp_setup_needed = true; in ixgbe_identify_qsfp_module_generic()
1775 hw->phy.multispeed_fiber = false; in ixgbe_identify_qsfp_module_generic()
1780 hw->phy.multispeed_fiber = true; in ixgbe_identify_qsfp_module_generic()
1785 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1792 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1799 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1812 hw->phy.type = ixgbe_phy_qsfp_intel; in ixgbe_identify_qsfp_module_generic()
1814 hw->phy.type = ixgbe_phy_qsfp_unknown; in ixgbe_identify_qsfp_module_generic()
1816 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_qsfp_module_generic()
1819 if (hw->phy.type == ixgbe_phy_qsfp_intel) in ixgbe_identify_qsfp_module_generic()
1821 if (hw->allow_unsupported_sfp) { in ixgbe_identify_qsfp_module_generic()
1825 hw_dbg(hw, "QSFP module not supported\n"); in ixgbe_identify_qsfp_module_generic()
1826 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1834 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1835 hw->phy.id = 0; in ixgbe_identify_qsfp_module_generic()
1836 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_qsfp_module_generic()
1843 * @hw: pointer to hardware structure
1850 s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, in ixgbe_get_sfp_init_sequence_offsets() argument
1855 u16 sfp_type = hw->phy.sfp_type; in ixgbe_get_sfp_init_sequence_offsets()
1857 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_get_sfp_init_sequence_offsets()
1860 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_sfp_init_sequence_offsets()
1863 if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && in ixgbe_get_sfp_init_sequence_offsets()
1864 (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) in ixgbe_get_sfp_init_sequence_offsets()
1883 if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { in ixgbe_get_sfp_init_sequence_offsets()
1884 hw_err(hw, "eeprom read at %d failed\n", in ixgbe_get_sfp_init_sequence_offsets()
1899 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1905 if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) in ixgbe_get_sfp_init_sequence_offsets()
1908 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_get_sfp_init_sequence_offsets()
1915 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1921 hw_dbg(hw, "No matching SFP+ module found\n"); in ixgbe_get_sfp_init_sequence_offsets()
1928 hw_err(hw, "eeprom read at offset %d failed\n", *list_offset); in ixgbe_get_sfp_init_sequence_offsets()
1934 * @hw: pointer to hardware structure
1940 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_generic() argument
1943 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
1950 * @hw: pointer to hardware structure
1956 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_generic() argument
1959 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
1966 * @hw: pointer to hardware structure
1972 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_generic() argument
1975 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
1982 * @hw: pointer to hardware structure
1986 static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr) in ixgbe_is_sfp_probe() argument
1990 hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_is_sfp_probe()
1997 * @hw: pointer to hardware structure
2006 static s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_int() argument
2012 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_byte_generic_int()
2015 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_read_i2c_byte_generic_int()
2017 if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr)) in ixgbe_read_i2c_byte_generic_int()
2023 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_byte_generic_int()
2026 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2029 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_read_i2c_byte_generic_int()
2033 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2037 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_read_i2c_byte_generic_int()
2041 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2045 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2048 status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1)); in ixgbe_read_i2c_byte_generic_int()
2052 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2056 status = ixgbe_clock_in_i2c_byte(hw, data); in ixgbe_read_i2c_byte_generic_int()
2060 status = ixgbe_clock_out_i2c_bit(hw, nack); in ixgbe_read_i2c_byte_generic_int()
2064 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_byte_generic_int()
2066 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2070 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_byte_generic_int()
2072 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2077 hw_dbg(hw, "I2C byte read error - Retrying.\n"); in ixgbe_read_i2c_byte_generic_int()
2079 hw_dbg(hw, "I2C byte read error.\n"); in ixgbe_read_i2c_byte_generic_int()
2088 * @hw: pointer to hardware structure
2096 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic() argument
2099 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic()
2105 * @hw: pointer to hardware structure
2113 s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_unlocked() argument
2116 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic_unlocked()
2122 * @hw: pointer to hardware structure
2131 static s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_int() argument
2137 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_byte_generic_int()
2139 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_byte_generic_int()
2143 ixgbe_i2c_start(hw); in ixgbe_write_i2c_byte_generic_int()
2145 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_write_i2c_byte_generic_int()
2149 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2153 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_write_i2c_byte_generic_int()
2157 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2161 status = ixgbe_clock_out_i2c_byte(hw, data); in ixgbe_write_i2c_byte_generic_int()
2165 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2169 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_byte_generic_int()
2171 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2175 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_byte_generic_int()
2178 hw_dbg(hw, "I2C byte write error - Retrying.\n"); in ixgbe_write_i2c_byte_generic_int()
2180 hw_dbg(hw, "I2C byte write error.\n"); in ixgbe_write_i2c_byte_generic_int()
2184 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2191 * @hw: pointer to hardware structure
2199 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic() argument
2202 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic()
2208 * @hw: pointer to hardware structure
2216 s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_unlocked() argument
2219 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic_unlocked()
2225 * @hw: pointer to hardware structure
2230 static void ixgbe_i2c_start(struct ixgbe_hw *hw) in ixgbe_i2c_start() argument
2232 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_start()
2234 i2cctl |= IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_start()
2237 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_start()
2238 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2243 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_start()
2248 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2257 * @hw: pointer to hardware structure
2263 static void ixgbe_i2c_stop(struct ixgbe_hw *hw) in ixgbe_i2c_stop() argument
2265 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_stop()
2266 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_i2c_stop()
2267 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_i2c_stop()
2268 u32 bb_en_bit = IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_stop()
2271 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_stop()
2272 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_stop()
2277 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_stop()
2285 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_i2c_stop()
2286 IXGBE_WRITE_FLUSH(hw); in ixgbe_i2c_stop()
2292 * @hw: pointer to hardware structure
2297 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) in ixgbe_clock_in_i2c_byte() argument
2304 ixgbe_clock_in_i2c_bit(hw, &bit); in ixgbe_clock_in_i2c_byte()
2313 * @hw: pointer to hardware structure
2318 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) in ixgbe_clock_out_i2c_byte() argument
2327 status = ixgbe_clock_out_i2c_bit(hw, bit); in ixgbe_clock_out_i2c_byte()
2334 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_byte()
2335 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_out_i2c_byte()
2336 i2cctl |= IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_out_i2c_byte()
2337 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2338 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_out_i2c_byte()
2345 * @hw: pointer to hardware structure
2349 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) in ixgbe_get_i2c_ack() argument
2351 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_ack()
2354 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2359 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_get_i2c_ack()
2361 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_get_i2c_ack()
2362 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_ack()
2364 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2372 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2373 ack = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_get_i2c_ack()
2381 hw_dbg(hw, "I2C ack was not received.\n"); in ixgbe_get_i2c_ack()
2385 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2395 * @hw: pointer to hardware structure
2400 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) in ixgbe_clock_in_i2c_bit() argument
2402 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2403 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_in_i2c_bit()
2406 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_in_i2c_bit()
2408 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2409 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_in_i2c_bit()
2411 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2416 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2417 *data = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2419 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2429 * @hw: pointer to hardware structure
2434 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) in ixgbe_clock_out_i2c_bit() argument
2437 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_bit()
2439 status = ixgbe_set_i2c_data(hw, &i2cctl, data); in ixgbe_clock_out_i2c_bit()
2441 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2446 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2453 hw_dbg(hw, "I2C data was not set to %X\n", data); in ixgbe_clock_out_i2c_bit()
2461 * @hw: pointer to hardware structure
2467 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_raise_i2c_clk() argument
2469 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_raise_i2c_clk()
2476 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2480 *i2cctl |= IXGBE_I2C_CLK_OUT(hw); in ixgbe_raise_i2c_clk()
2481 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2482 IXGBE_WRITE_FLUSH(hw); in ixgbe_raise_i2c_clk()
2486 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_raise_i2c_clk()
2487 if (i2cctl_r & IXGBE_I2C_CLK_IN(hw)) in ixgbe_raise_i2c_clk()
2494 * @hw: pointer to hardware structure
2500 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_lower_i2c_clk() argument
2503 *i2cctl &= ~IXGBE_I2C_CLK_OUT(hw); in ixgbe_lower_i2c_clk()
2504 *i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_lower_i2c_clk()
2506 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_lower_i2c_clk()
2507 IXGBE_WRITE_FLUSH(hw); in ixgbe_lower_i2c_clk()
2515 * @hw: pointer to hardware structure
2522 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) in ixgbe_set_i2c_data() argument
2524 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_set_i2c_data()
2527 *i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2529 *i2cctl &= ~IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2532 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2533 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2542 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2543 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2547 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_set_i2c_data()
2548 if (data != ixgbe_get_i2c_data(hw, i2cctl)) { in ixgbe_set_i2c_data()
2549 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data); in ixgbe_set_i2c_data()
2558 * @hw: pointer to hardware structure
2564 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_get_i2c_data() argument
2566 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_data()
2570 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_get_i2c_data()
2571 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_data()
2575 if (*i2cctl & IXGBE_I2C_DATA_IN(hw)) in ixgbe_get_i2c_data()
2582 * @hw: pointer to hardware structure
2587 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) in ixgbe_i2c_bus_clear() argument
2592 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2593 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_bus_clear()
2595 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_bus_clear()
2598 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2603 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2609 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2612 ixgbe_i2c_stop(hw); in ixgbe_i2c_bus_clear()
2617 * @hw: pointer to hardware structure
2621 s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw) in ixgbe_tn_check_overtemp() argument
2625 if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) in ixgbe_tn_check_overtemp()
2629 hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, in ixgbe_tn_check_overtemp()
2639 * @hw: pointer to hardware structure
2642 s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on) in ixgbe_set_copper_phy_power() argument
2648 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper) in ixgbe_set_copper_phy_power()
2651 if (!on && ixgbe_mng_present(hw)) in ixgbe_set_copper_phy_power()
2654 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, ®); in ixgbe_set_copper_phy_power()
2661 if (ixgbe_check_reset_blocked(hw)) in ixgbe_set_copper_phy_power()
2666 status = hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, reg); in ixgbe_set_copper_phy_power()