Lines Matching refs:VMDQ_P
3863 IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)), in ixgbe_store_vfreta()
3910 IXGBE_PFVFRSSRK(i, VMDQ_P(pool)), in ixgbe_setup_vfreta()
3994 IXGBE_PFVFMRQC(VMDQ_P(pool)), in ixgbe_setup_mrqc()
4179 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype); in ixgbe_setup_psrtype()
4196 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT; in ixgbe_configure_virtualization()
4205 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr); in ixgbe_configure_virtualization()
4207 vf_shift = VMDQ_P(0) % 32; in ixgbe_configure_virtualization()
4208 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0; in ixgbe_configure_virtualization()
4219 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0)); in ixgbe_configure_virtualization()
4422 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid); in ixgbe_vlan_rx_add_vid()
4461 word = idx * 2 + (VMDQ_P(0) / 32); in ixgbe_update_pf_promisc_vlvf()
4462 bits = ~BIT(VMDQ_P(0) % 32); in ixgbe_update_pf_promisc_vlvf()
4481 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true); in ixgbe_vlan_rx_kill_vid()
4594 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32); in ixgbe_vlan_promisc_enable()
4597 vlvfb |= BIT(VMDQ_P(0) % 32); in ixgbe_vlan_promisc_enable()
4635 word = i * 2 + VMDQ_P(0) / 32; in ixgbe_scrub_vfta()
4636 bits = ~BIT(VMDQ_P(0) % 32); in ixgbe_scrub_vfta()
4804 mac_table->pool = VMDQ_P(0); in ixgbe_mac_set_default_filter()
4878 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0)); in ixgbe_uc_sync()
4887 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0)); in ixgbe_uc_unsync()
4956 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) & in ixgbe_set_rx_mode()
4959 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr); in ixgbe_set_rx_mode()
5383 VMDQ_P(accel->pool)); in ixgbe_fwd_ring_up()
6024 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); in ixgbe_reset()
9010 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); in ixgbe_add_sanmac_netdev()
9948 u16 pool = VMDQ_P(0); in ixgbe_ndo_fdb_add()
10186 VMDQ_P(accel->pool)); in ixgbe_fwd_del()