1839 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,  in ixgbe_set_rar_generic()  argument
1852 	hw->mac.ops.set_vmdq(hw, index, vmdq);  in ixgbe_set_rar_generic()
2958 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)  in ixgbe_clear_vmdq_generic()  argument
2978 	if (vmdq == IXGBE_CLEAR_VMDQ_ALL) {  in ixgbe_clear_vmdq_generic()
2987 	} else if (vmdq < 32) {  in ixgbe_clear_vmdq_generic()
2988 		mpsar_lo &= ~BIT(vmdq);  in ixgbe_clear_vmdq_generic()
2991 		mpsar_hi &= ~BIT(vmdq - 32);  in ixgbe_clear_vmdq_generic()
3009 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)  in ixgbe_set_vmdq_generic()  argument
3020 	if (vmdq < 32) {  in ixgbe_set_vmdq_generic()
3022 		mpsar |= BIT(vmdq);  in ixgbe_set_vmdq_generic()
3026 		mpsar |= BIT(vmdq - 32);  in ixgbe_set_vmdq_generic()
3042 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)  in ixgbe_set_vmdq_san_mac_generic()  argument
3046 	if (vmdq < 32) {  in ixgbe_set_vmdq_san_mac_generic()
3047 		IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), BIT(vmdq));  in ixgbe_set_vmdq_san_mac_generic()
3051 		IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), BIT(vmdq - 32));  in ixgbe_set_vmdq_san_mac_generic()