Lines Matching +full:no +full:- +full:eeprom
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
41 * ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow
55 switch (hw->phy.media_type) { in ixgbe_device_supports_autoneg_fc()
58 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
64 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_device_supports_autoneg_fc()
74 if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI) in ixgbe_device_supports_autoneg_fc()
81 switch (hw->device_id) { in ixgbe_device_supports_autoneg_fc()
103 hw->device_id); in ixgbe_device_supports_autoneg_fc()
109 * ixgbe_setup_fc_generic - Set up flow control
125 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { in ixgbe_setup_fc_generic()
131 * 10gig parts do not have a word in the EEPROM to determine the in ixgbe_setup_fc_generic()
134 if (hw->fc.requested_mode == ixgbe_fc_default) in ixgbe_setup_fc_generic()
135 hw->fc.requested_mode = ixgbe_fc_full; in ixgbe_setup_fc_generic()
142 switch (hw->phy.media_type) { in ixgbe_setup_fc_generic()
145 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, ®_bp); in ixgbe_setup_fc_generic()
155 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_fc_generic()
172 switch (hw->fc.requested_mode) { in ixgbe_setup_fc_generic()
176 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
179 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
189 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
192 } else if (hw->phy.media_type == ixgbe_media_type_copper) { in ixgbe_setup_fc_generic()
210 if (hw->phy.media_type == ixgbe_media_type_backplane) in ixgbe_setup_fc_generic()
213 else if (hw->phy.media_type == ixgbe_media_type_copper) in ixgbe_setup_fc_generic()
221 if (hw->mac.type != ixgbe_mac_X540) { in ixgbe_setup_fc_generic()
223 * Enable auto-negotiation between the MAC & PHY; in ixgbe_setup_fc_generic()
230 if (hw->fc.strict_ieee) in ixgbe_setup_fc_generic()
239 * and copper. There is no need to set the PCS1GCTL register. in ixgbe_setup_fc_generic()
242 if (hw->phy.media_type == ixgbe_media_type_backplane) { in ixgbe_setup_fc_generic()
247 ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked); in ixgbe_setup_fc_generic()
251 } else if ((hw->phy.media_type == ixgbe_media_type_copper) && in ixgbe_setup_fc_generic()
253 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_fc_generic()
262 * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
277 hw->phy.media_type = hw->mac.ops.get_media_type(hw); in ixgbe_start_hw_generic()
280 hw->phy.ops.identify(hw); in ixgbe_start_hw_generic()
283 hw->mac.ops.clear_vfta(hw); in ixgbe_start_hw_generic()
286 hw->mac.ops.clear_hw_cntrs(hw); in ixgbe_start_hw_generic()
288 /* Set No Snoop Disable */ in ixgbe_start_hw_generic()
295 if (hw->mac.ops.setup_fc) { in ixgbe_start_hw_generic()
296 ret_val = hw->mac.ops.setup_fc(hw); in ixgbe_start_hw_generic()
302 switch (hw->mac.type) { in ixgbe_start_hw_generic()
306 hw->mac.ops.get_device_caps(hw, &device_caps); in ixgbe_start_hw_generic()
308 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
310 hw->need_crosstalk_fix = true; in ixgbe_start_hw_generic()
313 hw->need_crosstalk_fix = false; in ixgbe_start_hw_generic()
318 hw->adapter_stopped = false; in ixgbe_start_hw_generic()
324 * ixgbe_start_hw_gen2 - Init sequence for common device family
338 for (i = 0; i < hw->mac.max_tx_queues; i++) { in ixgbe_start_hw_gen2()
348 * ixgbe_init_hw_generic - Generic hardware initialization
362 status = hw->mac.ops.reset_hw(hw); in ixgbe_init_hw_generic()
366 status = hw->mac.ops.start_hw(hw); in ixgbe_init_hw_generic()
370 if (hw->mac.ops.init_led_link_act) in ixgbe_init_hw_generic()
371 hw->mac.ops.init_led_link_act(hw); in ixgbe_init_hw_generic()
377 * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters
399 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
410 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
418 if (hw->mac.type >= ixgbe_mac_82599EB) in ixgbe_clear_hw_cntrs_generic()
435 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_clear_hw_cntrs_generic()
460 if (hw->mac.type >= ixgbe_mac_82599EB) { in ixgbe_clear_hw_cntrs_generic()
472 if (hw->mac.type == ixgbe_mac_X550 || hw->mac.type == ixgbe_mac_X540) { in ixgbe_clear_hw_cntrs_generic()
473 if (hw->phy.id == 0) in ixgbe_clear_hw_cntrs_generic()
474 hw->phy.ops.identify(hw); in ixgbe_clear_hw_cntrs_generic()
475 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
476 hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
477 hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
478 hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, MDIO_MMD_PCS, &i); in ixgbe_clear_hw_cntrs_generic()
485 * ixgbe_read_pba_string_generic - Reads part number string from EEPROM
487 * @pba_num: stores the part number string from the EEPROM
490 * Reads the part number string from the EEPROM.
506 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); in ixgbe_read_pba_string_generic()
512 ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr); in ixgbe_read_pba_string_generic()
539 pba_num[6] = '-'; in ixgbe_read_pba_string_generic()
547 /* switch all the data but the '-' to hex char */ in ixgbe_read_pba_string_generic()
552 pba_num[offset] += 'A' - 0xA; in ixgbe_read_pba_string_generic()
558 ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length); in ixgbe_read_pba_string_generic()
570 if (pba_num_size < (((u32)length * 2) - 1)) { in ixgbe_read_pba_string_generic()
577 length--; in ixgbe_read_pba_string_generic()
580 ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data); in ixgbe_read_pba_string_generic()
594 * ixgbe_get_mac_addr_generic - Generic get MAC address
600 * in order for the MAC address to have been loaded from the EEPROM into RAR0
651 * ixgbe_get_bus_info_generic - Generic set PCI bus info
660 hw->bus.type = ixgbe_bus_type_pci_express; in ixgbe_get_bus_info_generic()
665 hw->bus.width = ixgbe_convert_bus_width(link_status); in ixgbe_get_bus_info_generic()
666 hw->bus.speed = ixgbe_convert_bus_speed(link_status); in ixgbe_get_bus_info_generic()
668 hw->mac.ops.set_lan_id(hw); in ixgbe_get_bus_info_generic()
674 * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
677 * Determines the LAN function id by reading memory-mapped registers
682 struct ixgbe_bus_info *bus = &hw->bus; in ixgbe_set_lan_id_multi_port_pcie()
687 bus->func = (reg & IXGBE_STATUS_LAN_ID) >> IXGBE_STATUS_LAN_ID_SHIFT; in ixgbe_set_lan_id_multi_port_pcie()
688 bus->lan_id = bus->func; in ixgbe_set_lan_id_multi_port_pcie()
693 bus->func ^= 0x1; in ixgbe_set_lan_id_multi_port_pcie()
695 /* Get MAC instance from EEPROM for configuring CS4227 */ in ixgbe_set_lan_id_multi_port_pcie()
696 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) { in ixgbe_set_lan_id_multi_port_pcie()
697 hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4); in ixgbe_set_lan_id_multi_port_pcie()
698 bus->instance_id = (ee_ctrl_4 & IXGBE_EE_CTRL_4_INST_ID) >> in ixgbe_set_lan_id_multi_port_pcie()
704 * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units
721 hw->adapter_stopped = true; in ixgbe_stop_adapter_generic()
724 hw->mac.ops.disable_rx(hw); in ixgbe_stop_adapter_generic()
733 for (i = 0; i < hw->mac.max_tx_queues; i++) in ixgbe_stop_adapter_generic()
737 for (i = 0; i < hw->mac.max_rx_queues; i++) { in ixgbe_stop_adapter_generic()
749 * Prevent the PCI-E bus from hanging by disabling PCI-E primary in ixgbe_stop_adapter_generic()
750 * access and verify no pending requests in ixgbe_stop_adapter_generic()
756 * ixgbe_init_led_link_act_generic - Store the LED index link/activity.
764 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_led_link_act_generic()
776 mac->led_link_act = i; in ixgbe_init_led_link_act_generic()
784 switch (hw->mac.type) { in ixgbe_init_led_link_act_generic()
786 mac->led_link_act = 0; in ixgbe_init_led_link_act_generic()
789 mac->led_link_act = 1; in ixgbe_init_led_link_act_generic()
792 mac->led_link_act = 2; in ixgbe_init_led_link_act_generic()
799 * ixgbe_led_on_generic - Turns on the software controllable LEDs.
820 * ixgbe_led_off_generic - Turns off the software controllable LEDs.
841 * ixgbe_init_eeprom_params_generic - Initialize EEPROM params
844 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
845 * ixgbe_hw struct in order to set up EEPROM access.
849 struct ixgbe_eeprom_info *eeprom = &hw->eeprom; in ixgbe_init_eeprom_params_generic() local
853 if (eeprom->type == ixgbe_eeprom_uninitialized) { in ixgbe_init_eeprom_params_generic()
854 eeprom->type = ixgbe_eeprom_none; in ixgbe_init_eeprom_params_generic()
857 eeprom->semaphore_delay = 10; in ixgbe_init_eeprom_params_generic()
858 /* Clear EEPROM page size, it will be initialized as needed */ in ixgbe_init_eeprom_params_generic()
859 eeprom->word_page_size = 0; in ixgbe_init_eeprom_params_generic()
862 * Check for EEPROM present first. in ixgbe_init_eeprom_params_generic()
867 eeprom->type = ixgbe_eeprom_spi; in ixgbe_init_eeprom_params_generic()
870 * SPI EEPROM is assumed here. This code would need to in ixgbe_init_eeprom_params_generic()
871 * change if a future EEPROM is not SPI. in ixgbe_init_eeprom_params_generic()
875 eeprom->word_size = BIT(eeprom_size + in ixgbe_init_eeprom_params_generic()
880 eeprom->address_bits = 16; in ixgbe_init_eeprom_params_generic()
882 eeprom->address_bits = 8; in ixgbe_init_eeprom_params_generic()
883 hw_dbg(hw, "Eeprom params: type = %d, size = %d, address bits: %d\n", in ixgbe_init_eeprom_params_generic()
884 eeprom->type, eeprom->word_size, eeprom->address_bits); in ixgbe_init_eeprom_params_generic()
891 * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang
893 * @offset: offset within the EEPROM to write
895 * @data: 16 bit word(s) to write to EEPROM
897 * Reads 16 bit word(s) from EEPROM through bit-bang method
905 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_buffer_bit_bang_generic()
910 if (offset + words > hw->eeprom.word_size) in ixgbe_write_eeprom_buffer_bit_bang_generic()
914 * The EEPROM page size cannot be queried from the chip. We do lazy in ixgbe_write_eeprom_buffer_bit_bang_generic()
917 if ((hw->eeprom.word_page_size == 0) && in ixgbe_write_eeprom_buffer_bit_bang_generic()
927 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_write_eeprom_buffer_bit_bang_generic()
928 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_write_eeprom_buffer_bit_bang_generic()
940 * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM
942 * @offset: offset within the EEPROM to be written to
944 * @data: 16 bit word(s) to be written to the EEPROM
947 * EEPROM will most likely contain an invalid checksum.
958 /* Prepare the EEPROM for writing */ in ixgbe_write_eeprom_buffer_bit_bang()
981 if ((hw->eeprom.address_bits == 8) && in ixgbe_write_eeprom_buffer_bit_bang()
985 /* Send the Write command (8-bit opcode + addr) */ in ixgbe_write_eeprom_buffer_bit_bang()
989 hw->eeprom.address_bits); in ixgbe_write_eeprom_buffer_bit_bang()
991 page_size = hw->eeprom.word_page_size; in ixgbe_write_eeprom_buffer_bit_bang()
1003 if (((offset + i) & (page_size - 1)) == in ixgbe_write_eeprom_buffer_bit_bang()
1004 (page_size - 1)) in ixgbe_write_eeprom_buffer_bit_bang()
1011 /* Done with writing - release the EEPROM */ in ixgbe_write_eeprom_buffer_bit_bang()
1018 * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM
1020 * @offset: offset within the EEPROM to be written to
1021 * @data: 16 bit word to be written to the EEPROM
1024 * EEPROM will most likely contain an invalid checksum.
1028 hw->eeprom.ops.init_params(hw); in ixgbe_write_eeprom_generic()
1030 if (offset >= hw->eeprom.word_size) in ixgbe_write_eeprom_generic()
1037 * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang
1039 * @offset: offset within the EEPROM to be read
1041 * @data: read 16 bit words(s) from EEPROM
1043 * Reads 16 bit word(s) from EEPROM through bit-bang method
1051 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1056 if (offset + words > hw->eeprom.word_size) in ixgbe_read_eeprom_buffer_bit_bang_generic()
1065 count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? in ixgbe_read_eeprom_buffer_bit_bang_generic()
1066 IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); in ixgbe_read_eeprom_buffer_bit_bang_generic()
1079 * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang
1081 * @offset: offset within the EEPROM to be read
1083 * @data: read 16 bit word(s) from EEPROM
1085 * Reads 16 bit word(s) from EEPROM through bit-bang method
1095 /* Prepare the EEPROM for reading */ in ixgbe_read_eeprom_buffer_bit_bang()
1110 if ((hw->eeprom.address_bits == 8) && in ixgbe_read_eeprom_buffer_bit_bang()
1118 hw->eeprom.address_bits); in ixgbe_read_eeprom_buffer_bit_bang()
1132 * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang
1134 * @offset: offset within the EEPROM to be read
1135 * @data: read 16 bit value from EEPROM
1137 * Reads 16 bit value from EEPROM through bit-bang method
1142 hw->eeprom.ops.init_params(hw); in ixgbe_read_eeprom_bit_bang_generic()
1144 if (offset >= hw->eeprom.word_size) in ixgbe_read_eeprom_bit_bang_generic()
1151 * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD
1153 * @offset: offset of word in the EEPROM to read
1155 * @data: 16 bit word(s) from the EEPROM
1157 * Reads a 16 bit word(s) from the EEPROM using the EERD register.
1166 hw->eeprom.ops.init_params(hw); in ixgbe_read_eerd_buffer_generic()
1171 if (offset >= hw->eeprom.word_size) in ixgbe_read_eerd_buffer_generic()
1185 hw_dbg(hw, "Eeprom read timed out\n"); in ixgbe_read_eerd_buffer_generic()
1194 * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size
1196 * @offset: offset within the EEPROM to be used as a scratch pad
1198 * Discover EEPROM page size by writing marching data at given offset.
1212 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX; in ixgbe_detect_eeprom_page_size_generic()
1215 hw->eeprom.word_page_size = 0; in ixgbe_detect_eeprom_page_size_generic()
1225 * EEPROM address wraps around current page. in ixgbe_detect_eeprom_page_size_generic()
1227 hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; in ixgbe_detect_eeprom_page_size_generic()
1229 hw_dbg(hw, "Detected EEPROM page size = %d words.\n", in ixgbe_detect_eeprom_page_size_generic()
1230 hw->eeprom.word_page_size); in ixgbe_detect_eeprom_page_size_generic()
1235 * ixgbe_read_eerd_generic - Read EEPROM word using EERD
1237 * @offset: offset of word in the EEPROM to read
1238 * @data: word read from the EEPROM
1240 * Reads a 16 bit word from the EEPROM using the EERD register.
1248 * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR
1250 * @offset: offset of word in the EEPROM to write
1252 * @data: word(s) write to the EEPROM
1254 * Write a 16 bit word(s) to the EEPROM using the EEWR register.
1263 hw->eeprom.ops.init_params(hw); in ixgbe_write_eewr_buffer_generic()
1268 if (offset >= hw->eeprom.word_size) in ixgbe_write_eewr_buffer_generic()
1278 hw_dbg(hw, "Eeprom write EEWR timed out\n"); in ixgbe_write_eewr_buffer_generic()
1286 hw_dbg(hw, "Eeprom write EEWR timed out\n"); in ixgbe_write_eewr_buffer_generic()
1295 * ixgbe_write_eewr_generic - Write EEPROM word using EEWR
1297 * @offset: offset of word in the EEPROM to write
1298 * @data: word write to the EEPROM
1300 * Write a 16 bit word to the EEPROM using the EEWR register.
1308 * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status
1310 * @ee_reg: EEPROM flag for polling
1335 * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang
1338 * Prepares EEPROM for access using bit-bang method. This function should
1339 * be called before issuing a command to the EEPROM.
1346 if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) != 0) in ixgbe_acquire_eeprom()
1351 /* Request EEPROM Access */ in ixgbe_acquire_eeprom()
1366 hw_dbg(hw, "Could not acquire EEPROM grant\n"); in ixgbe_acquire_eeprom()
1368 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_acquire_eeprom()
1372 /* Setup EEPROM for Read/Write */ in ixgbe_acquire_eeprom()
1382 * ixgbe_get_eeprom_semaphore - Get hardware semaphore
1385 * Sets the hardware semaphores so EEPROM access can occur for bit-bang method
1406 hw_dbg(hw, "Driver can't access the Eeprom - SMBI Semaphore not granted.\n"); in ixgbe_get_eeprom_semaphore()
1430 /* Set the SW EEPROM semaphore bit to request access */ in ixgbe_get_eeprom_semaphore()
1444 /* Release semaphores and return error if SW EEPROM semaphore in ixgbe_get_eeprom_semaphore()
1445 * was not granted because we don't have access to the EEPROM in ixgbe_get_eeprom_semaphore()
1448 hw_dbg(hw, "SWESMBI Software EEPROM semaphore not granted.\n"); in ixgbe_get_eeprom_semaphore()
1457 * ixgbe_release_eeprom_semaphore - Release hardware semaphore
1475 * ixgbe_ready_eeprom - Polls for EEPROM ready
1485 * EEPROM will signal that the command has been completed by clearing in ixgbe_ready_eeprom()
1501 * On some parts, SPI write time could vary from 0-20mSec on 3.3V in ixgbe_ready_eeprom()
1502 * devices (and only 0-5mSec on 5V devices) in ixgbe_ready_eeprom()
1505 hw_dbg(hw, "SPI EEPROM Status error\n"); in ixgbe_ready_eeprom()
1513 * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state
1534 * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM.
1536 * @data: data to send to the EEPROM
1549 * Mask is used to shift "count" bits of "data" out to the EEPROM in ixgbe_shift_out_eeprom_bits()
1552 mask = BIT(count - 1); in ixgbe_shift_out_eeprom_bits()
1556 * A "1" is shifted out to the EEPROM by setting bit "DI" to a in ixgbe_shift_out_eeprom_bits()
1558 * bit controls the clock input to the EEPROM). A "0" is in ixgbe_shift_out_eeprom_bits()
1559 * shifted out to the EEPROM by setting "DI" to "0" and then in ixgbe_shift_out_eeprom_bits()
1577 * EEPROM in ixgbe_shift_out_eeprom_bits()
1589 * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM
1600 * In order to read a register from the EEPROM, we need to shift in ixgbe_shift_in_eeprom_bits()
1601 * 'count' bits in from the EEPROM. Bits are "shifted in" by raising in ixgbe_shift_in_eeprom_bits()
1602 * the clock input to the EEPROM (setting the SK bit), and then reading in ixgbe_shift_in_eeprom_bits()
1627 * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input.
1634 * Raise the clock input to the EEPROM in ixgbe_raise_eeprom_clk()
1644 * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input.
1651 * Lower the clock input to the EEPROM (clearing the SK bit), then in ixgbe_lower_eeprom_clk()
1661 * ixgbe_release_eeprom - Release EEPROM, release semaphores
1678 /* Stop requesting EEPROM access */ in ixgbe_release_eeprom()
1682 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); in ixgbe_release_eeprom()
1688 usleep_range(hw->eeprom.semaphore_delay * 1000, in ixgbe_release_eeprom()
1689 hw->eeprom.semaphore_delay * 2000); in ixgbe_release_eeprom()
1693 * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum
1705 /* Include 0x0-0x3F in the checksum */ in ixgbe_calc_eeprom_checksum_generic()
1707 if (hw->eeprom.ops.read(hw, i, &word)) { in ixgbe_calc_eeprom_checksum_generic()
1708 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1716 if (hw->eeprom.ops.read(hw, i, &pointer)) { in ixgbe_calc_eeprom_checksum_generic()
1717 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1725 if (hw->eeprom.ops.read(hw, pointer, &length)) { in ixgbe_calc_eeprom_checksum_generic()
1726 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1734 if (hw->eeprom.ops.read(hw, j, &word)) { in ixgbe_calc_eeprom_checksum_generic()
1735 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_calc_eeprom_checksum_generic()
1742 checksum = (u16)IXGBE_EEPROM_SUM - checksum; in ixgbe_calc_eeprom_checksum_generic()
1748 * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum
1752 * Performs checksum calculation and validates the EEPROM checksum. If the
1763 * Read the first word from the EEPROM. If this times out or fails, do in ixgbe_validate_eeprom_checksum_generic()
1765 * EEPROM read fails in ixgbe_validate_eeprom_checksum_generic()
1767 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_validate_eeprom_checksum_generic()
1769 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_validate_eeprom_checksum_generic()
1773 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_validate_eeprom_checksum_generic()
1779 status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum); in ixgbe_validate_eeprom_checksum_generic()
1781 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_validate_eeprom_checksum_generic()
1785 /* Verify read checksum from EEPROM is the same as in ixgbe_validate_eeprom_checksum_generic()
1799 * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum
1808 * Read the first word from the EEPROM. If this times out or fails, do in ixgbe_update_eeprom_checksum_generic()
1810 * EEPROM read fails in ixgbe_update_eeprom_checksum_generic()
1812 status = hw->eeprom.ops.read(hw, 0, &checksum); in ixgbe_update_eeprom_checksum_generic()
1814 hw_dbg(hw, "EEPROM read failed\n"); in ixgbe_update_eeprom_checksum_generic()
1818 status = hw->eeprom.ops.calc_checksum(hw); in ixgbe_update_eeprom_checksum_generic()
1824 status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum); in ixgbe_update_eeprom_checksum_generic()
1830 * ixgbe_set_rar_generic - Set Rx address register
1843 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_rar_generic()
1852 hw->mac.ops.set_vmdq(hw, index, vmdq); in ixgbe_set_rar_generic()
1886 * ixgbe_clear_rar_generic - Remove Rx address register
1895 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_rar_generic()
1920 hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_clear_rar_generic()
1926 * ixgbe_init_rx_addrs_generic - Initializes receive address filters.
1936 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_init_rx_addrs_generic()
1941 * Otherwise, use the permanent address from the eeprom. in ixgbe_init_rx_addrs_generic()
1943 if (!is_valid_ether_addr(hw->mac.addr)) { in ixgbe_init_rx_addrs_generic()
1945 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1947 hw_dbg(hw, " Keeping Current RAR0 Addr =%pM\n", hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1951 hw_dbg(hw, " New MAC Addr =%pM\n", hw->mac.addr); in ixgbe_init_rx_addrs_generic()
1953 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); in ixgbe_init_rx_addrs_generic()
1957 hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL); in ixgbe_init_rx_addrs_generic()
1959 hw->addr_ctrl.overflow_promisc = 0; in ixgbe_init_rx_addrs_generic()
1961 hw->addr_ctrl.rar_used_count = 1; in ixgbe_init_rx_addrs_generic()
1964 hw_dbg(hw, "Clearing RAR[1-%d]\n", rar_entries - 1); in ixgbe_init_rx_addrs_generic()
1971 hw->addr_ctrl.mta_in_use = 0; in ixgbe_init_rx_addrs_generic()
1972 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_init_rx_addrs_generic()
1975 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_init_rx_addrs_generic()
1978 if (hw->mac.ops.init_uta_tables) in ixgbe_init_rx_addrs_generic()
1979 hw->mac.ops.init_uta_tables(hw); in ixgbe_init_rx_addrs_generic()
1985 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
1990 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
1991 * incoming rx multicast addresses, to determine the bit-vector to check in
1992 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
2000 switch (hw->mac.mc_filter_type) { in ixgbe_mta_vector()
2018 /* vector can only be 12-bits or boundary will be exceeded */ in ixgbe_mta_vector()
2024 * ixgbe_set_mta - Set bit-vector in multicast table
2028 * Sets the bit-vector in the multicast table.
2036 hw->addr_ctrl.mta_in_use++; in ixgbe_set_mta()
2039 hw_dbg(hw, " bit-vector = 0x%03X\n", vector); in ixgbe_set_mta()
2042 * The MTA is a register array of 128 32-bit registers. It is treated in ixgbe_set_mta()
2052 hw->mac.mta_shadow[vector_reg] |= BIT(vector_bit); in ixgbe_set_mta()
2056 * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses
2075 hw->addr_ctrl.num_mc_addrs = netdev_mc_count(netdev); in ixgbe_update_mc_addr_list_generic()
2076 hw->addr_ctrl.mta_in_use = 0; in ixgbe_update_mc_addr_list_generic()
2080 memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); in ixgbe_update_mc_addr_list_generic()
2085 ixgbe_set_mta(hw, ha->addr); in ixgbe_update_mc_addr_list_generic()
2089 for (i = 0; i < hw->mac.mcft_size; i++) in ixgbe_update_mc_addr_list_generic()
2091 hw->mac.mta_shadow[i]); in ixgbe_update_mc_addr_list_generic()
2093 if (hw->addr_ctrl.mta_in_use > 0) in ixgbe_update_mc_addr_list_generic()
2095 IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type); in ixgbe_update_mc_addr_list_generic()
2102 * ixgbe_enable_mc_generic - Enable multicast address in RAR
2109 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_enable_mc_generic()
2111 if (a->mta_in_use > 0) in ixgbe_enable_mc_generic()
2113 hw->mac.mc_filter_type); in ixgbe_enable_mc_generic()
2119 * ixgbe_disable_mc_generic - Disable multicast address in RAR
2126 struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; in ixgbe_disable_mc_generic()
2128 if (a->mta_in_use > 0) in ixgbe_disable_mc_generic()
2129 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); in ixgbe_disable_mc_generic()
2135 * ixgbe_fc_enable_generic - Enable flow control
2148 if (!hw->fc.pause_time) in ixgbe_fc_enable_generic()
2153 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2154 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2155 if (!hw->fc.low_water[i] || in ixgbe_fc_enable_generic()
2156 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2164 hw->mac.ops.fc_autoneg(hw); in ixgbe_fc_enable_generic()
2183 switch (hw->fc.current_mode) { in ixgbe_fc_enable_generic()
2225 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_generic()
2226 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2227 fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; in ixgbe_fc_enable_generic()
2229 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_generic()
2235 * to the Rx packet buffer size - 24KB. This allows in ixgbe_fc_enable_generic()
2239 fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; in ixgbe_fc_enable_generic()
2246 reg = hw->fc.pause_time * 0x00010001U; in ixgbe_fc_enable_generic()
2250 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); in ixgbe_fc_enable_generic()
2256 * ixgbe_negotiate_fc - Negotiate flow control
2282 if (hw->fc.requested_mode == ixgbe_fc_full) { in ixgbe_negotiate_fc()
2283 hw->fc.current_mode = ixgbe_fc_full; in ixgbe_negotiate_fc()
2286 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2291 hw->fc.current_mode = ixgbe_fc_tx_pause; in ixgbe_negotiate_fc()
2295 hw->fc.current_mode = ixgbe_fc_rx_pause; in ixgbe_negotiate_fc()
2298 hw->fc.current_mode = ixgbe_fc_none; in ixgbe_negotiate_fc()
2305 * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
2317 * - link is up but AN did not complete, or if in ixgbe_fc_autoneg_fiber()
2318 * - link is up and AN completed but timed out in ixgbe_fc_autoneg_fiber()
2339 * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
2351 * - backplane autoneg was not completed, or if in ixgbe_fc_autoneg_backplane()
2352 * - we are 82599 and link partner is not AN enabled in ixgbe_fc_autoneg_backplane()
2358 if (hw->mac.type == ixgbe_mac_82599EB) { in ixgbe_fc_autoneg_backplane()
2378 * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
2388 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_fc_autoneg_copper()
2391 hw->phy.ops.read_reg(hw, MDIO_AN_LPA, in ixgbe_fc_autoneg_copper()
2402 * ixgbe_fc_autoneg - Configure flow control
2417 * - FC autoneg is disabled, or if in ixgbe_fc_autoneg()
2418 * - link is not up. in ixgbe_fc_autoneg()
2423 if (hw->fc.disable_fc_autoneg) in ixgbe_fc_autoneg()
2426 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_fc_autoneg()
2430 switch (hw->phy.media_type) { in ixgbe_fc_autoneg()
2454 hw->fc.fc_was_autonegged = true; in ixgbe_fc_autoneg()
2456 hw->fc.fc_was_autonegged = false; in ixgbe_fc_autoneg()
2457 hw->fc.current_mode = hw->fc.requested_mode; in ixgbe_fc_autoneg()
2462 * ixgbe_pcie_timeout_poll - Return number of times to poll for completion
2465 * System-wide timeout range is encoded in PCIe Device Control2 register.
2509 * ixgbe_disable_pcie_primary - Disable PCI-express primary access
2512 * Disables PCI-Express primary access and verifies there are no pending
2532 hw_dbg(hw, "GIO disable did not set - requesting resets\n"); in ixgbe_disable_pcie_primary()
2538 ixgbe_removed(hw->hw_addr)) in ixgbe_disable_pcie_primary()
2556 hw_dbg(hw, "GIO Primary Disable bit didn't clear - requesting resets\n"); in ixgbe_disable_pcie_primary()
2558 hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_disable_pcie_primary()
2560 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_disable_pcie_primary()
2571 if (ixgbe_removed(hw->hw_addr)) in ixgbe_disable_pcie_primary()
2582 * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore
2587 * function (CSR, PHY0, PHY1, EEPROM, Flash)
2627 * ixgbe_release_swfw_sync - Release SWFW semaphore
2632 * function (CSR, PHY0, PHY1, EEPROM, Flash)
2649 * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read
2655 * The default case requires no protection so just to the register read.
2665 * prot_autoc_write_generic - Hides MAC differences needed for AUTOC write
2678 * ixgbe_disable_rx_buff_generic - Stops the receive data path
2698 /* Use interrupt-safe sleep just in case */ in ixgbe_disable_rx_buff_generic()
2711 * ixgbe_enable_rx_buff_generic - Enables the receive data path
2729 * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit
2738 hw->mac.ops.enable_rx(hw); in ixgbe_enable_rx_dma_generic()
2740 hw->mac.ops.disable_rx(hw); in ixgbe_enable_rx_dma_generic()
2746 * ixgbe_blink_led_start_generic - Blink LED based on index.
2763 * Link must be up to auto-blink the LEDs; in ixgbe_blink_led_start_generic()
2766 hw->mac.ops.check_link(hw, &speed, &link_up, false); in ixgbe_blink_led_start_generic()
2769 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_start_generic()
2776 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_start_generic()
2794 * ixgbe_blink_led_stop_generic - Stop blinking LED based on index.
2808 ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); in ixgbe_blink_led_stop_generic()
2815 ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); in ixgbe_blink_led_stop_generic()
2829 * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM
2833 * This function will read the EEPROM location for the SAN MAC address
2843 * First read the EEPROM pointer to see if the MAC addresses are in ixgbe_get_san_mac_addr_offset()
2846 ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, in ixgbe_get_san_mac_addr_offset()
2849 hw_err(hw, "eeprom read at offset %d failed\n", in ixgbe_get_san_mac_addr_offset()
2856 * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM
2860 * Reads the SAN MAC address from the EEPROM, if it's available. This is
2861 * per-port, so set_lan_id() must be called before reading the addresses.
2863 * upon for non-SFP connections, so we must call it here.
2872 * First read the EEPROM pointer to see if the MAC addresses are in ixgbe_get_san_mac_addr_generic()
2873 * available. If they're not, no point in calling set_lan_id() here. in ixgbe_get_san_mac_addr_generic()
2881 hw->mac.ops.set_lan_id(hw); in ixgbe_get_san_mac_addr_generic()
2883 (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : in ixgbe_get_san_mac_addr_generic()
2886 ret_val = hw->eeprom.ops.read(hw, san_mac_offset, in ixgbe_get_san_mac_addr_generic()
2889 hw_err(hw, "eeprom read at offset %d failed\n", in ixgbe_get_san_mac_addr_generic()
2900 /* No addresses available in this EEPROM. It's not necessarily an in ixgbe_get_san_mac_addr_generic()
2909 * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count
2912 * Read PCIe configuration space, and get the MSI-X vector count from
2921 switch (hw->mac.type) { in ixgbe_get_pcie_msix_count_generic()
2939 if (ixgbe_removed(hw->hw_addr)) in ixgbe_get_pcie_msix_count_generic()
2943 /* MSI-X count is zero-based in HW */ in ixgbe_get_pcie_msix_count_generic()
2953 * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address
2961 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_vmdq_generic()
2972 if (ixgbe_removed(hw->hw_addr)) in ixgbe_clear_vmdq_generic()
2991 mpsar_hi &= ~BIT(vmdq - 32); in ixgbe_clear_vmdq_generic()
2997 rar != 0 && rar != hw->mac.san_mac_rar_index) in ixgbe_clear_vmdq_generic()
2998 hw->mac.ops.clear_rar(hw, rar); in ixgbe_clear_vmdq_generic()
3004 * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address
3012 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_vmdq_generic()
3026 mpsar |= BIT(vmdq - 32); in ixgbe_set_vmdq_generic()
3033 * ixgbe_set_vmdq_san_mac_generic - Associate VMDq pool index with a rx address
3040 * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index]
3044 u32 rar = hw->mac.san_mac_rar_index; in ixgbe_set_vmdq_san_mac_generic()
3051 IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), BIT(vmdq - 32)); in ixgbe_set_vmdq_san_mac_generic()
3058 * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array
3072 * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot
3091 * will simply bypass the VLVF if there are no entries present in the in ixgbe_find_vlvf_slot()
3102 * pre-decrement loop covering (IXGBE_VLVF_ENTRIES - 1) .. 1 in ixgbe_find_vlvf_slot()
3104 for (regindex = IXGBE_VLVF_ENTRIES; --regindex;) { in ixgbe_find_vlvf_slot()
3116 hw_dbg(hw, "No space in VLVF.\n"); in ixgbe_find_vlvf_slot()
3122 * ixgbe_set_vfta_generic - Set VLAN filter table
3141 * this is a 2 part operation - first the VFTA, then the in ixgbe_set_vfta_generic()
3147 * The VFTA is a bitstring made up of 128 32-bit registers in ixgbe_set_vfta_generic()
3149 * bits[11-5]: which register in ixgbe_set_vfta_generic()
3150 * bits[4-0]: which bit in the register in ixgbe_set_vfta_generic()
3192 !IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + 1 - vind / 32))) { in ixgbe_set_vfta_generic()
3237 * ixgbe_clear_vfta_generic - Clear VLAN filter table
3246 for (offset = 0; offset < hw->mac.vft_size; offset++) in ixgbe_clear_vfta_generic()
3259 * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
3268 if (!hw->need_crosstalk_fix) in ixgbe_need_crosstalk_fix()
3272 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_need_crosstalk_fix()
3284 * ixgbe_check_mac_link_generic - Determine link and speed status
3304 switch (hw->mac.type) { in ixgbe_check_mac_link_generic()
3315 /* sanity check - No SFP+ devices here */ in ixgbe_check_mac_link_generic()
3357 if ((hw->mac.type >= ixgbe_mac_X550) && in ixgbe_check_mac_link_generic()
3367 if ((hw->mac.type >= ixgbe_mac_X550) && in ixgbe_check_mac_link_generic()
3375 if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T || in ixgbe_check_mac_link_generic()
3376 hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) { in ixgbe_check_mac_link_generic()
3388 * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from
3389 * the EEPROM
3394 * This function will read the EEPROM from the alternative SAN MAC address
3409 if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset)) in ixgbe_get_wwn_prefix_generic()
3418 if (hw->eeprom.ops.read(hw, offset, &caps)) in ixgbe_get_wwn_prefix_generic()
3425 if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) in ixgbe_get_wwn_prefix_generic()
3426 hw_err(hw, "eeprom read at offset %d failed\n", offset); in ixgbe_get_wwn_prefix_generic()
3429 if (hw->eeprom.ops.read(hw, offset, wwpn_prefix)) in ixgbe_get_wwn_prefix_generic()
3435 hw_err(hw, "eeprom read at offset %d failed\n", offset); in ixgbe_get_wwn_prefix_generic()
3440 * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
3442 * @enable: enable or disable switch for MAC anti-spoofing
3443 * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing
3452 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_mac_anti_spoofing()
3464 * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing
3466 * @enable: enable or disable switch for VLAN anti-spoofing
3467 * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing
3476 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_set_vlan_anti_spoofing()
3488 * ixgbe_get_device_caps_generic - Get additional device capabilities
3490 * @device_caps: the EEPROM word with the extra device capabilities
3492 * This function will read the EEPROM location for the device capabilities,
3497 hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); in ixgbe_get_device_caps_generic()
3503 * ixgbe_set_rxpba_generic - Initialize RX packet buffer
3514 u32 pbsize = hw->mac.rx_pb_size; in ixgbe_set_rxpba_generic()
3519 pbsize -= headroom; in ixgbe_set_rxpba_generic()
3533 pbsize -= rxpktsize * (num_pb / 2); in ixgbe_set_rxpba_generic()
3540 rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; in ixgbe_set_rxpba_generic()
3554 txpbthresh = (txpktsize / 1024) - IXGBE_TXPKT_SIZE_MAX; in ixgbe_set_rxpba_generic()
3569 * ixgbe_calculate_checksum - Calculate checksum for buffer
3570 * @buffer: pointer to EEPROM
3571 * @length: size of EEPROM to calculate a checksum for
3587 return (u8) (0 - sum); in ixgbe_calculate_checksum()
3591 * ixgbe_hic_unlocked - Issue command to manageability block unlocked
3611 hw_dbg(hw, "Buffer length failure buffersize-%d.\n", length); in ixgbe_hic_unlocked()
3660 * ixgbe_host_interface_command - Issue command to manageability block
3688 hw_dbg(hw, "Buffer length failure buffersize-%d.\n", length); in ixgbe_host_interface_command()
3692 status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
3713 buf_len = hdr->buf_len; in ixgbe_host_interface_command()
3733 hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); in ixgbe_host_interface_command()
3739 * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware
3764 fw_cmd.port_num = hw->bus.func; in ixgbe_set_fw_drv_ver_generic()
3796 * ixgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo
3810 * already be clear and as such there is no work to do in ixgbe_clear_tx_pending()
3812 if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED)) in ixgbe_clear_tx_pending()
3834 if (ixgbe_removed(hw->hw_addr)) in ixgbe_clear_tx_pending()
3868 * ixgbe_get_ets_data - Extracts the ETS bit data
3880 status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, ets_offset); in ixgbe_get_ets_data()
3887 status = hw->eeprom.ops.read(hw, *ets_offset, ets_cfg); in ixgbe_get_ets_data()
3898 * ixgbe_get_thermal_sensor_data_generic - Gathers thermal sensor data
3911 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_get_thermal_sensor_data_generic()
3929 status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i), in ixgbe_get_thermal_sensor_data_generic()
3940 status = hw->phy.ops.read_i2c_byte(hw, in ixgbe_get_thermal_sensor_data_generic()
3943 &data->sensor[i].temp); in ixgbe_get_thermal_sensor_data_generic()
3953 * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds
3969 struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; in ixgbe_init_thermal_sensor_thresh_generic()
3991 if (hw->eeprom.ops.read(hw, ets_offset + 1 + i, &ets_sensor)) { in ixgbe_init_thermal_sensor_thresh_generic()
3992 hw_err(hw, "eeprom read at offset %d failed\n", in ixgbe_init_thermal_sensor_thresh_generic()
4002 hw->phy.ops.write_i2c_byte(hw, in ixgbe_init_thermal_sensor_thresh_generic()
4009 data->sensor[i].location = sensor_location; in ixgbe_init_thermal_sensor_thresh_generic()
4010 data->sensor[i].caution_thresh = therm_limit; in ixgbe_init_thermal_sensor_thresh_generic()
4011 data->sensor[i].max_op_thresh = therm_limit - low_thresh_delta; in ixgbe_init_thermal_sensor_thresh_generic()
4018 * ixgbe_get_orom_version - Return option ROM from EEPROM
4023 * if valid option ROM version, nvm_ver->or_valid set to true
4024 * else nvm_ver->or_valid is false.
4031 nvm_ver->or_valid = false; in ixgbe_get_orom_version()
4033 hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset); in ixgbe_get_orom_version()
4039 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh); in ixgbe_get_orom_version()
4040 hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl); in ixgbe_get_orom_version()
4048 nvm_ver->or_valid = true; in ixgbe_get_orom_version()
4049 nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT; in ixgbe_get_orom_version()
4050 nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) | in ixgbe_get_orom_version()
4052 nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK; in ixgbe_get_orom_version()
4056 * ixgbe_get_oem_prod_version - Etrack ID from EEPROM
4060 * if valid OEM product version, nvm_ver->oem_valid set to true
4061 * else nvm_ver->oem_valid is false.
4068 nvm_ver->oem_valid = false; in ixgbe_get_oem_prod_version()
4069 hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset); in ixgbe_get_oem_prod_version()
4076 hw->eeprom.ops.read(hw, offset, &mod_len); in ixgbe_get_oem_prod_version()
4077 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap); in ixgbe_get_oem_prod_version()
4084 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver); in ixgbe_get_oem_prod_version()
4085 hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num); in ixgbe_get_oem_prod_version()
4092 nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT; in ixgbe_get_oem_prod_version()
4093 nvm_ver->oem_minor = prod_ver & NVM_VER_MASK; in ixgbe_get_oem_prod_version()
4094 nvm_ver->oem_release = rel_num; in ixgbe_get_oem_prod_version()
4095 nvm_ver->oem_valid = true; in ixgbe_get_oem_prod_version()
4099 * ixgbe_get_etk_id - Return Etrack ID from EEPROM
4111 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l)) in ixgbe_get_etk_id()
4113 if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h)) in ixgbe_get_etk_id()
4120 nvm_ver->etk_id = etk_id_h; in ixgbe_get_etk_id()
4121 nvm_ver->etk_id |= (etk_id_l << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
4123 nvm_ver->etk_id = etk_id_l; in ixgbe_get_etk_id()
4124 nvm_ver->etk_id |= (etk_id_h << NVM_ETK_SHIFT); in ixgbe_get_etk_id()
4134 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_disable_rx_generic()
4141 hw->mac.set_lben = true; in ixgbe_disable_rx_generic()
4143 hw->mac.set_lben = false; in ixgbe_disable_rx_generic()
4158 if (hw->mac.type != ixgbe_mac_82598EB) { in ixgbe_enable_rx_generic()
4159 if (hw->mac.set_lben) { in ixgbe_enable_rx_generic()
4165 hw->mac.set_lben = false; in ixgbe_enable_rx_generic()
4170 /** ixgbe_mng_present - returns true when management capability is present
4177 if (hw->mac.type < ixgbe_mac_82599EB) in ixgbe_mng_present()
4186 * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
4204 /* Mask off requested but non-supported speeds */ in ixgbe_setup_mac_link_multispeed_fiber()
4205 status = hw->mac.ops.get_link_capabilities(hw, &link_speed, &autoneg); in ixgbe_setup_mac_link_multispeed_fiber()
4219 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
4221 hw->mac.ops.set_rate_select_speed(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4232 /* Allow module to change analog characteristics (1G->10G) */ in ixgbe_setup_mac_link_multispeed_fiber()
4235 status = hw->mac.ops.setup_mac_link(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4242 if (hw->mac.ops.flap_tx_laser) in ixgbe_setup_mac_link_multispeed_fiber()
4243 hw->mac.ops.flap_tx_laser(hw); in ixgbe_setup_mac_link_multispeed_fiber()
4254 status = hw->mac.ops.check_link(hw, &link_speed, in ixgbe_setup_mac_link_multispeed_fiber()
4270 switch (hw->phy.media_type) { in ixgbe_setup_mac_link_multispeed_fiber()
4272 hw->mac.ops.set_rate_select_speed(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4283 /* Allow module to change analog characteristics (10G->1G) */ in ixgbe_setup_mac_link_multispeed_fiber()
4286 status = hw->mac.ops.setup_mac_link(hw, in ixgbe_setup_mac_link_multispeed_fiber()
4293 if (hw->mac.ops.flap_tx_laser) in ixgbe_setup_mac_link_multispeed_fiber()
4294 hw->mac.ops.flap_tx_laser(hw); in ixgbe_setup_mac_link_multispeed_fiber()
4300 status = hw->mac.ops.check_link(hw, &link_speed, &link_up, in ixgbe_setup_mac_link_multispeed_fiber()
4320 hw->phy.autoneg_advertised = 0; in ixgbe_setup_mac_link_multispeed_fiber()
4323 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
4326 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_mac_link_multispeed_fiber()
4332 * ixgbe_set_soft_rate_select_speed - Set module link speed
4358 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
4368 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, in ixgbe_set_soft_rate_select_speed()
4377 status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()
4387 status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, in ixgbe_set_soft_rate_select_speed()